[arm] gcc.target/arm/cs*: Use dg-add-options arm_arch_v8_1m_main

These testcases need thumb mode, which may not be the default.

Using dg-add-options arm_arch_v8_1m_main ensures that -mthumb is used
and makes the test pass in more configurations.

2020-09-21  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* gcc.target/arm/csinc-1.c: Use dg-add-options
	arm_arch_v8_1m_main.
	* gcc.target/arm/csinv-1.c: Likewise.
	* gcc.target/arm/csneg.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/arm/csinc-1.c b/gcc/testsuite/gcc.target/arm/csinc-1.c
index b9928493862c44d17f058736448d73369f8bf3b2..255e6e89f50c0fd3ec476bb36fcc76bc395e3d68 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/csinc-1.c
+++ b/gcc/testsuite/gcc.target/arm/csinc-1.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target arm_arch_v8_1m_main_ok } */
-/* { dg-options "-O2 -march=armv8.1-m.main" } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_arch_v8_1m_main } */
 
 int
 test_csinc32_condasn1(int w0, int w1, int w2, int w3)

diff --git a/gcc/testsuite/gcc.target/arm/csinv-1.c b/gcc/testsuite/gcc.target/arm/csinv-1.c
index 6b5383aa913d2302b32895ddd304c8c09319a67f..28450a4c6c2a613a772fbb70d0dfdd5518505703 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/csinv-1.c
+++ b/gcc/testsuite/gcc.target/arm/csinv-1.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target arm_arch_v8_1m_main_ok } */
-/* { dg-options "-O2 -march=armv8.1-m.main" } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_arch_v8_1m_main } */
 
 int
 test_csinv32_condasn1(int w0, int w1, int w2, int w3)

diff --git a/gcc/testsuite/gcc.target/arm/csneg.c b/gcc/testsuite/gcc.target/arm/csneg.c
index e48606265af5c8d5e6ee55c21ab26da3c8c212d7..cf3df13e7e4cbe0275e99cc586e50aab45121867 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/csneg.c
+++ b/gcc/testsuite/gcc.target/arm/csneg.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target arm_arch_v8_1m_main_ok } */
-/* { dg-options "-O2 -march=armv8.1-m.main" } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_arch_v8_1m_main } */
 
 int
 test_csneg32_condasn1(int w0, int w1, int w2, int w3)