S/390: Make tests expect column numbers in RTL output
authorIlya Leoshkevich <iii@linux.ibm.com>
Mon, 5 Nov 2018 16:34:32 +0000 (16:34 +0000)
committerIlya Leoshkevich <iii@gcc.gnu.org>
Mon, 5 Nov 2018 16:34:32 +0000 (16:34 +0000)
RTL output now includes column numbers in addition to line numbers,
like this:

  "gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c":16:1

This confuses some S/390 tests.

gcc/testsuite/ChangeLog:

2018-11-05  Ilya Leoshkevich  <iii@linux.ibm.com>

* gcc.target/s390/md/andc-splitter-1.c: Add colon to
expectations.
* gcc.target/s390/md/andc-splitter-2.c: Likewise.
* gcc.target/s390/md/setmem_long-1.c: Likewise.

From-SVN: r265813

gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c
gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c
gcc/testsuite/gcc.target/s390/md/setmem_long-1.c

index 9001057f89c7dbb5948c31344dbbf6150e5ac5a2..665c049e7cbdf6a886eefd23ffdcbdaa73c639b7 100644 (file)
@@ -1,3 +1,10 @@
+2018-11-05  Ilya Leoshkevich  <iii@linux.ibm.com>
+
+       * gcc.target/s390/md/andc-splitter-1.c: Add colon to
+       expectations.
+       * gcc.target/s390/md/andc-splitter-2.c: Likewise.
+       * gcc.target/s390/md/setmem_long-1.c: Likewise.
+
 2018-11-05  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/87873
index 3f0677cfd76415520d00367242dfd7904655a65a..36f2cfc53de6d6aa0415ac701514d74e7a40a023 100644 (file)
 __attribute__ ((noinline))
 unsigned long andc_vv(unsigned long a, unsigned long b)
 { return ~b & a; }
-/* { dg-final { scan-assembler ":16 .\* \{\\*anddi3\}" } } */
-/* { dg-final { scan-assembler ":16 .\* \{\\*xordi3\}" } } */
+/* { dg-final { scan-assembler ":16:.\* \{\\*anddi3\}" } } */
+/* { dg-final { scan-assembler ":16:.\* \{\\*xordi3\}" } } */
 
 __attribute__ ((noinline))
 unsigned long andc_pv(unsigned long *a, unsigned long b)
 { return ~b & *a; }
-/* { dg-final { scan-assembler ":22 .\* \{\\*anddi3\}" } } */
-/* { dg-final { scan-assembler ":22 .\* \{\\*xordi3\}" } } */
+/* { dg-final { scan-assembler ":22:.\* \{\\*anddi3\}" } } */
+/* { dg-final { scan-assembler ":22:.\* \{\\*xordi3\}" } } */
 
 __attribute__ ((noinline))
 unsigned long andc_vp(unsigned long a, unsigned long *b)
 { return ~*b & a; }
-/* { dg-final { scan-assembler ":28 .\* \{\\*anddi3\}" } } */
-/* { dg-final { scan-assembler ":28 .\* \{\\*xordi3\}" } } */
+/* { dg-final { scan-assembler ":28:.\* \{\\*anddi3\}" } } */
+/* { dg-final { scan-assembler ":28:.\* \{\\*xordi3\}" } } */
 
 __attribute__ ((noinline))
 unsigned long andc_pp(unsigned long *a, unsigned long *b)
 { return ~*b & *a; }
-/* { dg-final { scan-assembler ":34 .\* \{\\*anddi3\}" } } */
-/* { dg-final { scan-assembler ":34 .\* \{\\*xordi3\}" } } */
+/* { dg-final { scan-assembler ":34:.\* \{\\*anddi3\}" } } */
+/* { dg-final { scan-assembler ":34:.\* \{\\*xordi3\}" } } */
 
 /* { dg-final { scan-assembler-times "\tngr\?k\?\t" 4 } } */
 /* { dg-final { scan-assembler-times "\txgr\?\t" 4 } } */
index 89c8ea25f997a9504d7a31552a8417e95812f006..75ab75b5273d2587ff37baa30751523bba42d68a 100644 (file)
 __attribute__ ((noinline))
 unsigned int andc_vv(unsigned int a, unsigned int b)
 { return ~b & a; }
-/* { dg-final { scan-assembler ":16 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
-/* { dg-final { scan-assembler ":16 .\* \{\\*xorsi3\}" } } */
+/* { dg-final { scan-assembler ":16:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":16:.\* \{\\*xorsi3\}" } } */
 
 __attribute__ ((noinline))
 unsigned int andc_pv(unsigned int *a, unsigned int b)
 { return ~b & *a; }
-/* { dg-final { scan-assembler ":22 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
-/* { dg-final { scan-assembler ":22 .\* \{\\*xorsi3\}" } } */
+/* { dg-final { scan-assembler ":22:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":22:.\* \{\\*xorsi3\}" } } */
 
 __attribute__ ((noinline))
 unsigned int andc_vp(unsigned int a, unsigned int *b)
 { return ~*b & a; }
-/* { dg-final { scan-assembler ":28 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
-/* { dg-final { scan-assembler ":28 .\* \{\\*xorsi3\}" } } */
+/* { dg-final { scan-assembler ":28:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":28:.\* \{\\*xorsi3\}" } } */
 
 __attribute__ ((noinline))
 unsigned int andc_pp(unsigned int *a, unsigned int *b)
 { return ~*b & *a; }
-/* { dg-final { scan-assembler ":34 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
-/* { dg-final { scan-assembler ":34 .\* \{\\*xorsi3\}" } } */
+/* { dg-final { scan-assembler ":34:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":34:.\* \{\\*xorsi3\}" } } */
 
 /* { dg-final { scan-assembler-times "\tnr\?k\?\t" 4 } } */
 /* { dg-final { scan-assembler-times "\txr\?k\?\t" 4 } } */
index dec7197cfa9a7457491e9452578b9effec18db23..a1d1c11df37b87894b0fa221fdc2fef5fb95f174 100644 (file)
@@ -23,8 +23,8 @@ void test2(char *p, int c, int len)
 }
 
 /* Check that the right patterns are used.  */
-/* { dg-final { scan-assembler-times {c"?:16 .*{[*]setmem_long_?3?1?z?}} 1 } } */
-/* { dg-final { scan-assembler-times {c"?:22 .*{[*]setmem_long_and_?3?1?z?}} 1 } } */
+/* { dg-final { scan-assembler-times {c"?:16:.*{[*]setmem_long_?3?1?z?}} 1 } } */
+/* { dg-final { scan-assembler-times {c"?:22:.*{[*]setmem_long_and_?3?1?z?}} 1 } } */
 
 #define LEN 500
 char buf[LEN + 2];