Merge pull request #83 from bacam/gdb-protocol-fixes

Gdb protocol fixes

diff --combined riscv/gdbserver.cc
index 7e83c49b118f7896fb5b93b1529c197f1fe21475,920cb8f833490fa6db8ca85fd9f7e3c25babc52c..79284ebf3fb5c2fbac3dd588e82d45df43cc5bc1
--- 1/riscv/gdbserver.cc
--- 2/riscv/gdbserver.cc
+++ b/riscv/gdbserver.cc
@@@ -325,7 -325,7 +325,7 @@@ void circular_buffer_t<T>::append(cons
    count -= copy;
    if (count > 0) {
      assert(count < contiguous_empty_size());
 -    memcpy(contiguous_empty(), src, count * sizeof(T));
 +    memcpy(contiguous_empty(), src+copy, count * sizeof(T));
      data_added(count);
    }
  }
@@@ -592,12 -592,16 +592,16 @@@ class register_read_op_t : public opera
        switch (step) {
          case 0:
            if (reg >= REG_XPR0 && reg <= REG_XPR31) {
+             unsigned int i = 0;
+             if (reg == S0) {
+                 gs.dr_write32(i++, csrr(S0, CSR_DSCRATCH));
+             }
              if (gs.xlen == 32) {
-               gs.dr_write32(0, sw(reg - REG_XPR0, 0, (uint16_t) DEBUG_RAM_START + 16));
+               gs.dr_write32(i++, sw(reg - REG_XPR0, 0, (uint16_t) DEBUG_RAM_START + 16));
              } else {
-               gs.dr_write32(0, sd(reg - REG_XPR0, 0, (uint16_t) DEBUG_RAM_START + 16));
+               gs.dr_write32(i++, sd(reg - REG_XPR0, 0, (uint16_t) DEBUG_RAM_START + 16));
              }
-             gs.dr_write_jump(1);
+             gs.dr_write_jump(i);
            } else if (reg == REG_PC) {
              gs.start_packet();
              if (gs.xlen == 32) {
@@@ -648,7 -652,7 +652,7 @@@
  
          case 1:
            {
 -            unsigned result = gs.dr_read(SLOT_DATA_LAST);
 +            unsigned result = gs.dr_read32(DEBUG_RAM_SIZE / 4 - 1);
              if (result) {
                gs.send_packet("E03");
                return true;
@@@ -728,7 -732,7 +732,7 @@@ class register_write_op_t : public oper
  
          case 1:
            {
 -            unsigned result = gs.dr_read(SLOT_DATA_LAST);
 +            unsigned result = gs.dr_read32(DEBUG_RAM_SIZE / 4 - 1);
              if (result) {
                gs.send_packet("E03");
                return true;
@@@ -1816,8 -1820,6 +1820,6 @@@ void gdbserver_t::handle_register_write
    processor_t *p = sim->get_core(0);
  
    add_operation(new register_write_op_t(*this, n, value));
- 
-   return send_packet("OK");
  }
  
  void gdbserver_t::handle_memory_read(const std::vector<uint8_t> &packet)