tests: Removed old quick/se/00.hello test resources
authorBobby R. Bruce <bbruce@ucdavis.edu>
Tue, 14 Jan 2020 00:24:07 +0000 (16:24 -0800)
committerBobby R. Bruce <bbruce@ucdavis.edu>
Fri, 24 Jan 2020 06:02:20 +0000 (06:02 +0000)
Change-Id: I0579e2b7a131c679fd7488457595f046702d64ef
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24326
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
102 files changed:
tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/arm/linux/minor-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/arm/linux/minor-timing/simout [deleted file]
tests/quick/se/00.hello/ref/arm/linux/minor-timing/stats.txt [deleted file]
tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini [deleted file]
tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simerr [deleted file]
tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout [deleted file]
tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt [deleted file]
tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/arm/linux/o3-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout [deleted file]
tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/simerr [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/simout [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/stats.txt [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simerr [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simout [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-atomic/stats.txt [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout [deleted file]
tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt [deleted file]
tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/mips/linux/o3-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/mips/linux/o3-timing/simout [deleted file]
tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-atomic/simerr [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-atomic/simout [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-atomic/stats.txt [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simerr [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simout [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-timing/simout [deleted file]
tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt [deleted file]
tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/power/linux/o3-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/power/linux/o3-timing/simout [deleted file]
tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt [deleted file]
tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini [deleted file]
tests/quick/se/00.hello/ref/power/linux/simple-atomic/simerr [deleted file]
tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout [deleted file]
tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.json [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simout [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/minor-timing/stats.txt [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/o3-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/o3-timing/config.json [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/o3-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/o3-timing/simout [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/o3-timing/stats.txt [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/config.ini [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/config.json [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/simerr [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/simout [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/stats.txt [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/config.ini [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/config.json [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/simerr [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/simout [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/stats.txt [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.json [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simout [deleted file]
tests/quick/se/00.hello/ref/riscv/linux/simple-timing/stats.txt [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simerr [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simout [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simerr [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simout [deleted file]
tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt [deleted file]
tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/x86/linux/o3-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout [deleted file]
tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simerr [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simerr [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-timing/simerr [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout [deleted file]
tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt [deleted file]
tests/quick/se/00.hello/test.py [deleted file]

diff --git a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini
deleted file mode 100644 (file)
index b967ed8..0000000
+++ /dev/null
@@ -1,1021 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=MinorCPU
-children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
-branchPred=system.cpu.branchPred
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-decodeCycleInput=true
-decodeInputBufferSize=3
-decodeInputWidth=2
-decodeToExecuteForwardDelay=1
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dstage2_mmu=system.cpu.dstage2_mmu
-dtb=system.cpu.dtb
-enableIdling=true
-eventq_index=0
-executeAllowEarlyMemoryIssue=true
-executeBranchDelay=1
-executeCommitLimit=2
-executeCycleInput=true
-executeFuncUnits=system.cpu.executeFuncUnits
-executeInputBufferSize=7
-executeInputWidth=2
-executeIssueLimit=2
-executeLSQMaxStoreBufferStoresPerCycle=2
-executeLSQRequestsQueueSize=1
-executeLSQStoreBufferSize=5
-executeLSQTransfersQueueSize=2
-executeMaxAccessesInMemory=2
-executeMemoryCommitLimit=1
-executeMemoryIssueLimit=1
-executeMemoryWidth=0
-executeSetTraceTimeOnCommit=true
-executeSetTraceTimeOnIssue=false
-fetch1FetchLimit=1
-fetch1LineSnapWidth=0
-fetch1LineWidth=0
-fetch1ToFetch2BackwardDelay=1
-fetch1ToFetch2ForwardDelay=1
-fetch2CycleInput=true
-fetch2InputBufferSize=2
-fetch2ToDecodeForwardDelay=1
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-istage2_mmu=system.cpu.istage2_mmu
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-threadPolicy=RoundRobin
-tracer=system.cpu.tracer
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dstage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.dtb
-
-[system.cpu.dstage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.dstage2_mmu.stage2_tlb.walker
-
-[system.cpu.dstage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.dtb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[3]
-
-[system.cpu.executeFuncUnits]
-type=MinorFUPool
-children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
-eventq_index=0
-funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
-
-[system.cpu.executeFuncUnits.funcUnits0]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses
-opLat=3
-timings=system.cpu.executeFuncUnits.funcUnits0.timings
-
-[system.cpu.executeFuncUnits.funcUnits0.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntAlu
-
-[system.cpu.executeFuncUnits.funcUnits0.timings]
-type=MinorFUTiming
-children=opClasses
-description=Int
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses
-srcRegsRelativeLats=2
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits1]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses
-opLat=3
-timings=system.cpu.executeFuncUnits.funcUnits1.timings
-
-[system.cpu.executeFuncUnits.funcUnits1.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntAlu
-
-[system.cpu.executeFuncUnits.funcUnits1.timings]
-type=MinorFUTiming
-children=opClasses
-description=Int
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses
-srcRegsRelativeLats=2
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits2]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses
-opLat=3
-timings=system.cpu.executeFuncUnits.funcUnits2.timings
-
-[system.cpu.executeFuncUnits.funcUnits2.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntMult
-
-[system.cpu.executeFuncUnits.funcUnits2.timings]
-type=MinorFUTiming
-children=opClasses
-description=Mul
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses
-srcRegsRelativeLats=0
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits3]
-type=MinorFU
-children=opClasses
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=9
-opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses
-opLat=9
-timings=
-
-[system.cpu.executeFuncUnits.funcUnits3.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntDiv
-
-[system.cpu.executeFuncUnits.funcUnits4]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
-opLat=6
-timings=system.cpu.executeFuncUnits.funcUnits4.timings
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses]
-type=MinorOpClassSet
-children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 opClasses26 opClasses27
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses26 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses27
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatAdd
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatCmp
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatCvt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMisc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMult
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMultAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatDiv
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatSqrt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdAdd
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdAddAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdAlu
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdCmp
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdCvt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdMisc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdMult
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdMultAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdShift
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdShiftAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdSqrt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatAdd
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatAlu
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatCmp
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatCvt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatDiv
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatMisc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatMult
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses26]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatMultAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses27]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatSqrt
-
-[system.cpu.executeFuncUnits.funcUnits4.timings]
-type=MinorFUTiming
-children=opClasses
-description=FloatSimd
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses
-srcRegsRelativeLats=2
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits5]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
-opLat=1
-timings=system.cpu.executeFuncUnits.funcUnits5.timings
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses]
-type=MinorOpClassSet
-children=opClasses0 opClasses1 opClasses2 opClasses3
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses2 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses3
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
-type=MinorOpClass
-eventq_index=0
-opClass=MemRead
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
-type=MinorOpClass
-eventq_index=0
-opClass=MemWrite
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses2]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMemRead
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses3]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMemWrite
-
-[system.cpu.executeFuncUnits.funcUnits5.timings]
-type=MinorFUTiming
-children=opClasses
-description=Mem
-eventq_index=0
-extraAssumedLat=2
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses
-srcRegsRelativeLats=1
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits6]
-type=MinorFU
-children=opClasses
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses
-opLat=1
-timings=
-
-[system.cpu.executeFuncUnits.funcUnits6.opClasses]
-type=MinorOpClassSet
-children=opClasses0 opClasses1
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1
-
-[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0]
-type=MinorOpClass
-eventq_index=0
-opClass=IprAccess
-
-[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1]
-type=MinorOpClass
-eventq_index=0
-opClass=InstPrefetch
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=ArmInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=ArmISA
-decoderFlavour=Generic
-eventq_index=0
-fpsid=1090793632
-id_aa64afr0_el1=0
-id_aa64afr1_el1=0
-id_aa64dfr0_el1=1052678
-id_aa64dfr1_el1=0
-id_aa64isar0_el1=0
-id_aa64isar1_el1=0
-id_aa64mmfr0_el1=15728642
-id_aa64mmfr1_el1=0
-id_isar0=34607377
-id_isar1=34677009
-id_isar2=555950401
-id_isar3=17899825
-id_isar4=268501314
-id_isar5=0
-id_mmfr0=270536963
-id_mmfr1=0
-id_mmfr2=19070976
-id_mmfr3=34611729
-midr=1091551472
-pmu=Null
-system=system
-
-[system.cpu.istage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.itb
-
-[system.cpu.istage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.istage2_mmu.stage2_tlb.walker
-
-[system.cpu.istage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.itb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[2]
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-page_policy=open_adaptive
-power_model=Null
-range=0:134217727:0:0:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10000
-static_frontend_latency=10000
-tBURST=5000
-tCCD_L=0
-tCK=1250
-tCL=13750
-tCS=2500
-tRAS=35000
-tRCD=13750
-tREFI=7800000
-tRFC=260000
-tRP=13750
-tRRD=6000
-tRRD_L=0
-tRTP=7500
-tRTW=2500
-tWR=15000
-tWTR=7500
-tXAW=30000
-tXP=6000
-tXPDLL=0
-tXS=270000
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simerr b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simerr
deleted file mode 100755 (executable)
index 707fed9..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simout b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simout
deleted file mode 100755 (executable)
index 0722728..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing/simout
-Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 17:55:48
-gem5 started Apr  3 2017 17:56:13
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 54225
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/arm/linux/minor-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 32617500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/stats.txt
deleted file mode 100644 (file)
index 4b0e86c..0000000
+++ /dev/null
@@ -1,878 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000033                      
-sim_ticks                                    32617500                      
-final_tick                                   32617500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                  73373                      
-host_op_rate                                    85866                      
-host_tick_rate                              519360115                      
-host_mem_usage                                 279788                      
-host_seconds                                     0.06                      
-sim_insts                                        4605                      
-sim_ops                                          5391                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED     32617500                      
-system.physmem.bytes_read::cpu.inst             19456                      
-system.physmem.bytes_read::cpu.data              7424                      
-system.physmem.bytes_read::total                26880                      
-system.physmem.bytes_inst_read::cpu.inst        19456                      
-system.physmem.bytes_inst_read::total           19456                      
-system.physmem.num_reads::cpu.inst                304                      
-system.physmem.num_reads::cpu.data                116                      
-system.physmem.num_reads::total                   420                      
-system.physmem.bw_read::cpu.inst            596489614                      
-system.physmem.bw_read::cpu.data            227607879                      
-system.physmem.bw_read::total               824097494                      
-system.physmem.bw_inst_read::cpu.inst       596489614                      
-system.physmem.bw_inst_read::total          596489614                      
-system.physmem.bw_total::cpu.inst           596489614                      
-system.physmem.bw_total::cpu.data           227607879                      
-system.physmem.bw_total::total              824097494                      
-system.physmem.readReqs                           420                      
-system.physmem.writeReqs                            0                      
-system.physmem.readBursts                         420                      
-system.physmem.writeBursts                          0                      
-system.physmem.bytesReadDRAM                    26880                      
-system.physmem.bytesReadWrQ                         0                      
-system.physmem.bytesWritten                         0                      
-system.physmem.bytesReadSys                     26880                      
-system.physmem.bytesWrittenSys                      0                      
-system.physmem.servicedByWrQ                        0                      
-system.physmem.mergedWrBursts                       0                      
-system.physmem.neitherReadNorWriteReqs              0                      
-system.physmem.perBankRdBursts::0                  91                      
-system.physmem.perBankRdBursts::1                  52                      
-system.physmem.perBankRdBursts::2                  20                      
-system.physmem.perBankRdBursts::3                  43                      
-system.physmem.perBankRdBursts::4                  21                      
-system.physmem.perBankRdBursts::5                  41                      
-system.physmem.perBankRdBursts::6                  36                      
-system.physmem.perBankRdBursts::7                  12                      
-system.physmem.perBankRdBursts::8                   5                      
-system.physmem.perBankRdBursts::9                   6                      
-system.physmem.perBankRdBursts::10                 27                      
-system.physmem.perBankRdBursts::11                 42                      
-system.physmem.perBankRdBursts::12                  9                      
-system.physmem.perBankRdBursts::13                  8                      
-system.physmem.perBankRdBursts::14                  0                      
-system.physmem.perBankRdBursts::15                  7                      
-system.physmem.perBankWrBursts::0                   0                      
-system.physmem.perBankWrBursts::1                   0                      
-system.physmem.perBankWrBursts::2                   0                      
-system.physmem.perBankWrBursts::3                   0                      
-system.physmem.perBankWrBursts::4                   0                      
-system.physmem.perBankWrBursts::5                   0                      
-system.physmem.perBankWrBursts::6                   0                      
-system.physmem.perBankWrBursts::7                   0                      
-system.physmem.perBankWrBursts::8                   0                      
-system.physmem.perBankWrBursts::9                   0                      
-system.physmem.perBankWrBursts::10                  0                      
-system.physmem.perBankWrBursts::11                  0                      
-system.physmem.perBankWrBursts::12                  0                      
-system.physmem.perBankWrBursts::13                  0                      
-system.physmem.perBankWrBursts::14                  0                      
-system.physmem.perBankWrBursts::15                  0                      
-system.physmem.numRdRetry                           0                      
-system.physmem.numWrRetry                           0                      
-system.physmem.totGap                        32519500                      
-system.physmem.readPktSize::0                       0                      
-system.physmem.readPktSize::1                       0                      
-system.physmem.readPktSize::2                       0                      
-system.physmem.readPktSize::3                       0                      
-system.physmem.readPktSize::4                       0                      
-system.physmem.readPktSize::5                       0                      
-system.physmem.readPktSize::6                     420                      
-system.physmem.writePktSize::0                      0                      
-system.physmem.writePktSize::1                      0                      
-system.physmem.writePktSize::2                      0                      
-system.physmem.writePktSize::3                      0                      
-system.physmem.writePktSize::4                      0                      
-system.physmem.writePktSize::5                      0                      
-system.physmem.writePktSize::6                      0                      
-system.physmem.rdQLenPdf::0                       342                      
-system.physmem.rdQLenPdf::1                        70                      
-system.physmem.rdQLenPdf::2                         8                      
-system.physmem.rdQLenPdf::3                         0                      
-system.physmem.rdQLenPdf::4                         0                      
-system.physmem.rdQLenPdf::5                         0                      
-system.physmem.rdQLenPdf::6                         0                      
-system.physmem.rdQLenPdf::7                         0                      
-system.physmem.rdQLenPdf::8                         0                      
-system.physmem.rdQLenPdf::9                         0                      
-system.physmem.rdQLenPdf::10                        0                      
-system.physmem.rdQLenPdf::11                        0                      
-system.physmem.rdQLenPdf::12                        0                      
-system.physmem.rdQLenPdf::13                        0                      
-system.physmem.rdQLenPdf::14                        0                      
-system.physmem.rdQLenPdf::15                        0                      
-system.physmem.rdQLenPdf::16                        0                      
-system.physmem.rdQLenPdf::17                        0                      
-system.physmem.rdQLenPdf::18                        0                      
-system.physmem.rdQLenPdf::19                        0                      
-system.physmem.rdQLenPdf::20                        0                      
-system.physmem.rdQLenPdf::21                        0                      
-system.physmem.rdQLenPdf::22                        0                      
-system.physmem.rdQLenPdf::23                        0                      
-system.physmem.rdQLenPdf::24                        0                      
-system.physmem.rdQLenPdf::25                        0                      
-system.physmem.rdQLenPdf::26                        0                      
-system.physmem.rdQLenPdf::27                        0                      
-system.physmem.rdQLenPdf::28                        0                      
-system.physmem.rdQLenPdf::29                        0                      
-system.physmem.rdQLenPdf::30                        0                      
-system.physmem.rdQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::0                         0                      
-system.physmem.wrQLenPdf::1                         0                      
-system.physmem.wrQLenPdf::2                         0                      
-system.physmem.wrQLenPdf::3                         0                      
-system.physmem.wrQLenPdf::4                         0                      
-system.physmem.wrQLenPdf::5                         0                      
-system.physmem.wrQLenPdf::6                         0                      
-system.physmem.wrQLenPdf::7                         0                      
-system.physmem.wrQLenPdf::8                         0                      
-system.physmem.wrQLenPdf::9                         0                      
-system.physmem.wrQLenPdf::10                        0                      
-system.physmem.wrQLenPdf::11                        0                      
-system.physmem.wrQLenPdf::12                        0                      
-system.physmem.wrQLenPdf::13                        0                      
-system.physmem.wrQLenPdf::14                        0                      
-system.physmem.wrQLenPdf::15                        0                      
-system.physmem.wrQLenPdf::16                        0                      
-system.physmem.wrQLenPdf::17                        0                      
-system.physmem.wrQLenPdf::18                        0                      
-system.physmem.wrQLenPdf::19                        0                      
-system.physmem.wrQLenPdf::20                        0                      
-system.physmem.wrQLenPdf::21                        0                      
-system.physmem.wrQLenPdf::22                        0                      
-system.physmem.wrQLenPdf::23                        0                      
-system.physmem.wrQLenPdf::24                        0                      
-system.physmem.wrQLenPdf::25                        0                      
-system.physmem.wrQLenPdf::26                        0                      
-system.physmem.wrQLenPdf::27                        0                      
-system.physmem.wrQLenPdf::28                        0                      
-system.physmem.wrQLenPdf::29                        0                      
-system.physmem.wrQLenPdf::30                        0                      
-system.physmem.wrQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::32                        0                      
-system.physmem.wrQLenPdf::33                        0                      
-system.physmem.wrQLenPdf::34                        0                      
-system.physmem.wrQLenPdf::35                        0                      
-system.physmem.wrQLenPdf::36                        0                      
-system.physmem.wrQLenPdf::37                        0                      
-system.physmem.wrQLenPdf::38                        0                      
-system.physmem.wrQLenPdf::39                        0                      
-system.physmem.wrQLenPdf::40                        0                      
-system.physmem.wrQLenPdf::41                        0                      
-system.physmem.wrQLenPdf::42                        0                      
-system.physmem.wrQLenPdf::43                        0                      
-system.physmem.wrQLenPdf::44                        0                      
-system.physmem.wrQLenPdf::45                        0                      
-system.physmem.wrQLenPdf::46                        0                      
-system.physmem.wrQLenPdf::47                        0                      
-system.physmem.wrQLenPdf::48                        0                      
-system.physmem.wrQLenPdf::49                        0                      
-system.physmem.wrQLenPdf::50                        0                      
-system.physmem.wrQLenPdf::51                        0                      
-system.physmem.wrQLenPdf::52                        0                      
-system.physmem.wrQLenPdf::53                        0                      
-system.physmem.wrQLenPdf::54                        0                      
-system.physmem.wrQLenPdf::55                        0                      
-system.physmem.wrQLenPdf::56                        0                      
-system.physmem.wrQLenPdf::57                        0                      
-system.physmem.wrQLenPdf::58                        0                      
-system.physmem.wrQLenPdf::59                        0                      
-system.physmem.wrQLenPdf::60                        0                      
-system.physmem.wrQLenPdf::61                        0                      
-system.physmem.wrQLenPdf::62                        0                      
-system.physmem.wrQLenPdf::63                        0                      
-system.physmem.bytesPerActivate::samples           70                      
-system.physmem.bytesPerActivate::mean      373.942857                      
-system.physmem.bytesPerActivate::gmean     254.068407                      
-system.physmem.bytesPerActivate::stdev     318.910277                      
-system.physmem.bytesPerActivate::0-127             13     18.57%     18.57%
-system.physmem.bytesPerActivate::128-255           19     27.14%     45.71%
-system.physmem.bytesPerActivate::256-383           11     15.71%     61.43%
-system.physmem.bytesPerActivate::384-511            8     11.43%     72.86%
-system.physmem.bytesPerActivate::512-639            3      4.29%     77.14%
-system.physmem.bytesPerActivate::640-767            2      2.86%     80.00%
-system.physmem.bytesPerActivate::768-895            5      7.14%     87.14%
-system.physmem.bytesPerActivate::896-1023            2      2.86%     90.00%
-system.physmem.bytesPerActivate::1024-1151            7     10.00%    100.00%
-system.physmem.bytesPerActivate::total             70                      
-system.physmem.totQLat                        5148000                      
-system.physmem.totMemAccLat                  13023000                      
-system.physmem.totBusLat                      2100000                      
-system.physmem.avgQLat                       12257.14                      
-system.physmem.avgBusLat                      5000.00                      
-system.physmem.avgMemAccLat                  31007.14                      
-system.physmem.avgRdBW                         824.10                      
-system.physmem.avgWrBW                           0.00                      
-system.physmem.avgRdBWSys                      824.10                      
-system.physmem.avgWrBWSys                        0.00                      
-system.physmem.peakBW                        12800.00                      
-system.physmem.busUtil                           6.44                      
-system.physmem.busUtilRead                       6.44                      
-system.physmem.busUtilWrite                      0.00                      
-system.physmem.avgRdQLen                         1.23                      
-system.physmem.avgWrQLen                         0.00                      
-system.physmem.readRowHits                        346                      
-system.physmem.writeRowHits                         0                      
-system.physmem.readRowHitRate                   82.38                      
-system.physmem.writeRowHitRate                    nan                      
-system.physmem.avgGap                        77427.38                      
-system.physmem.pageHitRate                      82.38                      
-system.physmem_0.actEnergy                     349860                      
-system.physmem_0.preEnergy                     174570                      
-system.physmem_0.readEnergy                   2256240                      
-system.physmem_0.writeEnergy                        0                      
-system.physmem_0.refreshEnergy           2458560.000000                      
-system.physmem_0.actBackEnergy                4399260                      
-system.physmem_0.preBackEnergy                  59520                      
-system.physmem_0.actPowerDownEnergy          10401930                      
-system.physmem_0.prePowerDownEnergy              1440                      
-system.physmem_0.selfRefreshEnergy                  0                      
-system.physmem_0.totalEnergy                 20101380                      
-system.physmem_0.averagePower              616.275926                      
-system.physmem_0.totalIdleTime               22764750                      
-system.physmem_0.memoryStateTime::IDLE          30000                      
-system.physmem_0.memoryStateTime::REF         1040000                      
-system.physmem_0.memoryStateTime::SREF              0                      
-system.physmem_0.memoryStateTime::PRE_PDN         3750                      
-system.physmem_0.memoryStateTime::ACT         8725000                      
-system.physmem_0.memoryStateTime::ACT_PDN     22818750                      
-system.physmem_1.actEnergy                     178500                      
-system.physmem_1.preEnergy                      91080                      
-system.physmem_1.readEnergy                    742560                      
-system.physmem_1.writeEnergy                        0                      
-system.physmem_1.refreshEnergy           2458560.000000                      
-system.physmem_1.actBackEnergy                1740780                      
-system.physmem_1.preBackEnergy                  96960                      
-system.physmem_1.actPowerDownEnergy          12060060                      
-system.physmem_1.prePowerDownEnergy            806400                      
-system.physmem_1.selfRefreshEnergy                  0                      
-system.physmem_1.totalEnergy                 18174900                      
-system.physmem_1.averagePower              557.213152                      
-system.physmem_1.totalIdleTime               28278000                      
-system.physmem_1.memoryStateTime::IDLE         141000                      
-system.physmem_1.memoryStateTime::REF         1040000                      
-system.physmem_1.memoryStateTime::SREF              0                      
-system.physmem_1.memoryStateTime::PRE_PDN      2099750                      
-system.physmem_1.memoryStateTime::ACT         2887500                      
-system.physmem_1.memoryStateTime::ACT_PDN     26449250                      
-system.pwrStateResidencyTicks::UNDEFINED     32617500                      
-system.cpu.branchPred.lookups                    1965                      
-system.cpu.branchPred.condPredicted              1175                      
-system.cpu.branchPred.condIncorrect               349                      
-system.cpu.branchPred.BTBLookups                 1668                      
-system.cpu.branchPred.BTBHits                     324                      
-system.cpu.branchPred.BTBCorrect                    0                      
-system.cpu.branchPred.BTBHitPct             19.424460                      
-system.cpu.branchPred.usedRAS                     220                      
-system.cpu.branchPred.RASInCorrect                 16                      
-system.cpu.branchPred.indirectLookups             137                      
-system.cpu.branchPred.indirectHits                  8                      
-system.cpu.branchPred.indirectMisses              129                      
-system.cpu.branchPredindirectMispredicted           63                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED     32617500                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_entries            0                      
-system.cpu.dstage2_mmu.stage2_tlb.align_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.domain_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.perms_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.hits              0                      
-system.cpu.dstage2_mmu.stage2_tlb.misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.accesses            0                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED     32617500                      
-system.cpu.dtb.walker.walks                         0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin::total            0                      
-system.cpu.dtb.inst_hits                            0                      
-system.cpu.dtb.inst_misses                          0                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.flush_tlb                            0                      
-system.cpu.dtb.flush_tlb_mva                        0                      
-system.cpu.dtb.flush_tlb_mva_asid                   0                      
-system.cpu.dtb.flush_tlb_asid                       0                      
-system.cpu.dtb.flush_entries                        0                      
-system.cpu.dtb.align_faults                         0                      
-system.cpu.dtb.prefetch_faults                      0                      
-system.cpu.dtb.domain_faults                        0                      
-system.cpu.dtb.perms_faults                         0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.inst_accesses                        0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED     32617500                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_hits            0                      
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-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva            0                      
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-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED     32617500                      
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-system.cpu.itb.walker.walkRequestOrigin::total            0                      
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-system.cpu.op_class_0::total                     5391                      
-system.cpu.tickCycles                           10712                      
-system.cpu.idleCycles                           54523                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     32617500                      
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-system.cpu.dcache.tags.total_refs                1918                      
-system.cpu.dcache.tags.sampled_refs               146                      
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-system.cpu.dcache.tags.occ_task_id_percent::1024     0.035645                      
-system.cpu.dcache.tags.tag_accesses              4334                      
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-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     32617500                      
-system.cpu.dcache.ReadReq_hits::cpu.data         1050                      
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-system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                      
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-system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                      
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-system.cpu.icache.overall_mshr_miss_latency::cpu.inst     25660000                      
-system.cpu.icache.overall_mshr_miss_latency::total     25660000                      
-system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst     0.140297                      
-system.cpu.icache.ReadReq_mshr_miss_rate::total     0.140297                      
-system.cpu.icache.demand_mshr_miss_rate::cpu.inst     0.140297                      
-system.cpu.icache.demand_mshr_miss_rate::total     0.140297                      
-system.cpu.icache.overall_mshr_miss_rate::cpu.inst     0.140297                      
-system.cpu.icache.overall_mshr_miss_rate::total     0.140297                      
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 79937.694704                      
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 79937.694704                      
-system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 79937.694704                      
-system.cpu.icache.demand_avg_mshr_miss_latency::total 79937.694704                      
-system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 79937.694704                      
-system.cpu.icache.overall_avg_mshr_miss_latency::total 79937.694704                      
-system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED     32617500                      
-system.cpu.l2cache.tags.replacements                0                      
-system.cpu.l2cache.tags.tagsinuse          223.784324                      
-system.cpu.l2cache.tags.total_refs                 42                      
-system.cpu.l2cache.tags.sampled_refs              420                      
-system.cpu.l2cache.tags.avg_refs             0.100000                      
-system.cpu.l2cache.tags.warmup_cycle                0                      
-system.cpu.l2cache.tags.occ_blocks::cpu.inst   154.947993                      
-system.cpu.l2cache.tags.occ_blocks::cpu.data    68.836332                      
-system.cpu.l2cache.tags.occ_percent::cpu.inst     0.004729                      
-system.cpu.l2cache.tags.occ_percent::cpu.data     0.002101                      
-system.cpu.l2cache.tags.occ_percent::total     0.006829                      
-system.cpu.l2cache.tags.occ_task_id_blocks::1024          420                      
-system.cpu.l2cache.tags.age_task_id_blocks_1024::0          113                      
-system.cpu.l2cache.tags.age_task_id_blocks_1024::1          307                      
-system.cpu.l2cache.tags.occ_task_id_percent::1024     0.012817                      
-system.cpu.l2cache.tags.tag_accesses             4180                      
-system.cpu.l2cache.tags.data_accesses            4180                      
-system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED     32617500                      
-system.cpu.l2cache.WritebackClean_hits::writebacks            3                      
-system.cpu.l2cache.WritebackClean_hits::total            3                      
-system.cpu.l2cache.ReadCleanReq_hits::cpu.inst           17                      
-system.cpu.l2cache.ReadCleanReq_hits::total           17                      
-system.cpu.l2cache.ReadSharedReq_hits::cpu.data           22                      
-system.cpu.l2cache.ReadSharedReq_hits::total           22                      
-system.cpu.l2cache.demand_hits::cpu.inst           17                      
-system.cpu.l2cache.demand_hits::cpu.data           22                      
-system.cpu.l2cache.demand_hits::total              39                      
-system.cpu.l2cache.overall_hits::cpu.inst           17                      
-system.cpu.l2cache.overall_hits::cpu.data           22                      
-system.cpu.l2cache.overall_hits::total             39                      
-system.cpu.l2cache.ReadExReq_misses::cpu.data           43                      
-system.cpu.l2cache.ReadExReq_misses::total           43                      
-system.cpu.l2cache.ReadCleanReq_misses::cpu.inst          304                      
-system.cpu.l2cache.ReadCleanReq_misses::total          304                      
-system.cpu.l2cache.ReadSharedReq_misses::cpu.data           81                      
-system.cpu.l2cache.ReadSharedReq_misses::total           81                      
-system.cpu.l2cache.demand_misses::cpu.inst          304                      
-system.cpu.l2cache.demand_misses::cpu.data          124                      
-system.cpu.l2cache.demand_misses::total           428                      
-system.cpu.l2cache.overall_misses::cpu.inst          304                      
-system.cpu.l2cache.overall_misses::cpu.data          124                      
-system.cpu.l2cache.overall_misses::total          428                      
-system.cpu.l2cache.ReadExReq_miss_latency::cpu.data      3423500                      
-system.cpu.l2cache.ReadExReq_miss_latency::total      3423500                      
-system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst     24983000                      
-system.cpu.l2cache.ReadCleanReq_miss_latency::total     24983000                      
-system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data      6647000                      
-system.cpu.l2cache.ReadSharedReq_miss_latency::total      6647000                      
-system.cpu.l2cache.demand_miss_latency::cpu.inst     24983000                      
-system.cpu.l2cache.demand_miss_latency::cpu.data     10070500                      
-system.cpu.l2cache.demand_miss_latency::total     35053500                      
-system.cpu.l2cache.overall_miss_latency::cpu.inst     24983000                      
-system.cpu.l2cache.overall_miss_latency::cpu.data     10070500                      
-system.cpu.l2cache.overall_miss_latency::total     35053500                      
-system.cpu.l2cache.WritebackClean_accesses::writebacks            3                      
-system.cpu.l2cache.WritebackClean_accesses::total            3                      
-system.cpu.l2cache.ReadExReq_accesses::cpu.data           43                      
-system.cpu.l2cache.ReadExReq_accesses::total           43                      
-system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst          321                      
-system.cpu.l2cache.ReadCleanReq_accesses::total          321                      
-system.cpu.l2cache.ReadSharedReq_accesses::cpu.data          103                      
-system.cpu.l2cache.ReadSharedReq_accesses::total          103                      
-system.cpu.l2cache.demand_accesses::cpu.inst          321                      
-system.cpu.l2cache.demand_accesses::cpu.data          146                      
-system.cpu.l2cache.demand_accesses::total          467                      
-system.cpu.l2cache.overall_accesses::cpu.inst          321                      
-system.cpu.l2cache.overall_accesses::cpu.data          146                      
-system.cpu.l2cache.overall_accesses::total          467                      
-system.cpu.l2cache.ReadExReq_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.947040                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.947040                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data     0.786408                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::total     0.786408                      
-system.cpu.l2cache.demand_miss_rate::cpu.inst     0.947040                      
-system.cpu.l2cache.demand_miss_rate::cpu.data     0.849315                      
-system.cpu.l2cache.demand_miss_rate::total     0.916488                      
-system.cpu.l2cache.overall_miss_rate::cpu.inst     0.947040                      
-system.cpu.l2cache.overall_miss_rate::cpu.data     0.849315                      
-system.cpu.l2cache.overall_miss_rate::total     0.916488                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 79616.279070                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::total 79616.279070                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 82180.921053                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 82180.921053                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 82061.728395                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 82061.728395                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 82180.921053                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.data 81213.709677                      
-system.cpu.l2cache.demand_avg_miss_latency::total 81900.700935                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 82180.921053                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data 81213.709677                      
-system.cpu.l2cache.overall_avg_miss_latency::total 81900.700935                      
-system.cpu.l2cache.blocked_cycles::no_mshrs            0                      
-system.cpu.l2cache.blocked_cycles::no_targets            0                      
-system.cpu.l2cache.blocked::no_mshrs                0                      
-system.cpu.l2cache.blocked::no_targets              0                      
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.l2cache.ReadSharedReq_mshr_hits::cpu.data            8                      
-system.cpu.l2cache.ReadSharedReq_mshr_hits::total            8                      
-system.cpu.l2cache.demand_mshr_hits::cpu.data            8                      
-system.cpu.l2cache.demand_mshr_hits::total            8                      
-system.cpu.l2cache.overall_mshr_hits::cpu.data            8                      
-system.cpu.l2cache.overall_mshr_hits::total            8                      
-system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data           43                      
-system.cpu.l2cache.ReadExReq_mshr_misses::total           43                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst          304                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::total          304                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data           73                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::total           73                      
-system.cpu.l2cache.demand_mshr_misses::cpu.inst          304                      
-system.cpu.l2cache.demand_mshr_misses::cpu.data          116                      
-system.cpu.l2cache.demand_mshr_misses::total          420                      
-system.cpu.l2cache.overall_mshr_misses::cpu.inst          304                      
-system.cpu.l2cache.overall_mshr_misses::cpu.data          116                      
-system.cpu.l2cache.overall_mshr_misses::total          420                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data      2993500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total      2993500                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst     21943000                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total     21943000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data      5321000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      5321000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     21943000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data      8314500                      
-system.cpu.l2cache.demand_mshr_miss_latency::total     30257500                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     21943000                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data      8314500                      
-system.cpu.l2cache.overall_mshr_miss_latency::total     30257500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.947040                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.947040                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data     0.708738                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total     0.708738                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.947040                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data     0.794521                      
-system.cpu.l2cache.demand_mshr_miss_rate::total     0.899358                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.947040                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data     0.794521                      
-system.cpu.l2cache.overall_mshr_miss_rate::total     0.899358                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 69616.279070                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 69616.279070                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 72180.921053                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 72180.921053                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 72890.410959                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 72890.410959                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 72180.921053                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 71676.724138                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 72041.666667                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 72180.921053                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 71676.724138                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 72041.666667                      
-system.cpu.toL2Bus.snoop_filter.tot_requests          471                      
-system.cpu.toL2Bus.snoop_filter.hit_single_requests           50                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            1                      
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     32617500                      
-system.cpu.toL2Bus.trans_dist::ReadResp           424                      
-system.cpu.toL2Bus.trans_dist::WritebackClean            4                      
-system.cpu.toL2Bus.trans_dist::ReadExReq           43                      
-system.cpu.toL2Bus.trans_dist::ReadExResp           43                      
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          321                      
-system.cpu.toL2Bus.trans_dist::ReadSharedReq          103                      
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          646                      
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          292                      
-system.cpu.toL2Bus.pkt_count::total               938                      
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        20800                      
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         9344                      
-system.cpu.toL2Bus.pkt_size::total              30144                      
-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples          467                      
-system.cpu.toL2Bus.snoop_fanout::mean        0.100642                      
-system.cpu.toL2Bus.snoop_fanout::stdev       0.301177                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0                420     89.94%     89.94%
-system.cpu.toL2Bus.snoop_fanout::1                 47     10.06%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            1                      
-system.cpu.toL2Bus.snoop_fanout::total            467                      
-system.cpu.toL2Bus.reqLayer0.occupancy         239500                      
-system.cpu.toL2Bus.reqLayer0.utilization          0.7                      
-system.cpu.toL2Bus.respLayer0.occupancy        481500                      
-system.cpu.toL2Bus.respLayer0.utilization          1.5                      
-system.cpu.toL2Bus.respLayer1.occupancy        222992                      
-system.cpu.toL2Bus.respLayer1.utilization          0.7                      
-system.membus.snoop_filter.tot_requests           420                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED     32617500                      
-system.membus.trans_dist::ReadResp                377                      
-system.membus.trans_dist::ReadExReq                43                      
-system.membus.trans_dist::ReadExResp               43                      
-system.membus.trans_dist::ReadSharedReq           377                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          840                      
-system.membus.pkt_count::total                    840                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        26880                      
-system.membus.pkt_size::total                   26880                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples               420                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                     420    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                 420                      
-system.membus.reqLayer0.occupancy              489000                      
-system.membus.reqLayer0.utilization               1.5                      
-system.membus.respLayer1.occupancy            2233000                      
-system.membus.respLayer1.utilization              6.8                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini
deleted file mode 100644 (file)
index 64046a0..0000000
+++ /dev/null
@@ -1,1165 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=DerivO3CPU
-children=branchPred checker dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
-LFSTSize=1024
-LQEntries=32
-LSQCheckLoads=true
-LSQDepCheckShift=4
-SQEntries=32
-SSITSize=1024
-activity=0
-backComSize=5
-branchPred=system.cpu.branchPred
-cacheStorePorts=200
-checker=system.cpu.checker
-clk_domain=system.cpu_clk_domain
-commitToDecodeDelay=1
-commitToFetchDelay=1
-commitToIEWDelay=1
-commitToRenameDelay=1
-commitWidth=8
-cpu_id=0
-decodeToFetchDelay=1
-decodeToRenameDelay=1
-decodeWidth=8
-default_p_state=UNDEFINED
-dispatchWidth=8
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dstage2_mmu=system.cpu.dstage2_mmu
-dtb=system.cpu.dtb
-eventq_index=0
-fetchBufferSize=64
-fetchQueueSize=32
-fetchToDecodeDelay=1
-fetchTrapLatency=1
-fetchWidth=8
-forwardComSize=5
-fuPool=system.cpu.fuPool
-function_trace=false
-function_trace_start=0
-iewToCommitDelay=1
-iewToDecodeDelay=1
-iewToFetchDelay=1
-iewToRenameDelay=1
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-issueToExecuteDelay=1
-issueWidth=8
-istage2_mmu=system.cpu.istage2_mmu
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-needsTSO=false
-numIQEntries=64
-numPhysCCRegs=1280
-numPhysFloatRegs=256
-numPhysIntRegs=256
-numROBEntries=192
-numRobs=1
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-renameToDecodeDelay=1
-renameToFetchDelay=1
-renameToIEWDelay=2
-renameToROBDelay=1
-renameWidth=8
-simpoint_start_insts=
-smtCommitPolicy=RoundRobin
-smtFetchPolicy=SingleThread
-smtIQPolicy=Partitioned
-smtIQThreshold=100
-smtLSQPolicy=Partitioned
-smtLSQThreshold=100
-smtNumFetchingThreads=1
-smtROBPolicy=Partitioned
-smtROBThreshold=100
-socket_id=0
-squashWidth=8
-store_set_clear_period=250000
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-trapLatency=13
-wbWidth=8
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu.checker]
-type=O3Checker
-children=dstage2_mmu dtb isa istage2_mmu itb tracer
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dstage2_mmu=system.cpu.checker.dstage2_mmu
-dtb=system.cpu.checker.dtb
-eventq_index=0
-exitOnError=false
-function_trace=false
-function_trace_start=0
-interrupts=
-isa=system.cpu.checker.isa
-istage2_mmu=system.cpu.checker.istage2_mmu
-itb=system.cpu.checker.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.checker.tracer
-updateOnError=true
-warnOnlyOnLoadError=true
-workload=system.cpu.workload
-
-[system.cpu.checker.dstage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.checker.dtb
-
-[system.cpu.checker.dstage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.checker.dstage2_mmu.stage2_tlb.walker
-
-[system.cpu.checker.dstage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.checker.dtb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.checker.dtb.walker
-
-[system.cpu.checker.dtb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[5]
-
-[system.cpu.checker.isa]
-type=ArmISA
-decoderFlavour=Generic
-eventq_index=0
-fpsid=1090793632
-id_aa64afr0_el1=0
-id_aa64afr1_el1=0
-id_aa64dfr0_el1=1052678
-id_aa64dfr1_el1=0
-id_aa64isar0_el1=0
-id_aa64isar1_el1=0
-id_aa64mmfr0_el1=15728642
-id_aa64mmfr1_el1=0
-id_isar0=34607377
-id_isar1=34677009
-id_isar2=555950401
-id_isar3=17899825
-id_isar4=268501314
-id_isar5=0
-id_mmfr0=270536963
-id_mmfr1=0
-id_mmfr2=19070976
-id_mmfr3=34611729
-midr=1091551472
-pmu=Null
-system=system
-
-[system.cpu.checker.istage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.checker.itb
-
-[system.cpu.checker.istage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.checker.istage2_mmu.stage2_tlb.walker
-
-[system.cpu.checker.istage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.checker.itb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.checker.itb.walker
-
-[system.cpu.checker.itb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[4]
-
-[system.cpu.checker.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dstage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.dtb
-
-[system.cpu.dstage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.dstage2_mmu.stage2_tlb.walker
-
-[system.cpu.dstage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.dtb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[3]
-
-[system.cpu.fuPool]
-type=FUPool
-children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
-FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
-eventq_index=0
-
-[system.cpu.fuPool.FUList0]
-type=FUDesc
-children=opList
-count=6
-eventq_index=0
-opList=system.cpu.fuPool.FUList0.opList
-
-[system.cpu.fuPool.FUList0.opList]
-type=OpDesc
-eventq_index=0
-opClass=IntAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList1]
-type=FUDesc
-children=opList0 opList1
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
-
-[system.cpu.fuPool.FUList1.opList0]
-type=OpDesc
-eventq_index=0
-opClass=IntMult
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList1.opList1]
-type=OpDesc
-eventq_index=0
-opClass=IntDiv
-opLat=20
-pipelined=false
-
-[system.cpu.fuPool.FUList2]
-type=FUDesc
-children=opList0 opList1 opList2
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
-
-[system.cpu.fuPool.FUList2.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatAdd
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatCmp
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatCvt
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList3]
-type=FUDesc
-children=opList0 opList1 opList2 opList3 opList4
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 system.cpu.fuPool.FUList3.opList3 system.cpu.fuPool.FUList3.opList4
-
-[system.cpu.fuPool.FUList3.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatMult
-opLat=4
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMultAcc
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMisc
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatDiv
-opLat=12
-pipelined=false
-
-[system.cpu.fuPool.FUList3.opList4]
-type=OpDesc
-eventq_index=0
-opClass=FloatSqrt
-opLat=24
-pipelined=false
-
-[system.cpu.fuPool.FUList4]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList4.opList0 system.cpu.fuPool.FUList4.opList1
-
-[system.cpu.fuPool.FUList4.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5]
-type=FUDesc
-children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
-
-[system.cpu.fuPool.FUList5.opList00]
-type=OpDesc
-eventq_index=0
-opClass=SimdAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList01]
-type=OpDesc
-eventq_index=0
-opClass=SimdAddAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList02]
-type=OpDesc
-eventq_index=0
-opClass=SimdAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList03]
-type=OpDesc
-eventq_index=0
-opClass=SimdCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList04]
-type=OpDesc
-eventq_index=0
-opClass=SimdCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList05]
-type=OpDesc
-eventq_index=0
-opClass=SimdMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList06]
-type=OpDesc
-eventq_index=0
-opClass=SimdMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList07]
-type=OpDesc
-eventq_index=0
-opClass=SimdMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList08]
-type=OpDesc
-eventq_index=0
-opClass=SimdShift
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList09]
-type=OpDesc
-eventq_index=0
-opClass=SimdShiftAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList10]
-type=OpDesc
-eventq_index=0
-opClass=SimdSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList11]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList12]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList13]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList14]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList15]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatDiv
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList16]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList17]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList18]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList19]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1
-
-[system.cpu.fuPool.FUList6.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7]
-type=FUDesc
-children=opList0 opList1 opList2 opList3
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 system.cpu.fuPool.FUList7.opList2 system.cpu.fuPool.FUList7.opList3
-
-[system.cpu.fuPool.FUList7.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList1]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList8]
-type=FUDesc
-children=opList
-count=1
-eventq_index=0
-opList=system.cpu.fuPool.FUList8.opList
-
-[system.cpu.fuPool.FUList8.opList]
-type=OpDesc
-eventq_index=0
-opClass=IprAccess
-opLat=3
-pipelined=false
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=ArmInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=ArmISA
-decoderFlavour=Generic
-eventq_index=0
-fpsid=1090793632
-id_aa64afr0_el1=0
-id_aa64afr1_el1=0
-id_aa64dfr0_el1=1052678
-id_aa64dfr1_el1=0
-id_aa64isar0_el1=0
-id_aa64isar1_el1=0
-id_aa64mmfr0_el1=15728642
-id_aa64mmfr1_el1=0
-id_isar0=34607377
-id_isar1=34677009
-id_isar2=555950401
-id_isar3=17899825
-id_isar4=268501314
-id_isar5=0
-id_mmfr0=270536963
-id_mmfr1=0
-id_mmfr2=19070976
-id_mmfr3=34611729
-midr=1091551472
-pmu=Null
-system=system
-
-[system.cpu.istage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.itb
-
-[system.cpu.istage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.istage2_mmu.stage2_tlb.walker
-
-[system.cpu.istage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.itb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[2]
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-page_policy=open_adaptive
-power_model=Null
-range=0:134217727:0:0:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10000
-static_frontend_latency=10000
-tBURST=5000
-tCCD_L=0
-tCK=1250
-tCL=13750
-tCS=2500
-tRAS=35000
-tRCD=13750
-tREFI=7800000
-tRFC=260000
-tRP=13750
-tRRD=6000
-tRRD_L=0
-tRTP=7500
-tRTW=2500
-tWR=15000
-tWTR=7500
-tXAW=30000
-tXP=6000
-tXPDLL=0
-tXS=270000
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simerr b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simerr
deleted file mode 100755 (executable)
index 1f8287d..0000000
+++ /dev/null
@@ -1,5 +0,0 @@
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout
deleted file mode 100755 (executable)
index 122f716..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simout
-Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 17:55:48
-gem5 started Apr  3 2017 18:05:15
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 55322
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/arm/linux/o3-timing-checker
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 18517500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt
deleted file mode 100644 (file)
index 306010d..0000000
+++ /dev/null
@@ -1,1273 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000019                      
-sim_ticks                                    18517500                      
-final_tick                                   18517500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                  45460                      
-host_op_rate                                    53229                      
-host_tick_rate                              183240261                      
-host_mem_usage                                 280812                      
-host_seconds                                     0.10                      
-sim_insts                                        4592                      
-sim_ops                                          5378                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.physmem.bytes_read::cpu.inst             17600                      
-system.physmem.bytes_read::cpu.data              7744                      
-system.physmem.bytes_read::total                25344                      
-system.physmem.bytes_inst_read::cpu.inst        17600                      
-system.physmem.bytes_inst_read::total           17600                      
-system.physmem.num_reads::cpu.inst                275                      
-system.physmem.num_reads::cpu.data                121                      
-system.physmem.num_reads::total                   396                      
-system.physmem.bw_read::cpu.inst            950452275                      
-system.physmem.bw_read::cpu.data            418199001                      
-system.physmem.bw_read::total              1368651276                      
-system.physmem.bw_inst_read::cpu.inst       950452275                      
-system.physmem.bw_inst_read::total          950452275                      
-system.physmem.bw_total::cpu.inst           950452275                      
-system.physmem.bw_total::cpu.data           418199001                      
-system.physmem.bw_total::total             1368651276                      
-system.physmem.readReqs                           396                      
-system.physmem.writeReqs                            0                      
-system.physmem.readBursts                         396                      
-system.physmem.writeBursts                          0                      
-system.physmem.bytesReadDRAM                    25344                      
-system.physmem.bytesReadWrQ                         0                      
-system.physmem.bytesWritten                         0                      
-system.physmem.bytesReadSys                     25344                      
-system.physmem.bytesWrittenSys                      0                      
-system.physmem.servicedByWrQ                        0                      
-system.physmem.mergedWrBursts                       0                      
-system.physmem.neitherReadNorWriteReqs              0                      
-system.physmem.perBankRdBursts::0                  89                      
-system.physmem.perBankRdBursts::1                  45                      
-system.physmem.perBankRdBursts::2                  20                      
-system.physmem.perBankRdBursts::3                  43                      
-system.physmem.perBankRdBursts::4                  18                      
-system.physmem.perBankRdBursts::5                  32                      
-system.physmem.perBankRdBursts::6                  35                      
-system.physmem.perBankRdBursts::7                  10                      
-system.physmem.perBankRdBursts::8                   4                      
-system.physmem.perBankRdBursts::9                   8                      
-system.physmem.perBankRdBursts::10                 28                      
-system.physmem.perBankRdBursts::11                 42                      
-system.physmem.perBankRdBursts::12                 10                      
-system.physmem.perBankRdBursts::13                  6                      
-system.physmem.perBankRdBursts::14                  0                      
-system.physmem.perBankRdBursts::15                  6                      
-system.physmem.perBankWrBursts::0                   0                      
-system.physmem.perBankWrBursts::1                   0                      
-system.physmem.perBankWrBursts::2                   0                      
-system.physmem.perBankWrBursts::3                   0                      
-system.physmem.perBankWrBursts::4                   0                      
-system.physmem.perBankWrBursts::5                   0                      
-system.physmem.perBankWrBursts::6                   0                      
-system.physmem.perBankWrBursts::7                   0                      
-system.physmem.perBankWrBursts::8                   0                      
-system.physmem.perBankWrBursts::9                   0                      
-system.physmem.perBankWrBursts::10                  0                      
-system.physmem.perBankWrBursts::11                  0                      
-system.physmem.perBankWrBursts::12                  0                      
-system.physmem.perBankWrBursts::13                  0                      
-system.physmem.perBankWrBursts::14                  0                      
-system.physmem.perBankWrBursts::15                  0                      
-system.physmem.numRdRetry                           0                      
-system.physmem.numWrRetry                           0                      
-system.physmem.totGap                        18432000                      
-system.physmem.readPktSize::0                       0                      
-system.physmem.readPktSize::1                       0                      
-system.physmem.readPktSize::2                       0                      
-system.physmem.readPktSize::3                       0                      
-system.physmem.readPktSize::4                       0                      
-system.physmem.readPktSize::5                       0                      
-system.physmem.readPktSize::6                     396                      
-system.physmem.writePktSize::0                      0                      
-system.physmem.writePktSize::1                      0                      
-system.physmem.writePktSize::2                      0                      
-system.physmem.writePktSize::3                      0                      
-system.physmem.writePktSize::4                      0                      
-system.physmem.writePktSize::5                      0                      
-system.physmem.writePktSize::6                      0                      
-system.physmem.rdQLenPdf::0                       204                      
-system.physmem.rdQLenPdf::1                       121                      
-system.physmem.rdQLenPdf::2                        52                      
-system.physmem.rdQLenPdf::3                        14                      
-system.physmem.rdQLenPdf::4                         4                      
-system.physmem.rdQLenPdf::5                         1                      
-system.physmem.rdQLenPdf::6                         0                      
-system.physmem.rdQLenPdf::7                         0                      
-system.physmem.rdQLenPdf::8                         0                      
-system.physmem.rdQLenPdf::9                         0                      
-system.physmem.rdQLenPdf::10                        0                      
-system.physmem.rdQLenPdf::11                        0                      
-system.physmem.rdQLenPdf::12                        0                      
-system.physmem.rdQLenPdf::13                        0                      
-system.physmem.rdQLenPdf::14                        0                      
-system.physmem.rdQLenPdf::15                        0                      
-system.physmem.rdQLenPdf::16                        0                      
-system.physmem.rdQLenPdf::17                        0                      
-system.physmem.rdQLenPdf::18                        0                      
-system.physmem.rdQLenPdf::19                        0                      
-system.physmem.rdQLenPdf::20                        0                      
-system.physmem.rdQLenPdf::21                        0                      
-system.physmem.rdQLenPdf::22                        0                      
-system.physmem.rdQLenPdf::23                        0                      
-system.physmem.rdQLenPdf::24                        0                      
-system.physmem.rdQLenPdf::25                        0                      
-system.physmem.rdQLenPdf::26                        0                      
-system.physmem.rdQLenPdf::27                        0                      
-system.physmem.rdQLenPdf::28                        0                      
-system.physmem.rdQLenPdf::29                        0                      
-system.physmem.rdQLenPdf::30                        0                      
-system.physmem.rdQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::0                         0                      
-system.physmem.wrQLenPdf::1                         0                      
-system.physmem.wrQLenPdf::2                         0                      
-system.physmem.wrQLenPdf::3                         0                      
-system.physmem.wrQLenPdf::4                         0                      
-system.physmem.wrQLenPdf::5                         0                      
-system.physmem.wrQLenPdf::6                         0                      
-system.physmem.wrQLenPdf::7                         0                      
-system.physmem.wrQLenPdf::8                         0                      
-system.physmem.wrQLenPdf::9                         0                      
-system.physmem.wrQLenPdf::10                        0                      
-system.physmem.wrQLenPdf::11                        0                      
-system.physmem.wrQLenPdf::12                        0                      
-system.physmem.wrQLenPdf::13                        0                      
-system.physmem.wrQLenPdf::14                        0                      
-system.physmem.wrQLenPdf::15                        0                      
-system.physmem.wrQLenPdf::16                        0                      
-system.physmem.wrQLenPdf::17                        0                      
-system.physmem.wrQLenPdf::18                        0                      
-system.physmem.wrQLenPdf::19                        0                      
-system.physmem.wrQLenPdf::20                        0                      
-system.physmem.wrQLenPdf::21                        0                      
-system.physmem.wrQLenPdf::22                        0                      
-system.physmem.wrQLenPdf::23                        0                      
-system.physmem.wrQLenPdf::24                        0                      
-system.physmem.wrQLenPdf::25                        0                      
-system.physmem.wrQLenPdf::26                        0                      
-system.physmem.wrQLenPdf::27                        0                      
-system.physmem.wrQLenPdf::28                        0                      
-system.physmem.wrQLenPdf::29                        0                      
-system.physmem.wrQLenPdf::30                        0                      
-system.physmem.wrQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::32                        0                      
-system.physmem.wrQLenPdf::33                        0                      
-system.physmem.wrQLenPdf::34                        0                      
-system.physmem.wrQLenPdf::35                        0                      
-system.physmem.wrQLenPdf::36                        0                      
-system.physmem.wrQLenPdf::37                        0                      
-system.physmem.wrQLenPdf::38                        0                      
-system.physmem.wrQLenPdf::39                        0                      
-system.physmem.wrQLenPdf::40                        0                      
-system.physmem.wrQLenPdf::41                        0                      
-system.physmem.wrQLenPdf::42                        0                      
-system.physmem.wrQLenPdf::43                        0                      
-system.physmem.wrQLenPdf::44                        0                      
-system.physmem.wrQLenPdf::45                        0                      
-system.physmem.wrQLenPdf::46                        0                      
-system.physmem.wrQLenPdf::47                        0                      
-system.physmem.wrQLenPdf::48                        0                      
-system.physmem.wrQLenPdf::49                        0                      
-system.physmem.wrQLenPdf::50                        0                      
-system.physmem.wrQLenPdf::51                        0                      
-system.physmem.wrQLenPdf::52                        0                      
-system.physmem.wrQLenPdf::53                        0                      
-system.physmem.wrQLenPdf::54                        0                      
-system.physmem.wrQLenPdf::55                        0                      
-system.physmem.wrQLenPdf::56                        0                      
-system.physmem.wrQLenPdf::57                        0                      
-system.physmem.wrQLenPdf::58                        0                      
-system.physmem.wrQLenPdf::59                        0                      
-system.physmem.wrQLenPdf::60                        0                      
-system.physmem.wrQLenPdf::61                        0                      
-system.physmem.wrQLenPdf::62                        0                      
-system.physmem.wrQLenPdf::63                        0                      
-system.physmem.bytesPerActivate::samples           59                      
-system.physmem.bytesPerActivate::mean      406.779661                      
-system.physmem.bytesPerActivate::gmean     269.610222                      
-system.physmem.bytesPerActivate::stdev     346.645206                      
-system.physmem.bytesPerActivate::0-127             11     18.64%     18.64%
-system.physmem.bytesPerActivate::128-255           16     27.12%     45.76%
-system.physmem.bytesPerActivate::256-383            7     11.86%     57.63%
-system.physmem.bytesPerActivate::384-511            8     13.56%     71.19%
-system.physmem.bytesPerActivate::512-639            1      1.69%     72.88%
-system.physmem.bytesPerActivate::640-767            3      5.08%     77.97%
-system.physmem.bytesPerActivate::768-895            2      3.39%     81.36%
-system.physmem.bytesPerActivate::896-1023            2      3.39%     84.75%
-system.physmem.bytesPerActivate::1024-1151            9     15.25%    100.00%
-system.physmem.bytesPerActivate::total             59                      
-system.physmem.totQLat                        5212000                      
-system.physmem.totMemAccLat                  12637000                      
-system.physmem.totBusLat                      1980000                      
-system.physmem.avgQLat                       13161.62                      
-system.physmem.avgBusLat                      5000.00                      
-system.physmem.avgMemAccLat                  31911.62                      
-system.physmem.avgRdBW                        1368.65                      
-system.physmem.avgWrBW                           0.00                      
-system.physmem.avgRdBWSys                     1368.65                      
-system.physmem.avgWrBWSys                        0.00                      
-system.physmem.peakBW                        12800.00                      
-system.physmem.busUtil                          10.69                      
-system.physmem.busUtilRead                      10.69                      
-system.physmem.busUtilWrite                      0.00                      
-system.physmem.avgRdQLen                         1.87                      
-system.physmem.avgWrQLen                         0.00                      
-system.physmem.readRowHits                        329                      
-system.physmem.writeRowHits                         0                      
-system.physmem.readRowHitRate                   83.08                      
-system.physmem.writeRowHitRate                    nan                      
-system.physmem.avgGap                        46545.45                      
-system.physmem.pageHitRate                      83.08                      
-system.physmem_0.actEnergy                     314160                      
-system.physmem_0.preEnergy                     151800                      
-system.physmem_0.readEnergy                   2084880                      
-system.physmem_0.writeEnergy                        0                      
-system.physmem_0.refreshEnergy           1229280.000000                      
-system.physmem_0.actBackEnergy                3085980                      
-system.physmem_0.preBackEnergy                  37920                      
-system.physmem_0.actPowerDownEnergy           5290170                      
-system.physmem_0.prePowerDownEnergy             19200                      
-system.physmem_0.selfRefreshEnergy                  0                      
-system.physmem_0.totalEnergy                 12213390                      
-system.physmem_0.averagePower              659.559336                      
-system.physmem_0.totalIdleTime               11496500                      
-system.physmem_0.memoryStateTime::IDLE          29500                      
-system.physmem_0.memoryStateTime::REF          520000                      
-system.physmem_0.memoryStateTime::SREF              0                      
-system.physmem_0.memoryStateTime::PRE_PDN        49250                      
-system.physmem_0.memoryStateTime::ACT         6316250                      
-system.physmem_0.memoryStateTime::ACT_PDN     11602500                      
-system.physmem_1.actEnergy                     164220                      
-system.physmem_1.preEnergy                      72105                      
-system.physmem_1.readEnergy                    742560                      
-system.physmem_1.writeEnergy                        0                      
-system.physmem_1.refreshEnergy           1229280.000000                      
-system.physmem_1.actBackEnergy                1457490                      
-system.physmem_1.preBackEnergy                  66240                      
-system.physmem_1.actPowerDownEnergy           6092730                      
-system.physmem_1.prePowerDownEnergy            686400                      
-system.physmem_1.selfRefreshEnergy                  0                      
-system.physmem_1.totalEnergy                 10511025                      
-system.physmem_1.averagePower              567.626569                      
-system.physmem_1.totalIdleTime               15098500                      
-system.physmem_1.memoryStateTime::IDLE         116000                      
-system.physmem_1.memoryStateTime::REF          520000                      
-system.physmem_1.memoryStateTime::SREF              0                      
-system.physmem_1.memoryStateTime::PRE_PDN      1787250                      
-system.physmem_1.memoryStateTime::ACT         2733750                      
-system.physmem_1.memoryStateTime::ACT_PDN     13360500                      
-system.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.cpu.branchPred.lookups                    2820                      
-system.cpu.branchPred.condPredicted              1728                      
-system.cpu.branchPred.condIncorrect               468                      
-system.cpu.branchPred.BTBLookups                 2384                      
-system.cpu.branchPred.BTBHits                     844                      
-system.cpu.branchPred.BTBCorrect                    0                      
-system.cpu.branchPred.BTBHitPct             35.402685                      
-system.cpu.branchPred.usedRAS                     322                      
-system.cpu.branchPred.RASInCorrect                 70                      
-system.cpu.branchPred.indirectLookups             260                      
-system.cpu.branchPred.indirectHits                 13                      
-system.cpu.branchPred.indirectMisses              247                      
-system.cpu.branchPredindirectMispredicted           64                      
-system.cpu_clk_domain.clock                       500                      
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-system.cpu.checker.dtb.walker.walkRequestOrigin::total            0                      
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-system.cpu.checker.istage2_mmu.stage2_tlb.flush_tlb_asid            0                      
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-system.cpu.checker.istage2_mmu.stage2_tlb.prefetch_faults            0                      
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-system.cpu.checker.istage2_mmu.stage2_tlb.perms_faults            0                      
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-system.cpu.checker.itb.walker.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.cpu.checker.itb.walker.walks                 0                      
-system.cpu.checker.itb.walker.walkRequestOrigin_Requested::Data            0                      
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-system.cpu.checker.itb.flush_tlb_mva                0                      
-system.cpu.checker.itb.flush_tlb_mva_asid            0                      
-system.cpu.checker.itb.flush_tlb_asid               0                      
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-system.cpu.checker.itb.align_faults                 0                      
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-system.cpu.workload.numSyscalls                    13                      
-system.cpu.checker.pwrStateResidencyTicks::ON     18517500                      
-system.cpu.checker.numCycles                     5391                      
-system.cpu.checker.numWorkItemsStarted              0                      
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-system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
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-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_entries            0                      
-system.cpu.istage2_mmu.stage2_tlb.align_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.prefetch_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.domain_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.perms_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.hits              0                      
-system.cpu.istage2_mmu.stage2_tlb.misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.accesses            0                      
-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.cpu.itb.walker.walks                         0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.itb.walker.walkRequestOrigin::total            0                      
-system.cpu.itb.inst_hits                            0                      
-system.cpu.itb.inst_misses                          0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.flush_tlb                            0                      
-system.cpu.itb.flush_tlb_mva                        0                      
-system.cpu.itb.flush_tlb_mva_asid                   0                      
-system.cpu.itb.flush_tlb_asid                       0                      
-system.cpu.itb.flush_entries                        0                      
-system.cpu.itb.align_faults                         0                      
-system.cpu.itb.prefetch_faults                      0                      
-system.cpu.itb.domain_faults                        0                      
-system.cpu.itb.perms_faults                         0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.inst_accesses                        0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.pwrStateResidencyTicks::ON        18517500                      
-system.cpu.numCycles                            37036                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.fetch.icacheStallCycles               7733                      
-system.cpu.fetch.Insts                          12373                      
-system.cpu.fetch.Branches                        2820                      
-system.cpu.fetch.predictedBranches               1179                      
-system.cpu.fetch.Cycles                          5113                      
-system.cpu.fetch.SquashCycles                     984                      
-system.cpu.fetch.MiscStallCycles                    1                      
-system.cpu.fetch.PendingTrapStallCycles           260                      
-system.cpu.fetch.IcacheWaitRetryStallCycles           17                      
-system.cpu.fetch.CacheLines                      1982                      
-system.cpu.fetch.IcacheSquashes                   291                      
-system.cpu.fetch.rateDist::samples              13616                      
-system.cpu.fetch.rateDist::mean              1.093052                      
-system.cpu.fetch.rateDist::stdev             2.461769                      
-system.cpu.fetch.rateDist::underflows               0      0.00%      0.00%
-system.cpu.fetch.rateDist::0                    10916     80.17%     80.17%
-system.cpu.fetch.rateDist::1                      271      1.99%     82.16%
-system.cpu.fetch.rateDist::2                      182      1.34%     83.50%
-system.cpu.fetch.rateDist::3                      206      1.51%     85.01%
-system.cpu.fetch.rateDist::4                      259      1.90%     86.91%
-system.cpu.fetch.rateDist::5                      398      2.92%     89.84%
-system.cpu.fetch.rateDist::6                      138      1.01%     90.85%
-system.cpu.fetch.rateDist::7                      192      1.41%     92.26%
-system.cpu.fetch.rateDist::8                     1054      7.74%    100.00%
-system.cpu.fetch.rateDist::overflows                0      0.00%    100.00%
-system.cpu.fetch.rateDist::min_value                0                      
-system.cpu.fetch.rateDist::max_value                8                      
-system.cpu.fetch.rateDist::total                13616                      
-system.cpu.fetch.branchRate                  0.076142                      
-system.cpu.fetch.rate                        0.334080                      
-system.cpu.decode.IdleCycles                     6341                      
-system.cpu.decode.BlockedCycles                  4657                      
-system.cpu.decode.RunCycles                      2138                      
-system.cpu.decode.UnblockCycles                   142                      
-system.cpu.decode.SquashCycles                    338                      
-system.cpu.decode.BranchResolved                  909                      
-system.cpu.decode.BranchMispred                   160                      
-system.cpu.decode.DecodedInsts                  12250                      
-system.cpu.decode.SquashedInsts                   489                      
-system.cpu.rename.SquashCycles                    338                      
-system.cpu.rename.IdleCycles                     6573                      
-system.cpu.rename.BlockCycles                     835                      
-system.cpu.rename.serializeStallCycles           2470                      
-system.cpu.rename.RunCycles                      2036                      
-system.cpu.rename.UnblockCycles                  1364                      
-system.cpu.rename.RenamedInsts                  11552                      
-system.cpu.rename.ROBFullEvents                     4                      
-system.cpu.rename.IQFullEvents                    181                      
-system.cpu.rename.LQFullEvents                    144                      
-system.cpu.rename.SQFullEvents                   1170                      
-system.cpu.rename.RenamedOperands               11673                      
-system.cpu.rename.RenameLookups                 53030                      
-system.cpu.rename.int_rename_lookups            12530                      
-system.cpu.rename.fp_rename_lookups               199                      
-system.cpu.rename.CommittedMaps                  5494                      
-system.cpu.rename.UndoneMaps                     6179                      
-system.cpu.rename.serializingInsts                 40                      
-system.cpu.rename.tempSerializingInsts             34                      
-system.cpu.rename.skidInsts                       442                      
-system.cpu.memDep0.insertedLoads                 2293                      
-system.cpu.memDep0.insertedStores                1619                      
-system.cpu.memDep0.conflictingLoads                33                      
-system.cpu.memDep0.conflictingStores               22                      
-system.cpu.iq.iqInstsAdded                      10296                      
-system.cpu.iq.iqNonSpecInstsAdded                  44                      
-system.cpu.iq.iqInstsIssued                      8207                      
-system.cpu.iq.iqSquashedInstsIssued                43                      
-system.cpu.iq.iqSquashedInstsExamined            4961                      
-system.cpu.iq.iqSquashedOperandsExamined        12830                      
-system.cpu.iq.iqSquashedNonSpecRemoved              7                      
-system.cpu.iq.issued_per_cycle::samples         13616                      
-system.cpu.iq.issued_per_cycle::mean         0.602747                      
-system.cpu.iq.issued_per_cycle::stdev        1.340306                      
-system.cpu.iq.issued_per_cycle::underflows            0      0.00%      0.00%
-system.cpu.iq.issued_per_cycle::0               10392     76.32%     76.32%
-system.cpu.iq.issued_per_cycle::1                1145      8.41%     84.73%
-system.cpu.iq.issued_per_cycle::2                 762      5.60%     90.33%
-system.cpu.iq.issued_per_cycle::3                 485      3.56%     93.89%
-system.cpu.iq.issued_per_cycle::4                 356      2.61%     96.50%
-system.cpu.iq.issued_per_cycle::5                 278      2.04%     98.55%
-system.cpu.iq.issued_per_cycle::6                 127      0.93%     99.48%
-system.cpu.iq.issued_per_cycle::7                  61      0.45%     99.93%
-system.cpu.iq.issued_per_cycle::8                  10      0.07%    100.00%
-system.cpu.iq.issued_per_cycle::overflows            0      0.00%    100.00%
-system.cpu.iq.issued_per_cycle::min_value            0                      
-system.cpu.iq.issued_per_cycle::max_value            8                      
-system.cpu.iq.issued_per_cycle::total           13616                      
-system.cpu.iq.fu_full::No_OpClass                   0      0.00%      0.00%
-system.cpu.iq.fu_full::IntAlu                       9      5.42%      5.42%
-system.cpu.iq.fu_full::IntMult                      0      0.00%      5.42%
-system.cpu.iq.fu_full::IntDiv                       0      0.00%      5.42%
-system.cpu.iq.fu_full::FloatAdd                     0      0.00%      5.42%
-system.cpu.iq.fu_full::FloatCmp                     0      0.00%      5.42%
-system.cpu.iq.fu_full::FloatCvt                     0      0.00%      5.42%
-system.cpu.iq.fu_full::FloatMult                    0      0.00%      5.42%
-system.cpu.iq.fu_full::FloatMultAcc                 0      0.00%      5.42%
-system.cpu.iq.fu_full::FloatDiv                     0      0.00%      5.42%
-system.cpu.iq.fu_full::FloatMisc                    0      0.00%      5.42%
-system.cpu.iq.fu_full::FloatSqrt                    0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdAdd                      0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdAddAcc                   0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdAlu                      0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdCmp                      0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdCvt                      0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdMisc                     0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdMult                     0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdMultAcc                  0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdShift                    0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdShiftAcc                 0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdSqrt                     0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdFloatAdd                 0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdFloatAlu                 0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdFloatCmp                 0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdFloatCvt                 0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdFloatDiv                 0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdFloatMisc                0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdFloatMult                0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdFloatMultAcc             0      0.00%      5.42%
-system.cpu.iq.fu_full::SimdFloatSqrt                0      0.00%      5.42%
-system.cpu.iq.fu_full::MemRead                     83     50.00%     55.42%
-system.cpu.iq.fu_full::MemWrite                    61     36.75%     92.17%
-system.cpu.iq.fu_full::FloatMemRead                 0      0.00%     92.17%
-system.cpu.iq.fu_full::FloatMemWrite               13      7.83%    100.00%
-system.cpu.iq.fu_full::IprAccess                    0      0.00%    100.00%
-system.cpu.iq.fu_full::InstPrefetch                 0      0.00%    100.00%
-system.cpu.iq.FU_type_0::No_OpClass                 0      0.00%      0.00%
-system.cpu.iq.FU_type_0::IntAlu                  5024     61.22%     61.22%
-system.cpu.iq.FU_type_0::IntMult                    7      0.09%     61.30%
-system.cpu.iq.FU_type_0::IntDiv                     0      0.00%     61.30%
-system.cpu.iq.FU_type_0::FloatAdd                   0      0.00%     61.30%
-system.cpu.iq.FU_type_0::FloatCmp                   0      0.00%     61.30%
-system.cpu.iq.FU_type_0::FloatCvt                   0      0.00%     61.30%
-system.cpu.iq.FU_type_0::FloatMult                  0      0.00%     61.30%
-system.cpu.iq.FU_type_0::FloatMultAcc               0      0.00%     61.30%
-system.cpu.iq.FU_type_0::FloatDiv                   0      0.00%     61.30%
-system.cpu.iq.FU_type_0::FloatMisc                  0      0.00%     61.30%
-system.cpu.iq.FU_type_0::FloatSqrt                  0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdAdd                    0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdAddAcc                 0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdAlu                    0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdCmp                    0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdCvt                    0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdMisc                   0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdMult                   0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdMultAcc                0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdShift                  0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdShiftAcc               0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdSqrt                   0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdFloatAdd               0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdFloatAlu               0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdFloatCmp               0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdFloatCvt               0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdFloatDiv               0      0.00%     61.30%
-system.cpu.iq.FU_type_0::SimdFloatMisc              3      0.04%     61.34%
-system.cpu.iq.FU_type_0::SimdFloatMult              0      0.00%     61.34%
-system.cpu.iq.FU_type_0::SimdFloatMultAcc            0      0.00%     61.34%
-system.cpu.iq.FU_type_0::SimdFloatSqrt              0      0.00%     61.34%
-system.cpu.iq.FU_type_0::MemRead                 1962     23.91%     85.24%
-system.cpu.iq.FU_type_0::MemWrite                1178     14.35%     99.60%
-system.cpu.iq.FU_type_0::FloatMemRead               0      0.00%     99.60%
-system.cpu.iq.FU_type_0::FloatMemWrite             33      0.40%    100.00%
-system.cpu.iq.FU_type_0::IprAccess                  0      0.00%    100.00%
-system.cpu.iq.FU_type_0::InstPrefetch               0      0.00%    100.00%
-system.cpu.iq.FU_type_0::total                   8207                      
-system.cpu.iq.rate                           0.221595                      
-system.cpu.iq.fu_busy_cnt                         166                      
-system.cpu.iq.fu_busy_rate                   0.020227                      
-system.cpu.iq.int_inst_queue_reads              30145                      
-system.cpu.iq.int_inst_queue_writes             15188                      
-system.cpu.iq.int_inst_queue_wakeup_accesses         7438                      
-system.cpu.iq.fp_inst_queue_reads                  94                      
-system.cpu.iq.fp_inst_queue_writes                132                      
-system.cpu.iq.fp_inst_queue_wakeup_accesses           32                      
-system.cpu.iq.int_alu_accesses                   8327                      
-system.cpu.iq.fp_alu_accesses                      46                      
-system.cpu.iew.lsq.thread0.forwLoads               24                      
-system.cpu.iew.lsq.thread0.invAddrLoads             0                      
-system.cpu.iew.lsq.thread0.squashedLoads         1266                      
-system.cpu.iew.lsq.thread0.ignoredResponses            0                      
-system.cpu.iew.lsq.thread0.memOrderViolation           19                      
-system.cpu.iew.lsq.thread0.squashedStores          681                      
-system.cpu.iew.lsq.thread0.invAddrSwpfs             0                      
-system.cpu.iew.lsq.thread0.blockedLoads             0                      
-system.cpu.iew.lsq.thread0.rescheduledLoads           32                      
-system.cpu.iew.lsq.thread0.cacheBlocked             4                      
-system.cpu.iew.iewIdleCycles                        0                      
-system.cpu.iew.iewSquashCycles                    338                      
-system.cpu.iew.iewBlockCycles                     707                      
-system.cpu.iew.iewUnblockCycles                    17                      
-system.cpu.iew.iewDispatchedInsts               10349                      
-system.cpu.iew.iewDispSquashedInsts               128                      
-system.cpu.iew.iewDispLoadInsts                  2293                      
-system.cpu.iew.iewDispStoreInsts                 1619                      
-system.cpu.iew.iewDispNonSpecInsts                 32                      
-system.cpu.iew.iewIQFullEvents                     12                      
-system.cpu.iew.iewLSQFullEvents                     4                      
-system.cpu.iew.memOrderViolationEvents             19                      
-system.cpu.iew.predictedTakenIncorrect             93                      
-system.cpu.iew.predictedNotTakenIncorrect          267                      
-system.cpu.iew.branchMispredicts                  360                      
-system.cpu.iew.iewExecutedInsts                  7885                      
-system.cpu.iew.iewExecLoadInsts                  1840                      
-system.cpu.iew.iewExecSquashedInsts               322                      
-system.cpu.iew.exec_swp                             0                      
-system.cpu.iew.exec_nop                             9                      
-system.cpu.iew.exec_refs                         3007                      
-system.cpu.iew.exec_branches                     1490                      
-system.cpu.iew.exec_stores                       1167                      
-system.cpu.iew.exec_rate                     0.212901                      
-system.cpu.iew.wb_sent                           7581                      
-system.cpu.iew.wb_count                          7470                      
-system.cpu.iew.wb_producers                      3518                      
-system.cpu.iew.wb_consumers                      6872                      
-system.cpu.iew.wb_rate                       0.201696                      
-system.cpu.iew.wb_fanout                     0.511932                      
-system.cpu.commit.commitSquashedInsts            4970                      
-system.cpu.commit.commitNonSpecStalls              37                      
-system.cpu.commit.branchMispredicts               314                      
-system.cpu.commit.committed_per_cycle::samples        12743                      
-system.cpu.commit.committed_per_cycle::mean     0.422036                      
-system.cpu.commit.committed_per_cycle::stdev     1.264076                      
-system.cpu.commit.committed_per_cycle::underflows            0      0.00%      0.00%
-system.cpu.commit.committed_per_cycle::0        10698     83.95%     83.95%
-system.cpu.commit.committed_per_cycle::1          879      6.90%     90.85%
-system.cpu.commit.committed_per_cycle::2          416      3.26%     94.11%
-system.cpu.commit.committed_per_cycle::3          216      1.70%     95.81%
-system.cpu.commit.committed_per_cycle::4          111      0.87%     96.68%
-system.cpu.commit.committed_per_cycle::5          220      1.73%     98.41%
-system.cpu.commit.committed_per_cycle::6           55      0.43%     98.84%
-system.cpu.commit.committed_per_cycle::7           39      0.31%     99.14%
-system.cpu.commit.committed_per_cycle::8          109      0.86%    100.00%
-system.cpu.commit.committed_per_cycle::overflows            0      0.00%    100.00%
-system.cpu.commit.committed_per_cycle::min_value            0                      
-system.cpu.commit.committed_per_cycle::max_value            8                      
-system.cpu.commit.committed_per_cycle::total        12743                      
-system.cpu.commit.committedInsts                 4592                      
-system.cpu.commit.committedOps                   5378                      
-system.cpu.commit.swp_count                         0                      
-system.cpu.commit.refs                           1965                      
-system.cpu.commit.loads                          1027                      
-system.cpu.commit.membars                          12                      
-system.cpu.commit.branches                       1008                      
-system.cpu.commit.fp_insts                         16                      
-system.cpu.commit.int_insts                      4624                      
-system.cpu.commit.function_calls                   82                      
-system.cpu.commit.op_class_0::No_OpClass            0      0.00%      0.00%
-system.cpu.commit.op_class_0::IntAlu             3406     63.33%     63.33%
-system.cpu.commit.op_class_0::IntMult               4      0.07%     63.41%
-system.cpu.commit.op_class_0::IntDiv                0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatAdd              0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatCmp              0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatCvt              0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatMult             0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatMultAcc            0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatDiv              0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatMisc             0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatSqrt             0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdAdd               0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdAddAcc            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdAlu               0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdCmp               0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdCvt               0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdMisc              0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdMult              0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdMultAcc            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdShift             0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdShiftAcc            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdSqrt              0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatAdd            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatAlu            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatCmp            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatCvt            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatDiv            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatMisc            3      0.06%     63.46%
-system.cpu.commit.op_class_0::SimdFloatMult            0      0.00%     63.46%
-system.cpu.commit.op_class_0::SimdFloatMultAcc            0      0.00%     63.46%
-system.cpu.commit.op_class_0::SimdFloatSqrt            0      0.00%     63.46%
-system.cpu.commit.op_class_0::MemRead            1027     19.10%     82.56%
-system.cpu.commit.op_class_0::MemWrite            922     17.14%     99.70%
-system.cpu.commit.op_class_0::FloatMemRead            0      0.00%     99.70%
-system.cpu.commit.op_class_0::FloatMemWrite           16      0.30%    100.00%
-system.cpu.commit.op_class_0::IprAccess             0      0.00%    100.00%
-system.cpu.commit.op_class_0::InstPrefetch            0      0.00%    100.00%
-system.cpu.commit.op_class_0::total              5378                      
-system.cpu.commit.bw_lim_events                   109                      
-system.cpu.rob.rob_reads                        22825                      
-system.cpu.rob.rob_writes                       21579                      
-system.cpu.timesIdled                             193                      
-system.cpu.idleCycles                           23420                      
-system.cpu.committedInsts                        4592                      
-system.cpu.committedOps                          5378                      
-system.cpu.cpi                               8.065331                      
-system.cpu.cpi_total                         8.065331                      
-system.cpu.ipc                               0.123987                      
-system.cpu.ipc_total                         0.123987                      
-system.cpu.int_regfile_reads                     7779                      
-system.cpu.int_regfile_writes                    4297                      
-system.cpu.fp_regfile_reads                        32                      
-system.cpu.cc_regfile_reads                     28140                      
-system.cpu.cc_regfile_writes                     3276                      
-system.cpu.misc_regfile_reads                    3029                      
-system.cpu.misc_regfile_writes                     24                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.cpu.dcache.tags.replacements                 0                      
-system.cpu.dcache.tags.tagsinuse            87.889702                      
-system.cpu.dcache.tags.total_refs                2158                      
-system.cpu.dcache.tags.sampled_refs               147                      
-system.cpu.dcache.tags.avg_refs             14.680272                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data    87.889702                      
-system.cpu.dcache.tags.occ_percent::cpu.data     0.021457                      
-system.cpu.dcache.tags.occ_percent::total     0.021457                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024          147                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           55                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::1           92                      
-system.cpu.dcache.tags.occ_task_id_percent::1024     0.035889                      
-system.cpu.dcache.tags.tag_accesses              5471                      
-system.cpu.dcache.tags.data_accesses             5471                      
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.cpu.dcache.ReadReq_hits::cpu.data         1540                      
-system.cpu.dcache.ReadReq_hits::total            1540                      
-system.cpu.dcache.WriteReq_hits::cpu.data          597                      
-system.cpu.dcache.WriteReq_hits::total            597                      
-system.cpu.dcache.LoadLockedReq_hits::cpu.data           10                      
-system.cpu.dcache.LoadLockedReq_hits::total           10                      
-system.cpu.dcache.StoreCondReq_hits::cpu.data           11                      
-system.cpu.dcache.StoreCondReq_hits::total           11                      
-system.cpu.dcache.demand_hits::cpu.data          2137                      
-system.cpu.dcache.demand_hits::total             2137                      
-system.cpu.dcache.overall_hits::cpu.data         2137                      
-system.cpu.dcache.overall_hits::total            2137                      
-system.cpu.dcache.ReadReq_misses::cpu.data          186                      
-system.cpu.dcache.ReadReq_misses::total           186                      
-system.cpu.dcache.WriteReq_misses::cpu.data          316                      
-system.cpu.dcache.WriteReq_misses::total          316                      
-system.cpu.dcache.LoadLockedReq_misses::cpu.data            2                      
-system.cpu.dcache.LoadLockedReq_misses::total            2                      
-system.cpu.dcache.demand_misses::cpu.data          502                      
-system.cpu.dcache.demand_misses::total            502                      
-system.cpu.dcache.overall_misses::cpu.data          502                      
-system.cpu.dcache.overall_misses::total           502                      
-system.cpu.dcache.ReadReq_miss_latency::cpu.data     11381500                      
-system.cpu.dcache.ReadReq_miss_latency::total     11381500                      
-system.cpu.dcache.WriteReq_miss_latency::cpu.data     24478000                      
-system.cpu.dcache.WriteReq_miss_latency::total     24478000                      
-system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data       156000                      
-system.cpu.dcache.LoadLockedReq_miss_latency::total       156000                      
-system.cpu.dcache.demand_miss_latency::cpu.data     35859500                      
-system.cpu.dcache.demand_miss_latency::total     35859500                      
-system.cpu.dcache.overall_miss_latency::cpu.data     35859500                      
-system.cpu.dcache.overall_miss_latency::total     35859500                      
-system.cpu.dcache.ReadReq_accesses::cpu.data         1726                      
-system.cpu.dcache.ReadReq_accesses::total         1726                      
-system.cpu.dcache.WriteReq_accesses::cpu.data          913                      
-system.cpu.dcache.WriteReq_accesses::total          913                      
-system.cpu.dcache.LoadLockedReq_accesses::cpu.data           12                      
-system.cpu.dcache.LoadLockedReq_accesses::total           12                      
-system.cpu.dcache.StoreCondReq_accesses::cpu.data           11                      
-system.cpu.dcache.StoreCondReq_accesses::total           11                      
-system.cpu.dcache.demand_accesses::cpu.data         2639                      
-system.cpu.dcache.demand_accesses::total         2639                      
-system.cpu.dcache.overall_accesses::cpu.data         2639                      
-system.cpu.dcache.overall_accesses::total         2639                      
-system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.107764                      
-system.cpu.dcache.ReadReq_miss_rate::total     0.107764                      
-system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.346112                      
-system.cpu.dcache.WriteReq_miss_rate::total     0.346112                      
-system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data     0.166667                      
-system.cpu.dcache.LoadLockedReq_miss_rate::total     0.166667                      
-system.cpu.dcache.demand_miss_rate::cpu.data     0.190224                      
-system.cpu.dcache.demand_miss_rate::total     0.190224                      
-system.cpu.dcache.overall_miss_rate::cpu.data     0.190224                      
-system.cpu.dcache.overall_miss_rate::total     0.190224                      
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 61190.860215                      
-system.cpu.dcache.ReadReq_avg_miss_latency::total 61190.860215                      
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 77462.025316                      
-system.cpu.dcache.WriteReq_avg_miss_latency::total 77462.025316                      
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data        78000                      
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::total        78000                      
-system.cpu.dcache.demand_avg_miss_latency::cpu.data 71433.266932                      
-system.cpu.dcache.demand_avg_miss_latency::total 71433.266932                      
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 71433.266932                      
-system.cpu.dcache.overall_avg_miss_latency::total 71433.266932                      
-system.cpu.dcache.blocked_cycles::no_mshrs          159                      
-system.cpu.dcache.blocked_cycles::no_targets            0                      
-system.cpu.dcache.blocked::no_mshrs                 3                      
-system.cpu.dcache.blocked::no_targets               0                      
-system.cpu.dcache.avg_blocked_cycles::no_mshrs           53                      
-system.cpu.dcache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.dcache.ReadReq_mshr_hits::cpu.data           81                      
-system.cpu.dcache.ReadReq_mshr_hits::total           81                      
-system.cpu.dcache.WriteReq_mshr_hits::cpu.data          274                      
-system.cpu.dcache.WriteReq_mshr_hits::total          274                      
-system.cpu.dcache.LoadLockedReq_mshr_hits::cpu.data            2                      
-system.cpu.dcache.LoadLockedReq_mshr_hits::total            2                      
-system.cpu.dcache.demand_mshr_hits::cpu.data          355                      
-system.cpu.dcache.demand_mshr_hits::total          355                      
-system.cpu.dcache.overall_mshr_hits::cpu.data          355                      
-system.cpu.dcache.overall_mshr_hits::total          355                      
-system.cpu.dcache.ReadReq_mshr_misses::cpu.data          105                      
-system.cpu.dcache.ReadReq_mshr_misses::total          105                      
-system.cpu.dcache.WriteReq_mshr_misses::cpu.data           42                      
-system.cpu.dcache.WriteReq_mshr_misses::total           42                      
-system.cpu.dcache.demand_mshr_misses::cpu.data          147                      
-system.cpu.dcache.demand_mshr_misses::total          147                      
-system.cpu.dcache.overall_mshr_misses::cpu.data          147                      
-system.cpu.dcache.overall_mshr_misses::total          147                      
-system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data      7338000                      
-system.cpu.dcache.ReadReq_mshr_miss_latency::total      7338000                      
-system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data      3668000                      
-system.cpu.dcache.WriteReq_mshr_miss_latency::total      3668000                      
-system.cpu.dcache.demand_mshr_miss_latency::cpu.data     11006000                      
-system.cpu.dcache.demand_mshr_miss_latency::total     11006000                      
-system.cpu.dcache.overall_mshr_miss_latency::cpu.data     11006000                      
-system.cpu.dcache.overall_mshr_miss_latency::total     11006000                      
-system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.060834                      
-system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.060834                      
-system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.046002                      
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-system.cpu.dcache.demand_mshr_miss_rate::cpu.data     0.055703                      
-system.cpu.dcache.demand_mshr_miss_rate::total     0.055703                      
-system.cpu.dcache.overall_mshr_miss_rate::cpu.data     0.055703                      
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-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 69885.714286                      
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 69885.714286                      
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 87333.333333                      
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-system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 74870.748299                      
-system.cpu.dcache.demand_avg_mshr_miss_latency::total 74870.748299                      
-system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 74870.748299                      
-system.cpu.dcache.overall_avg_mshr_miss_latency::total 74870.748299                      
-system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.cpu.icache.tags.replacements                 2                      
-system.cpu.icache.tags.tagsinuse           148.671994                      
-system.cpu.icache.tags.total_refs                1587                      
-system.cpu.icache.tags.sampled_refs               293                      
-system.cpu.icache.tags.avg_refs              5.416382                      
-system.cpu.icache.tags.warmup_cycle                 0                      
-system.cpu.icache.tags.occ_blocks::cpu.inst   148.671994                      
-system.cpu.icache.tags.occ_percent::cpu.inst     0.072594                      
-system.cpu.icache.tags.occ_percent::total     0.072594                      
-system.cpu.icache.tags.occ_task_id_blocks::1024          291                      
-system.cpu.icache.tags.age_task_id_blocks_1024::0          160                      
-system.cpu.icache.tags.age_task_id_blocks_1024::1          131                      
-system.cpu.icache.tags.occ_task_id_percent::1024     0.142090                      
-system.cpu.icache.tags.tag_accesses              4257                      
-system.cpu.icache.tags.data_accesses             4257                      
-system.cpu.icache.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.cpu.icache.ReadReq_hits::cpu.inst         1587                      
-system.cpu.icache.ReadReq_hits::total            1587                      
-system.cpu.icache.demand_hits::cpu.inst          1587                      
-system.cpu.icache.demand_hits::total             1587                      
-system.cpu.icache.overall_hits::cpu.inst         1587                      
-system.cpu.icache.overall_hits::total            1587                      
-system.cpu.icache.ReadReq_misses::cpu.inst          395                      
-system.cpu.icache.ReadReq_misses::total           395                      
-system.cpu.icache.demand_misses::cpu.inst          395                      
-system.cpu.icache.demand_misses::total            395                      
-system.cpu.icache.overall_misses::cpu.inst          395                      
-system.cpu.icache.overall_misses::total           395                      
-system.cpu.icache.ReadReq_miss_latency::cpu.inst     29663500                      
-system.cpu.icache.ReadReq_miss_latency::total     29663500                      
-system.cpu.icache.demand_miss_latency::cpu.inst     29663500                      
-system.cpu.icache.demand_miss_latency::total     29663500                      
-system.cpu.icache.overall_miss_latency::cpu.inst     29663500                      
-system.cpu.icache.overall_miss_latency::total     29663500                      
-system.cpu.icache.ReadReq_accesses::cpu.inst         1982                      
-system.cpu.icache.ReadReq_accesses::total         1982                      
-system.cpu.icache.demand_accesses::cpu.inst         1982                      
-system.cpu.icache.demand_accesses::total         1982                      
-system.cpu.icache.overall_accesses::cpu.inst         1982                      
-system.cpu.icache.overall_accesses::total         1982                      
-system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.199294                      
-system.cpu.icache.ReadReq_miss_rate::total     0.199294                      
-system.cpu.icache.demand_miss_rate::cpu.inst     0.199294                      
-system.cpu.icache.demand_miss_rate::total     0.199294                      
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-system.cpu.icache.overall_miss_rate::total     0.199294                      
-system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 75097.468354                      
-system.cpu.icache.ReadReq_avg_miss_latency::total 75097.468354                      
-system.cpu.icache.demand_avg_miss_latency::cpu.inst 75097.468354                      
-system.cpu.icache.demand_avg_miss_latency::total 75097.468354                      
-system.cpu.icache.overall_avg_miss_latency::cpu.inst 75097.468354                      
-system.cpu.icache.overall_avg_miss_latency::total 75097.468354                      
-system.cpu.icache.blocked_cycles::no_mshrs          422                      
-system.cpu.icache.blocked_cycles::no_targets            0                      
-system.cpu.icache.blocked::no_mshrs                 4                      
-system.cpu.icache.blocked::no_targets               0                      
-system.cpu.icache.avg_blocked_cycles::no_mshrs   105.500000                      
-system.cpu.icache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.icache.writebacks::writebacks            2                      
-system.cpu.icache.writebacks::total                 2                      
-system.cpu.icache.ReadReq_mshr_hits::cpu.inst          102                      
-system.cpu.icache.ReadReq_mshr_hits::total          102                      
-system.cpu.icache.demand_mshr_hits::cpu.inst          102                      
-system.cpu.icache.demand_mshr_hits::total          102                      
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-system.cpu.icache.overall_mshr_hits::total          102                      
-system.cpu.icache.ReadReq_mshr_misses::cpu.inst          293                      
-system.cpu.icache.ReadReq_mshr_misses::total          293                      
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-system.cpu.icache.demand_mshr_misses::total          293                      
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-system.cpu.icache.overall_mshr_misses::total          293                      
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-system.cpu.icache.ReadReq_mshr_miss_latency::total     23439000                      
-system.cpu.icache.demand_mshr_miss_latency::cpu.inst     23439000                      
-system.cpu.icache.demand_mshr_miss_latency::total     23439000                      
-system.cpu.icache.overall_mshr_miss_latency::cpu.inst     23439000                      
-system.cpu.icache.overall_mshr_miss_latency::total     23439000                      
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-system.cpu.icache.ReadReq_mshr_miss_rate::total     0.147830                      
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-system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 79996.587031                      
-system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 79996.587031                      
-system.cpu.icache.demand_avg_mshr_miss_latency::total 79996.587031                      
-system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 79996.587031                      
-system.cpu.icache.overall_avg_mshr_miss_latency::total 79996.587031                      
-system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.cpu.l2cache.tags.replacements                0                      
-system.cpu.l2cache.tags.tagsinuse          213.492112                      
-system.cpu.l2cache.tags.total_refs                 39                      
-system.cpu.l2cache.tags.sampled_refs              396                      
-system.cpu.l2cache.tags.avg_refs             0.098485                      
-system.cpu.l2cache.tags.warmup_cycle                0                      
-system.cpu.l2cache.tags.occ_blocks::cpu.inst   139.462705                      
-system.cpu.l2cache.tags.occ_blocks::cpu.data    74.029407                      
-system.cpu.l2cache.tags.occ_percent::cpu.inst     0.004256                      
-system.cpu.l2cache.tags.occ_percent::cpu.data     0.002259                      
-system.cpu.l2cache.tags.occ_percent::total     0.006515                      
-system.cpu.l2cache.tags.occ_task_id_blocks::1024          396                      
-system.cpu.l2cache.tags.age_task_id_blocks_1024::0          194                      
-system.cpu.l2cache.tags.age_task_id_blocks_1024::1          202                      
-system.cpu.l2cache.tags.occ_task_id_percent::1024     0.012085                      
-system.cpu.l2cache.tags.tag_accesses             3924                      
-system.cpu.l2cache.tags.data_accesses            3924                      
-system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.cpu.l2cache.WritebackClean_hits::writebacks            1                      
-system.cpu.l2cache.WritebackClean_hits::total            1                      
-system.cpu.l2cache.ReadCleanReq_hits::cpu.inst           18                      
-system.cpu.l2cache.ReadCleanReq_hits::total           18                      
-system.cpu.l2cache.ReadSharedReq_hits::cpu.data           20                      
-system.cpu.l2cache.ReadSharedReq_hits::total           20                      
-system.cpu.l2cache.demand_hits::cpu.inst           18                      
-system.cpu.l2cache.demand_hits::cpu.data           20                      
-system.cpu.l2cache.demand_hits::total              38                      
-system.cpu.l2cache.overall_hits::cpu.inst           18                      
-system.cpu.l2cache.overall_hits::cpu.data           20                      
-system.cpu.l2cache.overall_hits::total             38                      
-system.cpu.l2cache.ReadExReq_misses::cpu.data           42                      
-system.cpu.l2cache.ReadExReq_misses::total           42                      
-system.cpu.l2cache.ReadCleanReq_misses::cpu.inst          275                      
-system.cpu.l2cache.ReadCleanReq_misses::total          275                      
-system.cpu.l2cache.ReadSharedReq_misses::cpu.data           85                      
-system.cpu.l2cache.ReadSharedReq_misses::total           85                      
-system.cpu.l2cache.demand_misses::cpu.inst          275                      
-system.cpu.l2cache.demand_misses::cpu.data          127                      
-system.cpu.l2cache.demand_misses::total           402                      
-system.cpu.l2cache.overall_misses::cpu.inst          275                      
-system.cpu.l2cache.overall_misses::cpu.data          127                      
-system.cpu.l2cache.overall_misses::total          402                      
-system.cpu.l2cache.ReadExReq_miss_latency::cpu.data      3603000                      
-system.cpu.l2cache.ReadExReq_miss_latency::total      3603000                      
-system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst     22791500                      
-system.cpu.l2cache.ReadCleanReq_miss_latency::total     22791500                      
-system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data      6943500                      
-system.cpu.l2cache.ReadSharedReq_miss_latency::total      6943500                      
-system.cpu.l2cache.demand_miss_latency::cpu.inst     22791500                      
-system.cpu.l2cache.demand_miss_latency::cpu.data     10546500                      
-system.cpu.l2cache.demand_miss_latency::total     33338000                      
-system.cpu.l2cache.overall_miss_latency::cpu.inst     22791500                      
-system.cpu.l2cache.overall_miss_latency::cpu.data     10546500                      
-system.cpu.l2cache.overall_miss_latency::total     33338000                      
-system.cpu.l2cache.WritebackClean_accesses::writebacks            1                      
-system.cpu.l2cache.WritebackClean_accesses::total            1                      
-system.cpu.l2cache.ReadExReq_accesses::cpu.data           42                      
-system.cpu.l2cache.ReadExReq_accesses::total           42                      
-system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst          293                      
-system.cpu.l2cache.ReadCleanReq_accesses::total          293                      
-system.cpu.l2cache.ReadSharedReq_accesses::cpu.data          105                      
-system.cpu.l2cache.ReadSharedReq_accesses::total          105                      
-system.cpu.l2cache.demand_accesses::cpu.inst          293                      
-system.cpu.l2cache.demand_accesses::cpu.data          147                      
-system.cpu.l2cache.demand_accesses::total          440                      
-system.cpu.l2cache.overall_accesses::cpu.inst          293                      
-system.cpu.l2cache.overall_accesses::cpu.data          147                      
-system.cpu.l2cache.overall_accesses::total          440                      
-system.cpu.l2cache.ReadExReq_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.938567                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.938567                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data     0.809524                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::total     0.809524                      
-system.cpu.l2cache.demand_miss_rate::cpu.inst     0.938567                      
-system.cpu.l2cache.demand_miss_rate::cpu.data     0.863946                      
-system.cpu.l2cache.demand_miss_rate::total     0.913636                      
-system.cpu.l2cache.overall_miss_rate::cpu.inst     0.938567                      
-system.cpu.l2cache.overall_miss_rate::cpu.data     0.863946                      
-system.cpu.l2cache.overall_miss_rate::total     0.913636                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 85785.714286                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::total 85785.714286                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 82878.181818                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 82878.181818                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 81688.235294                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 81688.235294                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 82878.181818                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.data 83043.307087                      
-system.cpu.l2cache.demand_avg_miss_latency::total 82930.348259                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 82878.181818                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data 83043.307087                      
-system.cpu.l2cache.overall_avg_miss_latency::total 82930.348259                      
-system.cpu.l2cache.blocked_cycles::no_mshrs            0                      
-system.cpu.l2cache.blocked_cycles::no_targets            0                      
-system.cpu.l2cache.blocked::no_mshrs                0                      
-system.cpu.l2cache.blocked::no_targets              0                      
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.l2cache.ReadSharedReq_mshr_hits::cpu.data            6                      
-system.cpu.l2cache.ReadSharedReq_mshr_hits::total            6                      
-system.cpu.l2cache.demand_mshr_hits::cpu.data            6                      
-system.cpu.l2cache.demand_mshr_hits::total            6                      
-system.cpu.l2cache.overall_mshr_hits::cpu.data            6                      
-system.cpu.l2cache.overall_mshr_hits::total            6                      
-system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data           42                      
-system.cpu.l2cache.ReadExReq_mshr_misses::total           42                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst          275                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::total          275                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data           79                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::total           79                      
-system.cpu.l2cache.demand_mshr_misses::cpu.inst          275                      
-system.cpu.l2cache.demand_mshr_misses::cpu.data          121                      
-system.cpu.l2cache.demand_mshr_misses::total          396                      
-system.cpu.l2cache.overall_mshr_misses::cpu.inst          275                      
-system.cpu.l2cache.overall_mshr_misses::cpu.data          121                      
-system.cpu.l2cache.overall_mshr_misses::total          396                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data      3183000                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total      3183000                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst     20041500                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total     20041500                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data      5712000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      5712000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     20041500                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data      8895000                      
-system.cpu.l2cache.demand_mshr_miss_latency::total     28936500                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     20041500                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data      8895000                      
-system.cpu.l2cache.overall_mshr_miss_latency::total     28936500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.938567                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.938567                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data     0.752381                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total     0.752381                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.938567                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data     0.823129                      
-system.cpu.l2cache.demand_mshr_miss_rate::total     0.900000                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.938567                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data     0.823129                      
-system.cpu.l2cache.overall_mshr_miss_rate::total     0.900000                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 75785.714286                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 75785.714286                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 72878.181818                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 72878.181818                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 72303.797468                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 72303.797468                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 72878.181818                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 73512.396694                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 73071.969697                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 72878.181818                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 73512.396694                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 73071.969697                      
-system.cpu.toL2Bus.snoop_filter.tot_requests          442                      
-system.cpu.toL2Bus.snoop_filter.hit_single_requests           45                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            1                      
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.cpu.toL2Bus.trans_dist::ReadResp           398                      
-system.cpu.toL2Bus.trans_dist::WritebackClean            2                      
-system.cpu.toL2Bus.trans_dist::ReadExReq           42                      
-system.cpu.toL2Bus.trans_dist::ReadExResp           42                      
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          293                      
-system.cpu.toL2Bus.trans_dist::ReadSharedReq          105                      
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          588                      
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          294                      
-system.cpu.toL2Bus.pkt_count::total               882                      
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        18880                      
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         9408                      
-system.cpu.toL2Bus.pkt_size::total              28288                      
-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples          440                      
-system.cpu.toL2Bus.snoop_fanout::mean        0.100000                      
-system.cpu.toL2Bus.snoop_fanout::stdev       0.300341                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0                396     90.00%     90.00%
-system.cpu.toL2Bus.snoop_fanout::1                 44     10.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            1                      
-system.cpu.toL2Bus.snoop_fanout::total            440                      
-system.cpu.toL2Bus.reqLayer0.occupancy         223000                      
-system.cpu.toL2Bus.reqLayer0.utilization          1.2                      
-system.cpu.toL2Bus.respLayer0.occupancy        439500                      
-system.cpu.toL2Bus.respLayer0.utilization          2.4                      
-system.cpu.toL2Bus.respLayer1.occupancy        223494                      
-system.cpu.toL2Bus.respLayer1.utilization          1.2                      
-system.membus.snoop_filter.tot_requests           396                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED     18517500                      
-system.membus.trans_dist::ReadResp                354                      
-system.membus.trans_dist::ReadExReq                42                      
-system.membus.trans_dist::ReadExResp               42                      
-system.membus.trans_dist::ReadSharedReq           354                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          792                      
-system.membus.pkt_count::total                    792                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        25344                      
-system.membus.pkt_size::total                   25344                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples               396                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                     396    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                 396                      
-system.membus.reqLayer0.occupancy              484000                      
-system.membus.reqLayer0.utilization               2.6                      
-system.membus.respLayer1.occupancy            2091500                      
-system.membus.respLayer1.utilization             11.3                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini
deleted file mode 100644 (file)
index 72771fa..0000000
+++ /dev/null
@@ -1,962 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=DerivO3CPU
-children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
-LFSTSize=1024
-LQEntries=16
-LSQCheckLoads=true
-LSQDepCheckShift=0
-SQEntries=16
-SSITSize=1024
-activity=0
-backComSize=5
-branchPred=system.cpu.branchPred
-cacheStorePorts=200
-checker=Null
-clk_domain=system.cpu_clk_domain
-commitToDecodeDelay=1
-commitToFetchDelay=1
-commitToIEWDelay=1
-commitToRenameDelay=1
-commitWidth=8
-cpu_id=0
-decodeToFetchDelay=1
-decodeToRenameDelay=2
-decodeWidth=3
-default_p_state=UNDEFINED
-dispatchWidth=6
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dstage2_mmu=system.cpu.dstage2_mmu
-dtb=system.cpu.dtb
-eventq_index=0
-fetchBufferSize=16
-fetchQueueSize=32
-fetchToDecodeDelay=3
-fetchTrapLatency=1
-fetchWidth=3
-forwardComSize=5
-fuPool=system.cpu.fuPool
-function_trace=false
-function_trace_start=0
-iewToCommitDelay=1
-iewToDecodeDelay=1
-iewToFetchDelay=1
-iewToRenameDelay=1
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-issueToExecuteDelay=1
-issueWidth=8
-istage2_mmu=system.cpu.istage2_mmu
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-needsTSO=false
-numIQEntries=32
-numPhysCCRegs=640
-numPhysFloatRegs=192
-numPhysIntRegs=128
-numROBEntries=40
-numRobs=1
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-renameToDecodeDelay=1
-renameToFetchDelay=1
-renameToIEWDelay=1
-renameToROBDelay=1
-renameWidth=3
-simpoint_start_insts=
-smtCommitPolicy=RoundRobin
-smtFetchPolicy=SingleThread
-smtIQPolicy=Partitioned
-smtIQThreshold=100
-smtLSQPolicy=Partitioned
-smtLSQThreshold=100
-smtNumFetchingThreads=1
-smtROBPolicy=Partitioned
-smtROBThreshold=100
-socket_id=0
-squashWidth=8
-store_set_clear_period=250000
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-trapLatency=13
-wbWidth=8
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.branchPred]
-type=BiModeBP
-BTBEntries=2048
-BTBTagSize=18
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-numThreads=1
-useIndirect=true
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=6
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=32768
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=8
-write_buffers=16
-writeback_clean=true
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=2
-
-[system.cpu.dstage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.dtb
-
-[system.cpu.dstage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.dstage2_mmu.stage2_tlb.walker
-
-[system.cpu.dstage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.dtb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[3]
-
-[system.cpu.fuPool]
-type=FUPool
-children=FUList0 FUList1 FUList2 FUList3 FUList4
-FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4
-eventq_index=0
-
-[system.cpu.fuPool.FUList0]
-type=FUDesc
-children=opList
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList0.opList
-
-[system.cpu.fuPool.FUList0.opList]
-type=OpDesc
-eventq_index=0
-opClass=IntAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList1]
-type=FUDesc
-children=opList0 opList1 opList2
-count=1
-eventq_index=0
-opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 system.cpu.fuPool.FUList1.opList2
-
-[system.cpu.fuPool.FUList1.opList0]
-type=OpDesc
-eventq_index=0
-opClass=IntMult
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList1.opList1]
-type=OpDesc
-eventq_index=0
-opClass=IntDiv
-opLat=12
-pipelined=false
-
-[system.cpu.fuPool.FUList1.opList2]
-type=OpDesc
-eventq_index=0
-opClass=IprAccess
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList2]
-type=FUDesc
-children=opList0 opList1
-count=1
-eventq_index=0
-opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1
-
-[system.cpu.fuPool.FUList2.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList3]
-type=FUDesc
-children=opList0 opList1
-count=1
-eventq_index=0
-opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1
-
-[system.cpu.fuPool.FUList3.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList4]
-type=FUDesc
-children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 opList26 opList27
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList4.opList00 system.cpu.fuPool.FUList4.opList01 system.cpu.fuPool.FUList4.opList02 system.cpu.fuPool.FUList4.opList03 system.cpu.fuPool.FUList4.opList04 system.cpu.fuPool.FUList4.opList05 system.cpu.fuPool.FUList4.opList06 system.cpu.fuPool.FUList4.opList07 system.cpu.fuPool.FUList4.opList08 system.cpu.fuPool.FUList4.opList09 system.cpu.fuPool.FUList4.opList10 system.cpu.fuPool.FUList4.opList11 system.cpu.fuPool.FUList4.opList12 system.cpu.fuPool.FUList4.opList13 system.cpu.fuPool.FUList4.opList14 system.cpu.fuPool.FUList4.opList15 system.cpu.fuPool.FUList4.opList16 system.cpu.fuPool.FUList4.opList17 system.cpu.fuPool.FUList4.opList18 system.cpu.fuPool.FUList4.opList19 system.cpu.fuPool.FUList4.opList20 system.cpu.fuPool.FUList4.opList21 system.cpu.fuPool.FUList4.opList22 system.cpu.fuPool.FUList4.opList23 system.cpu.fuPool.FUList4.opList24 system.cpu.fuPool.FUList4.opList25 system.cpu.fuPool.FUList4.opList26 system.cpu.fuPool.FUList4.opList27
-
-[system.cpu.fuPool.FUList4.opList00]
-type=OpDesc
-eventq_index=0
-opClass=SimdAdd
-opLat=4
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList01]
-type=OpDesc
-eventq_index=0
-opClass=SimdAddAcc
-opLat=4
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList02]
-type=OpDesc
-eventq_index=0
-opClass=SimdAlu
-opLat=4
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList03]
-type=OpDesc
-eventq_index=0
-opClass=SimdCmp
-opLat=4
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList04]
-type=OpDesc
-eventq_index=0
-opClass=SimdCvt
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList05]
-type=OpDesc
-eventq_index=0
-opClass=SimdMisc
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList06]
-type=OpDesc
-eventq_index=0
-opClass=SimdMult
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList07]
-type=OpDesc
-eventq_index=0
-opClass=SimdMultAcc
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList08]
-type=OpDesc
-eventq_index=0
-opClass=SimdShift
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList09]
-type=OpDesc
-eventq_index=0
-opClass=SimdShiftAcc
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList10]
-type=OpDesc
-eventq_index=0
-opClass=SimdSqrt
-opLat=9
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList11]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAdd
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList12]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAlu
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList13]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCmp
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList14]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCvt
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList15]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatDiv
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList16]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMisc
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList17]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMult
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList18]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMultAcc
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList19]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatSqrt
-opLat=9
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList20]
-type=OpDesc
-eventq_index=0
-opClass=FloatAdd
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList21]
-type=OpDesc
-eventq_index=0
-opClass=FloatCmp
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList22]
-type=OpDesc
-eventq_index=0
-opClass=FloatCvt
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList23]
-type=OpDesc
-eventq_index=0
-opClass=FloatDiv
-opLat=9
-pipelined=false
-
-[system.cpu.fuPool.FUList4.opList24]
-type=OpDesc
-eventq_index=0
-opClass=FloatSqrt
-opLat=33
-pipelined=false
-
-[system.cpu.fuPool.FUList4.opList25]
-type=OpDesc
-eventq_index=0
-opClass=FloatMult
-opLat=4
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList26]
-type=OpDesc
-eventq_index=0
-opClass=FloatMultAcc
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList27]
-type=OpDesc
-eventq_index=0
-opClass=FloatMisc
-opLat=3
-pipelined=true
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=1
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=1
-sequential_access=false
-size=32768
-system=system
-tag_latency=1
-tags=system.cpu.icache.tags
-tgts_per_mshr=8
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=1
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=32768
-tag_latency=1
-
-[system.cpu.interrupts]
-type=ArmInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=ArmISA
-decoderFlavour=Generic
-eventq_index=0
-fpsid=1090793632
-id_aa64afr0_el1=0
-id_aa64afr1_el1=0
-id_aa64dfr0_el1=1052678
-id_aa64dfr1_el1=0
-id_aa64isar0_el1=0
-id_aa64isar1_el1=0
-id_aa64mmfr0_el1=15728642
-id_aa64mmfr1_el1=0
-id_isar0=34607377
-id_isar1=34677009
-id_isar2=555950401
-id_isar3=17899825
-id_isar4=268501314
-id_isar5=0
-id_mmfr0=270536963
-id_mmfr1=0
-id_mmfr2=19070976
-id_mmfr3=34611729
-midr=1091551472
-pmu=Null
-system=system
-
-[system.cpu.istage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.itb
-
-[system.cpu.istage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.istage2_mmu.stage2_tlb.walker
-
-[system.cpu.istage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.itb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[2]
-
-[system.cpu.l2cache]
-type=Cache
-children=prefetcher tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=16
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_excl
-data_latency=12
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=true
-prefetcher=system.cpu.l2cache.prefetcher
-response_latency=12
-sequential_access=false
-size=1048576
-system=system
-tag_latency=12
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=8
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.prefetcher]
-type=StridePrefetcher
-cache_snoop=false
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-degree=8
-eventq_index=0
-latency=1
-max_conf=7
-min_conf=0
-on_data=true
-on_inst=true
-on_miss=false
-on_read=true
-on_write=true
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-queue_filter=true
-queue_size=32
-queue_squash=true
-start_conf=4
-sys=system
-table_assoc=4
-table_sets=16
-tag_prefetch=true
-thresh_conf=4
-use_master_id=true
-
-[system.cpu.l2cache.tags]
-type=RandomRepl
-assoc=16
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=12
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=1048576
-tag_latency=12
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-page_policy=open_adaptive
-power_model=Null
-range=0:134217727:0:0:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10000
-static_frontend_latency=10000
-tBURST=5000
-tCCD_L=0
-tCK=1250
-tCL=13750
-tCS=2500
-tRAS=35000
-tRCD=13750
-tREFI=7800000
-tRFC=260000
-tRP=13750
-tRRD=6000
-tRRD_L=0
-tRTP=7500
-tRTW=2500
-tWR=15000
-tWTR=7500
-tXAW=30000
-tXP=6000
-tXPDLL=0
-tXS=270000
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simerr b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simerr
deleted file mode 100755 (executable)
index 707fed9..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout
deleted file mode 100755 (executable)
index 9ae6789..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing/simout
-Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 17:55:48
-gem5 started Apr  3 2017 18:08:17
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 55753
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/arm/linux/o3-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 20302000 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt
deleted file mode 100644 (file)
index f88830f..0000000
+++ /dev/null
@@ -1,1179 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000020                      
-sim_ticks                                    20302000                      
-final_tick                                   20302000                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                  45535                      
-host_op_rate                                    53318                      
-host_tick_rate                              201173118                      
-host_mem_usage                                 277864                      
-host_seconds                                     0.10                      
-sim_insts                                        4592                      
-sim_ops                                          5378                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED     20302000                      
-system.physmem.bytes_read::cpu.inst             18560                      
-system.physmem.bytes_read::cpu.data              8128                      
-system.physmem.bytes_read::cpu.l2cache.prefetcher         1728                      
-system.physmem.bytes_read::total                28416                      
-system.physmem.bytes_inst_read::cpu.inst        18560                      
-system.physmem.bytes_inst_read::total           18560                      
-system.physmem.num_reads::cpu.inst                290                      
-system.physmem.num_reads::cpu.data                127                      
-system.physmem.num_reads::cpu.l2cache.prefetcher           27                      
-system.physmem.num_reads::total                   444                      
-system.physmem.bw_read::cpu.inst            914195646                      
-system.physmem.bw_read::cpu.data            400354645                      
-system.physmem.bw_read::cpu.l2cache.prefetcher     85114767                      
-system.physmem.bw_read::total              1399665058                      
-system.physmem.bw_inst_read::cpu.inst       914195646                      
-system.physmem.bw_inst_read::total          914195646                      
-system.physmem.bw_total::cpu.inst           914195646                      
-system.physmem.bw_total::cpu.data           400354645                      
-system.physmem.bw_total::cpu.l2cache.prefetcher     85114767                      
-system.physmem.bw_total::total             1399665058                      
-system.physmem.readReqs                           445                      
-system.physmem.writeReqs                            0                      
-system.physmem.readBursts                         445                      
-system.physmem.writeBursts                          0                      
-system.physmem.bytesReadDRAM                    28480                      
-system.physmem.bytesReadWrQ                         0                      
-system.physmem.bytesWritten                         0                      
-system.physmem.bytesReadSys                     28480                      
-system.physmem.bytesWrittenSys                      0                      
-system.physmem.servicedByWrQ                        0                      
-system.physmem.mergedWrBursts                       0                      
-system.physmem.neitherReadNorWriteReqs              0                      
-system.physmem.perBankRdBursts::0                 103                      
-system.physmem.perBankRdBursts::1                  48                      
-system.physmem.perBankRdBursts::2                  19                      
-system.physmem.perBankRdBursts::3                  45                      
-system.physmem.perBankRdBursts::4                  19                      
-system.physmem.perBankRdBursts::5                  37                      
-system.physmem.perBankRdBursts::6                  46                      
-system.physmem.perBankRdBursts::7                  10                      
-system.physmem.perBankRdBursts::8                   4                      
-system.physmem.perBankRdBursts::9                   8                      
-system.physmem.perBankRdBursts::10                 27                      
-system.physmem.perBankRdBursts::11                 47                      
-system.physmem.perBankRdBursts::12                 17                      
-system.physmem.perBankRdBursts::13                  8                      
-system.physmem.perBankRdBursts::14                  0                      
-system.physmem.perBankRdBursts::15                  7                      
-system.physmem.perBankWrBursts::0                   0                      
-system.physmem.perBankWrBursts::1                   0                      
-system.physmem.perBankWrBursts::2                   0                      
-system.physmem.perBankWrBursts::3                   0                      
-system.physmem.perBankWrBursts::4                   0                      
-system.physmem.perBankWrBursts::5                   0                      
-system.physmem.perBankWrBursts::6                   0                      
-system.physmem.perBankWrBursts::7                   0                      
-system.physmem.perBankWrBursts::8                   0                      
-system.physmem.perBankWrBursts::9                   0                      
-system.physmem.perBankWrBursts::10                  0                      
-system.physmem.perBankWrBursts::11                  0                      
-system.physmem.perBankWrBursts::12                  0                      
-system.physmem.perBankWrBursts::13                  0                      
-system.physmem.perBankWrBursts::14                  0                      
-system.physmem.perBankWrBursts::15                  0                      
-system.physmem.numRdRetry                           0                      
-system.physmem.numWrRetry                           0                      
-system.physmem.totGap                        20260500                      
-system.physmem.readPktSize::0                       0                      
-system.physmem.readPktSize::1                       0                      
-system.physmem.readPktSize::2                       0                      
-system.physmem.readPktSize::3                       0                      
-system.physmem.readPktSize::4                       0                      
-system.physmem.readPktSize::5                       0                      
-system.physmem.readPktSize::6                     445                      
-system.physmem.writePktSize::0                      0                      
-system.physmem.writePktSize::1                      0                      
-system.physmem.writePktSize::2                      0                      
-system.physmem.writePktSize::3                      0                      
-system.physmem.writePktSize::4                      0                      
-system.physmem.writePktSize::5                      0                      
-system.physmem.writePktSize::6                      0                      
-system.physmem.rdQLenPdf::0                       241                      
-system.physmem.rdQLenPdf::1                       136                      
-system.physmem.rdQLenPdf::2                        36                      
-system.physmem.rdQLenPdf::3                        17                      
-system.physmem.rdQLenPdf::4                         5                      
-system.physmem.rdQLenPdf::5                         2                      
-system.physmem.rdQLenPdf::6                         2                      
-system.physmem.rdQLenPdf::7                         2                      
-system.physmem.rdQLenPdf::8                         2                      
-system.physmem.rdQLenPdf::9                         2                      
-system.physmem.rdQLenPdf::10                        0                      
-system.physmem.rdQLenPdf::11                        0                      
-system.physmem.rdQLenPdf::12                        0                      
-system.physmem.rdQLenPdf::13                        0                      
-system.physmem.rdQLenPdf::14                        0                      
-system.physmem.rdQLenPdf::15                        0                      
-system.physmem.rdQLenPdf::16                        0                      
-system.physmem.rdQLenPdf::17                        0                      
-system.physmem.rdQLenPdf::18                        0                      
-system.physmem.rdQLenPdf::19                        0                      
-system.physmem.rdQLenPdf::20                        0                      
-system.physmem.rdQLenPdf::21                        0                      
-system.physmem.rdQLenPdf::22                        0                      
-system.physmem.rdQLenPdf::23                        0                      
-system.physmem.rdQLenPdf::24                        0                      
-system.physmem.rdQLenPdf::25                        0                      
-system.physmem.rdQLenPdf::26                        0                      
-system.physmem.rdQLenPdf::27                        0                      
-system.physmem.rdQLenPdf::28                        0                      
-system.physmem.rdQLenPdf::29                        0                      
-system.physmem.rdQLenPdf::30                        0                      
-system.physmem.rdQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::0                         0                      
-system.physmem.wrQLenPdf::1                         0                      
-system.physmem.wrQLenPdf::2                         0                      
-system.physmem.wrQLenPdf::3                         0                      
-system.physmem.wrQLenPdf::4                         0                      
-system.physmem.wrQLenPdf::5                         0                      
-system.physmem.wrQLenPdf::6                         0                      
-system.physmem.wrQLenPdf::7                         0                      
-system.physmem.wrQLenPdf::8                         0                      
-system.physmem.wrQLenPdf::9                         0                      
-system.physmem.wrQLenPdf::10                        0                      
-system.physmem.wrQLenPdf::11                        0                      
-system.physmem.wrQLenPdf::12                        0                      
-system.physmem.wrQLenPdf::13                        0                      
-system.physmem.wrQLenPdf::14                        0                      
-system.physmem.wrQLenPdf::15                        0                      
-system.physmem.wrQLenPdf::16                        0                      
-system.physmem.wrQLenPdf::17                        0                      
-system.physmem.wrQLenPdf::18                        0                      
-system.physmem.wrQLenPdf::19                        0                      
-system.physmem.wrQLenPdf::20                        0                      
-system.physmem.wrQLenPdf::21                        0                      
-system.physmem.wrQLenPdf::22                        0                      
-system.physmem.wrQLenPdf::23                        0                      
-system.physmem.wrQLenPdf::24                        0                      
-system.physmem.wrQLenPdf::25                        0                      
-system.physmem.wrQLenPdf::26                        0                      
-system.physmem.wrQLenPdf::27                        0                      
-system.physmem.wrQLenPdf::28                        0                      
-system.physmem.wrQLenPdf::29                        0                      
-system.physmem.wrQLenPdf::30                        0                      
-system.physmem.wrQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::32                        0                      
-system.physmem.wrQLenPdf::33                        0                      
-system.physmem.wrQLenPdf::34                        0                      
-system.physmem.wrQLenPdf::35                        0                      
-system.physmem.wrQLenPdf::36                        0                      
-system.physmem.wrQLenPdf::37                        0                      
-system.physmem.wrQLenPdf::38                        0                      
-system.physmem.wrQLenPdf::39                        0                      
-system.physmem.wrQLenPdf::40                        0                      
-system.physmem.wrQLenPdf::41                        0                      
-system.physmem.wrQLenPdf::42                        0                      
-system.physmem.wrQLenPdf::43                        0                      
-system.physmem.wrQLenPdf::44                        0                      
-system.physmem.wrQLenPdf::45                        0                      
-system.physmem.wrQLenPdf::46                        0                      
-system.physmem.wrQLenPdf::47                        0                      
-system.physmem.wrQLenPdf::48                        0                      
-system.physmem.wrQLenPdf::49                        0                      
-system.physmem.wrQLenPdf::50                        0                      
-system.physmem.wrQLenPdf::51                        0                      
-system.physmem.wrQLenPdf::52                        0                      
-system.physmem.wrQLenPdf::53                        0                      
-system.physmem.wrQLenPdf::54                        0                      
-system.physmem.wrQLenPdf::55                        0                      
-system.physmem.wrQLenPdf::56                        0                      
-system.physmem.wrQLenPdf::57                        0                      
-system.physmem.wrQLenPdf::58                        0                      
-system.physmem.wrQLenPdf::59                        0                      
-system.physmem.wrQLenPdf::60                        0                      
-system.physmem.wrQLenPdf::61                        0                      
-system.physmem.wrQLenPdf::62                        0                      
-system.physmem.wrQLenPdf::63                        0                      
-system.physmem.bytesPerActivate::samples           62                      
-system.physmem.bytesPerActivate::mean      435.612903                      
-system.physmem.bytesPerActivate::gmean     295.844737                      
-system.physmem.bytesPerActivate::stdev     352.802892                      
-system.physmem.bytesPerActivate::0-127              8     12.90%     12.90%
-system.physmem.bytesPerActivate::128-255           16     25.81%     38.71%
-system.physmem.bytesPerActivate::256-383           10     16.13%     54.84%
-system.physmem.bytesPerActivate::384-511            7     11.29%     66.13%
-system.physmem.bytesPerActivate::512-639            2      3.23%     69.35%
-system.physmem.bytesPerActivate::640-767            3      4.84%     74.19%
-system.physmem.bytesPerActivate::768-895            2      3.23%     77.42%
-system.physmem.bytesPerActivate::896-1023            4      6.45%     83.87%
-system.physmem.bytesPerActivate::1024-1151           10     16.13%    100.00%
-system.physmem.bytesPerActivate::total             62                      
-system.physmem.totQLat                        6135000                      
-system.physmem.totMemAccLat                  14478750                      
-system.physmem.totBusLat                      2225000                      
-system.physmem.avgQLat                       13786.52                      
-system.physmem.avgBusLat                      5000.00                      
-system.physmem.avgMemAccLat                  32536.52                      
-system.physmem.avgRdBW                        1402.82                      
-system.physmem.avgWrBW                           0.00                      
-system.physmem.avgRdBWSys                     1402.82                      
-system.physmem.avgWrBWSys                        0.00                      
-system.physmem.peakBW                        12800.00                      
-system.physmem.busUtil                          10.96                      
-system.physmem.busUtilRead                      10.96                      
-system.physmem.busUtilWrite                      0.00                      
-system.physmem.avgRdQLen                         1.85                      
-system.physmem.avgWrQLen                         0.00                      
-system.physmem.readRowHits                        373                      
-system.physmem.writeRowHits                         0                      
-system.physmem.readRowHitRate                   83.82                      
-system.physmem.writeRowHitRate                    nan                      
-system.physmem.avgGap                        45529.21                      
-system.physmem.pageHitRate                      83.82                      
-system.physmem_0.actEnergy                     349860                      
-system.physmem_0.preEnergy                     170775                      
-system.physmem_0.readEnergy                   2334780                      
-system.physmem_0.writeEnergy                        0                      
-system.physmem_0.refreshEnergy           1229280.000000                      
-system.physmem_0.actBackEnergy                3562500                      
-system.physmem_0.preBackEnergy                  28800                      
-system.physmem_0.actPowerDownEnergy           5660100                      
-system.physmem_0.prePowerDownEnergy               960                      
-system.physmem_0.selfRefreshEnergy                  0                      
-system.physmem_0.totalEnergy                 13337055                      
-system.physmem_0.averagePower              656.916882                      
-system.physmem_0.totalIdleTime               12261000                      
-system.physmem_0.memoryStateTime::IDLE          19000                      
-system.physmem_0.memoryStateTime::REF          520000                      
-system.physmem_0.memoryStateTime::SREF              0                      
-system.physmem_0.memoryStateTime::PRE_PDN         2500                      
-system.physmem_0.memoryStateTime::ACT         7351250                      
-system.physmem_0.memoryStateTime::ACT_PDN     12409250                      
-system.physmem_1.actEnergy                     164220                      
-system.physmem_1.preEnergy                      64515                      
-system.physmem_1.readEnergy                    842520                      
-system.physmem_1.writeEnergy                        0                      
-system.physmem_1.refreshEnergy           1229280.000000                      
-system.physmem_1.actBackEnergy                1478010                      
-system.physmem_1.preBackEnergy                  68640                      
-system.physmem_1.actPowerDownEnergy           7415130                      
-system.physmem_1.prePowerDownEnergy            238560                      
-system.physmem_1.selfRefreshEnergy                  0                      
-system.physmem_1.totalEnergy                 11500875                      
-system.physmem_1.averagePower              566.475803                      
-system.physmem_1.totalIdleTime               16880000                      
-system.physmem_1.memoryStateTime::IDLE         110000                      
-system.physmem_1.memoryStateTime::REF          520000                      
-system.physmem_1.memoryStateTime::SREF              0                      
-system.physmem_1.memoryStateTime::PRE_PDN       620500                      
-system.physmem_1.memoryStateTime::ACT         2792000                      
-system.physmem_1.memoryStateTime::ACT_PDN     16259500                      
-system.pwrStateResidencyTicks::UNDEFINED     20302000                      
-system.cpu.branchPred.lookups                    2438                      
-system.cpu.branchPred.condPredicted              1441                      
-system.cpu.branchPred.condIncorrect               523                      
-system.cpu.branchPred.BTBLookups                  913                      
-system.cpu.branchPred.BTBHits                     446                      
-system.cpu.branchPred.BTBCorrect                    0                      
-system.cpu.branchPred.BTBHitPct             48.849945                      
-system.cpu.branchPred.usedRAS                     286                      
-system.cpu.branchPred.RASInCorrect                 57                      
-system.cpu.branchPred.indirectLookups             163                      
-system.cpu.branchPred.indirectHits                 13                      
-system.cpu.branchPred.indirectMisses              150                      
-system.cpu.branchPredindirectMispredicted           59                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED     20302000                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_entries            0                      
-system.cpu.dstage2_mmu.stage2_tlb.align_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.domain_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.perms_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.hits              0                      
-system.cpu.dstage2_mmu.stage2_tlb.misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.accesses            0                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED     20302000                      
-system.cpu.dtb.walker.walks                         0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin::total            0                      
-system.cpu.dtb.inst_hits                            0                      
-system.cpu.dtb.inst_misses                          0                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.flush_tlb                            0                      
-system.cpu.dtb.flush_tlb_mva                        0                      
-system.cpu.dtb.flush_tlb_mva_asid                   0                      
-system.cpu.dtb.flush_tlb_asid                       0                      
-system.cpu.dtb.flush_entries                        0                      
-system.cpu.dtb.align_faults                         0                      
-system.cpu.dtb.prefetch_faults                      0                      
-system.cpu.dtb.domain_faults                        0                      
-system.cpu.dtb.perms_faults                         0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.inst_accesses                        0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED     20302000                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_entries            0                      
-system.cpu.istage2_mmu.stage2_tlb.align_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.prefetch_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.domain_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.perms_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.hits              0                      
-system.cpu.istage2_mmu.stage2_tlb.misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.accesses            0                      
-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED     20302000                      
-system.cpu.itb.walker.walks                         0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.itb.walker.walkRequestOrigin::total            0                      
-system.cpu.itb.inst_hits                            0                      
-system.cpu.itb.inst_misses                          0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.flush_tlb                            0                      
-system.cpu.itb.flush_tlb_mva                        0                      
-system.cpu.itb.flush_tlb_mva_asid                   0                      
-system.cpu.itb.flush_tlb_asid                       0                      
-system.cpu.itb.flush_entries                        0                      
-system.cpu.itb.align_faults                         0                      
-system.cpu.itb.prefetch_faults                      0                      
-system.cpu.itb.domain_faults                        0                      
-system.cpu.itb.perms_faults                         0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.inst_accesses                        0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.workload.numSyscalls                    13                      
-system.cpu.pwrStateResidencyTicks::ON        20302000                      
-system.cpu.numCycles                            40605                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.fetch.icacheStallCycles               6162                      
-system.cpu.fetch.Insts                          11460                      
-system.cpu.fetch.Branches                        2438                      
-system.cpu.fetch.predictedBranches                745                      
-system.cpu.fetch.Cycles                          8314                      
-system.cpu.fetch.SquashCycles                    1088                      
-system.cpu.fetch.MiscStallCycles                  142                      
-system.cpu.fetch.PendingTrapStallCycles           286                      
-system.cpu.fetch.IcacheWaitRetryStallCycles          466                      
-system.cpu.fetch.CacheLines                      3900                      
-system.cpu.fetch.IcacheSquashes                   180                      
-system.cpu.fetch.rateDist::samples              15914                      
-system.cpu.fetch.rateDist::mean              0.856227                      
-system.cpu.fetch.rateDist::stdev             1.206589                      
-system.cpu.fetch.rateDist::underflows               0      0.00%      0.00%
-system.cpu.fetch.rateDist::0                     9531     59.89%     59.89%
-system.cpu.fetch.rateDist::1                     2501     15.72%     75.61%
-system.cpu.fetch.rateDist::2                      521      3.27%     78.88%
-system.cpu.fetch.rateDist::3                     3361     21.12%    100.00%
-system.cpu.fetch.rateDist::overflows                0      0.00%    100.00%
-system.cpu.fetch.rateDist::min_value                0                      
-system.cpu.fetch.rateDist::max_value                3                      
-system.cpu.fetch.rateDist::total                15914                      
-system.cpu.fetch.branchRate                  0.060042                      
-system.cpu.fetch.rate                        0.282231                      
-system.cpu.decode.IdleCycles                     5816                      
-system.cpu.decode.BlockedCycles                  4410                      
-system.cpu.decode.RunCycles                      5171                      
-system.cpu.decode.UnblockCycles                   132                      
-system.cpu.decode.SquashCycles                    385                      
-system.cpu.decode.BranchResolved                  538                      
-system.cpu.decode.BranchMispred                   162                      
-system.cpu.decode.DecodedInsts                  10171                      
-system.cpu.decode.SquashedInsts                  1674                      
-system.cpu.rename.SquashCycles                    385                      
-system.cpu.rename.IdleCycles                     6927                      
-system.cpu.rename.BlockCycles                    1165                      
-system.cpu.rename.serializeStallCycles           2515                      
-system.cpu.rename.RunCycles                      4182                      
-system.cpu.rename.UnblockCycles                   740                      
-system.cpu.rename.RenamedInsts                   9091                      
-system.cpu.rename.SquashedInsts                   462                      
-system.cpu.rename.ROBFullEvents                    25                      
-system.cpu.rename.IQFullEvents                      1                      
-system.cpu.rename.LQFullEvents                     28                      
-system.cpu.rename.SQFullEvents                    631                      
-system.cpu.rename.RenamedOperands                9449                      
-system.cpu.rename.RenameLookups                 41113                      
-system.cpu.rename.int_rename_lookups             9997                      
-system.cpu.rename.fp_rename_lookups                17                      
-system.cpu.rename.CommittedMaps                  5494                      
-system.cpu.rename.UndoneMaps                     3955                      
-system.cpu.rename.serializingInsts                 29                      
-system.cpu.rename.tempSerializingInsts             27                      
-system.cpu.rename.skidInsts                       332                      
-system.cpu.memDep0.insertedLoads                 1823                      
-system.cpu.memDep0.insertedStores                1287                      
-system.cpu.memDep0.conflictingLoads                 1                      
-system.cpu.memDep0.conflictingStores                0                      
-system.cpu.iq.iqInstsAdded                       8508                      
-system.cpu.iq.iqNonSpecInstsAdded                  38                      
-system.cpu.iq.iqInstsIssued                      7227                      
-system.cpu.iq.iqSquashedInstsIssued               183                      
-system.cpu.iq.iqSquashedInstsExamined            3167                      
-system.cpu.iq.iqSquashedOperandsExamined         8218                      
-system.cpu.iq.iqSquashedNonSpecRemoved              1                      
-system.cpu.iq.issued_per_cycle::samples         15914                      
-system.cpu.iq.issued_per_cycle::mean         0.454128                      
-system.cpu.iq.issued_per_cycle::stdev        0.844358                      
-system.cpu.iq.issued_per_cycle::underflows            0      0.00%      0.00%
-system.cpu.iq.issued_per_cycle::0               11653     73.22%     73.22%
-system.cpu.iq.issued_per_cycle::1                1987     12.49%     85.71%
-system.cpu.iq.issued_per_cycle::2                1624     10.20%     95.92%
-system.cpu.iq.issued_per_cycle::3                 608      3.82%     99.74%
-system.cpu.iq.issued_per_cycle::4                  42      0.26%    100.00%
-system.cpu.iq.issued_per_cycle::5                   0      0.00%    100.00%
-system.cpu.iq.issued_per_cycle::6                   0      0.00%    100.00%
-system.cpu.iq.issued_per_cycle::7                   0      0.00%    100.00%
-system.cpu.iq.issued_per_cycle::8                   0      0.00%    100.00%
-system.cpu.iq.issued_per_cycle::overflows            0      0.00%    100.00%
-system.cpu.iq.issued_per_cycle::min_value            0                      
-system.cpu.iq.issued_per_cycle::max_value            4                      
-system.cpu.iq.issued_per_cycle::total           15914                      
-system.cpu.iq.fu_full::No_OpClass                   0      0.00%      0.00%
-system.cpu.iq.fu_full::IntAlu                     414     28.79%     28.79%
-system.cpu.iq.fu_full::IntMult                      0      0.00%     28.79%
-system.cpu.iq.fu_full::IntDiv                       0      0.00%     28.79%
-system.cpu.iq.fu_full::FloatAdd                     0      0.00%     28.79%
-system.cpu.iq.fu_full::FloatCmp                     0      0.00%     28.79%
-system.cpu.iq.fu_full::FloatCvt                     0      0.00%     28.79%
-system.cpu.iq.fu_full::FloatMult                    0      0.00%     28.79%
-system.cpu.iq.fu_full::FloatMultAcc                 0      0.00%     28.79%
-system.cpu.iq.fu_full::FloatDiv                     0      0.00%     28.79%
-system.cpu.iq.fu_full::FloatMisc                    0      0.00%     28.79%
-system.cpu.iq.fu_full::FloatSqrt                    0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdAdd                      0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdAddAcc                   0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdAlu                      0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdCmp                      0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdCvt                      0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdMisc                     0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdMult                     0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdMultAcc                  0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdShift                    0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdShiftAcc                 0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdSqrt                     0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdFloatAdd                 0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdFloatAlu                 0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdFloatCmp                 0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdFloatCvt                 0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdFloatDiv                 0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdFloatMisc                0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdFloatMult                0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdFloatMultAcc             0      0.00%     28.79%
-system.cpu.iq.fu_full::SimdFloatSqrt                0      0.00%     28.79%
-system.cpu.iq.fu_full::MemRead                    469     32.61%     61.40%
-system.cpu.iq.fu_full::MemWrite                   538     37.41%     98.82%
-system.cpu.iq.fu_full::FloatMemRead                 0      0.00%     98.82%
-system.cpu.iq.fu_full::FloatMemWrite               17      1.18%    100.00%
-system.cpu.iq.fu_full::IprAccess                    0      0.00%    100.00%
-system.cpu.iq.fu_full::InstPrefetch                 0      0.00%    100.00%
-system.cpu.iq.FU_type_0::No_OpClass                 0      0.00%      0.00%
-system.cpu.iq.FU_type_0::IntAlu                  4537     62.78%     62.78%
-system.cpu.iq.FU_type_0::IntMult                    5      0.07%     62.85%
-system.cpu.iq.FU_type_0::IntDiv                     0      0.00%     62.85%
-system.cpu.iq.FU_type_0::FloatAdd                   0      0.00%     62.85%
-system.cpu.iq.FU_type_0::FloatCmp                   0      0.00%     62.85%
-system.cpu.iq.FU_type_0::FloatCvt                   0      0.00%     62.85%
-system.cpu.iq.FU_type_0::FloatMult                  0      0.00%     62.85%
-system.cpu.iq.FU_type_0::FloatMultAcc               0      0.00%     62.85%
-system.cpu.iq.FU_type_0::FloatDiv                   0      0.00%     62.85%
-system.cpu.iq.FU_type_0::FloatMisc                  0      0.00%     62.85%
-system.cpu.iq.FU_type_0::FloatSqrt                  0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdAdd                    0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdAddAcc                 0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdAlu                    0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdCmp                    0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdCvt                    0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdMisc                   0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdMult                   0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdMultAcc                0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdShift                  0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdShiftAcc               0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdSqrt                   0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdFloatAdd               0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdFloatAlu               0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdFloatCmp               0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdFloatCvt               0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdFloatDiv               0      0.00%     62.85%
-system.cpu.iq.FU_type_0::SimdFloatMisc              3      0.04%     62.89%
-system.cpu.iq.FU_type_0::SimdFloatMult              0      0.00%     62.89%
-system.cpu.iq.FU_type_0::SimdFloatMultAcc            0      0.00%     62.89%
-system.cpu.iq.FU_type_0::SimdFloatSqrt              0      0.00%     62.89%
-system.cpu.iq.FU_type_0::MemRead                 1601     22.15%     85.04%
-system.cpu.iq.FU_type_0::MemWrite                1065     14.74%     99.78%
-system.cpu.iq.FU_type_0::FloatMemRead               0      0.00%     99.78%
-system.cpu.iq.FU_type_0::FloatMemWrite             16      0.22%    100.00%
-system.cpu.iq.FU_type_0::IprAccess                  0      0.00%    100.00%
-system.cpu.iq.FU_type_0::InstPrefetch               0      0.00%    100.00%
-system.cpu.iq.FU_type_0::total                   7227                      
-system.cpu.iq.rate                           0.177983                      
-system.cpu.iq.fu_busy_cnt                        1438                      
-system.cpu.iq.fu_busy_rate                   0.198976                      
-system.cpu.iq.int_inst_queue_reads              31940                      
-system.cpu.iq.int_inst_queue_writes             11704                      
-system.cpu.iq.int_inst_queue_wakeup_accesses         6623                      
-system.cpu.iq.fp_inst_queue_reads                  49                      
-system.cpu.iq.fp_inst_queue_writes                 16                      
-system.cpu.iq.fp_inst_queue_wakeup_accesses           16                      
-system.cpu.iq.int_alu_accesses                   8632                      
-system.cpu.iq.fp_alu_accesses                      33                      
-system.cpu.iew.lsq.thread0.forwLoads               12                      
-system.cpu.iew.lsq.thread0.invAddrLoads             0                      
-system.cpu.iew.lsq.thread0.squashedLoads          796                      
-system.cpu.iew.lsq.thread0.ignoredResponses            0                      
-system.cpu.iew.lsq.thread0.memOrderViolation            7                      
-system.cpu.iew.lsq.thread0.squashedStores          349                      
-system.cpu.iew.lsq.thread0.invAddrSwpfs             0                      
-system.cpu.iew.lsq.thread0.blockedLoads             0                      
-system.cpu.iew.lsq.thread0.rescheduledLoads            7                      
-system.cpu.iew.lsq.thread0.cacheBlocked            18                      
-system.cpu.iew.iewIdleCycles                        0                      
-system.cpu.iew.iewSquashCycles                    385                      
-system.cpu.iew.iewBlockCycles                     345                      
-system.cpu.iew.iewUnblockCycles                    11                      
-system.cpu.iew.iewDispatchedInsts                8559                      
-system.cpu.iew.iewDispSquashedInsts                 0                      
-system.cpu.iew.iewDispLoadInsts                  1823                      
-system.cpu.iew.iewDispStoreInsts                 1287                      
-system.cpu.iew.iewDispNonSpecInsts                 26                      
-system.cpu.iew.iewIQFullEvents                      3                      
-system.cpu.iew.iewLSQFullEvents                     6                      
-system.cpu.iew.memOrderViolationEvents              7                      
-system.cpu.iew.predictedTakenIncorrect             60                      
-system.cpu.iew.predictedNotTakenIncorrect          320                      
-system.cpu.iew.branchMispredicts                  380                      
-system.cpu.iew.iewExecutedInsts                  6823                      
-system.cpu.iew.iewExecLoadInsts                  1419                      
-system.cpu.iew.iewExecSquashedInsts               404                      
-system.cpu.iew.exec_swp                             0                      
-system.cpu.iew.exec_nop                            13                      
-system.cpu.iew.exec_refs                         2443                      
-system.cpu.iew.exec_branches                     1299                      
-system.cpu.iew.exec_stores                       1024                      
-system.cpu.iew.exec_rate                     0.168033                      
-system.cpu.iew.wb_sent                           6684                      
-system.cpu.iew.wb_count                          6639                      
-system.cpu.iew.wb_producers                      2983                      
-system.cpu.iew.wb_consumers                      5430                      
-system.cpu.iew.wb_rate                       0.163502                      
-system.cpu.iew.wb_fanout                     0.549355                      
-system.cpu.commit.commitSquashedInsts            2701                      
-system.cpu.commit.commitNonSpecStalls              37                      
-system.cpu.commit.branchMispredicts               364                      
-system.cpu.commit.committed_per_cycle::samples        15346                      
-system.cpu.commit.committed_per_cycle::mean     0.350450                      
-system.cpu.commit.committed_per_cycle::stdev     0.989791                      
-system.cpu.commit.committed_per_cycle::underflows            0      0.00%      0.00%
-system.cpu.commit.committed_per_cycle::0        12681     82.63%     82.63%
-system.cpu.commit.committed_per_cycle::1         1400      9.12%     91.76%
-system.cpu.commit.committed_per_cycle::2          606      3.95%     95.71%
-system.cpu.commit.committed_per_cycle::3          298      1.94%     97.65%
-system.cpu.commit.committed_per_cycle::4          165      1.08%     98.72%
-system.cpu.commit.committed_per_cycle::5           80      0.52%     99.24%
-system.cpu.commit.committed_per_cycle::6           44      0.29%     99.53%
-system.cpu.commit.committed_per_cycle::7           28      0.18%     99.71%
-system.cpu.commit.committed_per_cycle::8           44      0.29%    100.00%
-system.cpu.commit.committed_per_cycle::overflows            0      0.00%    100.00%
-system.cpu.commit.committed_per_cycle::min_value            0                      
-system.cpu.commit.committed_per_cycle::max_value            8                      
-system.cpu.commit.committed_per_cycle::total        15346                      
-system.cpu.commit.committedInsts                 4592                      
-system.cpu.commit.committedOps                   5378                      
-system.cpu.commit.swp_count                         0                      
-system.cpu.commit.refs                           1965                      
-system.cpu.commit.loads                          1027                      
-system.cpu.commit.membars                          12                      
-system.cpu.commit.branches                       1008                      
-system.cpu.commit.fp_insts                         16                      
-system.cpu.commit.int_insts                      4624                      
-system.cpu.commit.function_calls                   82                      
-system.cpu.commit.op_class_0::No_OpClass            0      0.00%      0.00%
-system.cpu.commit.op_class_0::IntAlu             3406     63.33%     63.33%
-system.cpu.commit.op_class_0::IntMult               4      0.07%     63.41%
-system.cpu.commit.op_class_0::IntDiv                0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatAdd              0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatCmp              0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatCvt              0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatMult             0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatMultAcc            0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatDiv              0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatMisc             0      0.00%     63.41%
-system.cpu.commit.op_class_0::FloatSqrt             0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdAdd               0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdAddAcc            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdAlu               0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdCmp               0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdCvt               0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdMisc              0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdMult              0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdMultAcc            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdShift             0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdShiftAcc            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdSqrt              0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatAdd            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatAlu            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatCmp            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatCvt            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatDiv            0      0.00%     63.41%
-system.cpu.commit.op_class_0::SimdFloatMisc            3      0.06%     63.46%
-system.cpu.commit.op_class_0::SimdFloatMult            0      0.00%     63.46%
-system.cpu.commit.op_class_0::SimdFloatMultAcc            0      0.00%     63.46%
-system.cpu.commit.op_class_0::SimdFloatSqrt            0      0.00%     63.46%
-system.cpu.commit.op_class_0::MemRead            1027     19.10%     82.56%
-system.cpu.commit.op_class_0::MemWrite            922     17.14%     99.70%
-system.cpu.commit.op_class_0::FloatMemRead            0      0.00%     99.70%
-system.cpu.commit.op_class_0::FloatMemWrite           16      0.30%    100.00%
-system.cpu.commit.op_class_0::IprAccess             0      0.00%    100.00%
-system.cpu.commit.op_class_0::InstPrefetch            0      0.00%    100.00%
-system.cpu.commit.op_class_0::total              5378                      
-system.cpu.commit.bw_lim_events                    44                      
-system.cpu.rob.rob_reads                        23224                      
-system.cpu.rob.rob_writes                       16730                      
-system.cpu.timesIdled                             212                      
-system.cpu.idleCycles                           24691                      
-system.cpu.committedInsts                        4592                      
-system.cpu.committedOps                          5378                      
-system.cpu.cpi                               8.842552                      
-system.cpu.cpi_total                         8.842552                      
-system.cpu.ipc                               0.113090                      
-system.cpu.ipc_total                         0.113090                      
-system.cpu.int_regfile_reads                     6850                      
-system.cpu.int_regfile_writes                    3795                      
-system.cpu.fp_regfile_reads                        16                      
-system.cpu.cc_regfile_reads                     24229                      
-system.cpu.cc_regfile_writes                     2927                      
-system.cpu.misc_regfile_reads                    2559                      
-system.cpu.misc_regfile_writes                     24                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     20302000                      
-system.cpu.dcache.tags.replacements                 1                      
-system.cpu.dcache.tags.tagsinuse            84.085192                      
-system.cpu.dcache.tags.total_refs                1923                      
-system.cpu.dcache.tags.sampled_refs               143                      
-system.cpu.dcache.tags.avg_refs             13.447552                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data    84.085192                      
-system.cpu.dcache.tags.occ_percent::cpu.data     0.164229                      
-system.cpu.dcache.tags.occ_percent::total     0.164229                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024          142                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           52                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::1           90                      
-system.cpu.dcache.tags.occ_task_id_percent::1024     0.277344                      
-system.cpu.dcache.tags.tag_accesses              4715                      
-system.cpu.dcache.tags.data_accesses             4715                      
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     20302000                      
-system.cpu.dcache.ReadReq_hits::cpu.data         1181                      
-system.cpu.dcache.ReadReq_hits::total            1181                      
-system.cpu.dcache.WriteReq_hits::cpu.data          722                      
-system.cpu.dcache.WriteReq_hits::total            722                      
-system.cpu.dcache.LoadLockedReq_hits::cpu.data            9                      
-system.cpu.dcache.LoadLockedReq_hits::total            9                      
-system.cpu.dcache.StoreCondReq_hits::cpu.data           11                      
-system.cpu.dcache.StoreCondReq_hits::total           11                      
-system.cpu.dcache.demand_hits::cpu.data          1903                      
-system.cpu.dcache.demand_hits::total             1903                      
-system.cpu.dcache.overall_hits::cpu.data         1903                      
-system.cpu.dcache.overall_hits::total            1903                      
-system.cpu.dcache.ReadReq_misses::cpu.data          170                      
-system.cpu.dcache.ReadReq_misses::total           170                      
-system.cpu.dcache.WriteReq_misses::cpu.data          191                      
-system.cpu.dcache.WriteReq_misses::total          191                      
-system.cpu.dcache.LoadLockedReq_misses::cpu.data            2                      
-system.cpu.dcache.LoadLockedReq_misses::total            2                      
-system.cpu.dcache.demand_misses::cpu.data          361                      
-system.cpu.dcache.demand_misses::total            361                      
-system.cpu.dcache.overall_misses::cpu.data          361                      
-system.cpu.dcache.overall_misses::total           361                      
-system.cpu.dcache.ReadReq_miss_latency::cpu.data     12060000                      
-system.cpu.dcache.ReadReq_miss_latency::total     12060000                      
-system.cpu.dcache.WriteReq_miss_latency::cpu.data      8016500                      
-system.cpu.dcache.WriteReq_miss_latency::total      8016500                      
-system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data       139000                      
-system.cpu.dcache.LoadLockedReq_miss_latency::total       139000                      
-system.cpu.dcache.demand_miss_latency::cpu.data     20076500                      
-system.cpu.dcache.demand_miss_latency::total     20076500                      
-system.cpu.dcache.overall_miss_latency::cpu.data     20076500                      
-system.cpu.dcache.overall_miss_latency::total     20076500                      
-system.cpu.dcache.ReadReq_accesses::cpu.data         1351                      
-system.cpu.dcache.ReadReq_accesses::total         1351                      
-system.cpu.dcache.WriteReq_accesses::cpu.data          913                      
-system.cpu.dcache.WriteReq_accesses::total          913                      
-system.cpu.dcache.LoadLockedReq_accesses::cpu.data           11                      
-system.cpu.dcache.LoadLockedReq_accesses::total           11                      
-system.cpu.dcache.StoreCondReq_accesses::cpu.data           11                      
-system.cpu.dcache.StoreCondReq_accesses::total           11                      
-system.cpu.dcache.demand_accesses::cpu.data         2264                      
-system.cpu.dcache.demand_accesses::total         2264                      
-system.cpu.dcache.overall_accesses::cpu.data         2264                      
-system.cpu.dcache.overall_accesses::total         2264                      
-system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.125833                      
-system.cpu.dcache.ReadReq_miss_rate::total     0.125833                      
-system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.209200                      
-system.cpu.dcache.WriteReq_miss_rate::total     0.209200                      
-system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data     0.181818                      
-system.cpu.dcache.LoadLockedReq_miss_rate::total     0.181818                      
-system.cpu.dcache.demand_miss_rate::cpu.data     0.159452                      
-system.cpu.dcache.demand_miss_rate::total     0.159452                      
-system.cpu.dcache.overall_miss_rate::cpu.data     0.159452                      
-system.cpu.dcache.overall_miss_rate::total     0.159452                      
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 70941.176471                      
-system.cpu.dcache.ReadReq_avg_miss_latency::total 70941.176471                      
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 41971.204188                      
-system.cpu.dcache.WriteReq_avg_miss_latency::total 41971.204188                      
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data        69500                      
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::total        69500                      
-system.cpu.dcache.demand_avg_miss_latency::cpu.data 55613.573407                      
-system.cpu.dcache.demand_avg_miss_latency::total 55613.573407                      
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 55613.573407                      
-system.cpu.dcache.overall_avg_miss_latency::total 55613.573407                      
-system.cpu.dcache.blocked_cycles::no_mshrs            0                      
-system.cpu.dcache.blocked_cycles::no_targets          853                      
-system.cpu.dcache.blocked::no_mshrs                 0                      
-system.cpu.dcache.blocked::no_targets              18                      
-system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.dcache.avg_blocked_cycles::no_targets    47.388889                      
-system.cpu.dcache.writebacks::writebacks            1                      
-system.cpu.dcache.writebacks::total                 1                      
-system.cpu.dcache.ReadReq_mshr_hits::cpu.data           67                      
-system.cpu.dcache.ReadReq_mshr_hits::total           67                      
-system.cpu.dcache.WriteReq_mshr_hits::cpu.data          150                      
-system.cpu.dcache.WriteReq_mshr_hits::total          150                      
-system.cpu.dcache.LoadLockedReq_mshr_hits::cpu.data            2                      
-system.cpu.dcache.LoadLockedReq_mshr_hits::total            2                      
-system.cpu.dcache.demand_mshr_hits::cpu.data          217                      
-system.cpu.dcache.demand_mshr_hits::total          217                      
-system.cpu.dcache.overall_mshr_hits::cpu.data          217                      
-system.cpu.dcache.overall_mshr_hits::total          217                      
-system.cpu.dcache.ReadReq_mshr_misses::cpu.data          103                      
-system.cpu.dcache.ReadReq_mshr_misses::total          103                      
-system.cpu.dcache.WriteReq_mshr_misses::cpu.data           41                      
-system.cpu.dcache.WriteReq_mshr_misses::total           41                      
-system.cpu.dcache.demand_mshr_misses::cpu.data          144                      
-system.cpu.dcache.demand_mshr_misses::total          144                      
-system.cpu.dcache.overall_mshr_misses::cpu.data          144                      
-system.cpu.dcache.overall_mshr_misses::total          144                      
-system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data      7989500                      
-system.cpu.dcache.ReadReq_mshr_miss_latency::total      7989500                      
-system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data      2594500                      
-system.cpu.dcache.WriteReq_mshr_miss_latency::total      2594500                      
-system.cpu.dcache.demand_mshr_miss_latency::cpu.data     10584000                      
-system.cpu.dcache.demand_mshr_miss_latency::total     10584000                      
-system.cpu.dcache.overall_mshr_miss_latency::cpu.data     10584000                      
-system.cpu.dcache.overall_mshr_miss_latency::total     10584000                      
-system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.076240                      
-system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.076240                      
-system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.044907                      
-system.cpu.dcache.WriteReq_mshr_miss_rate::total     0.044907                      
-system.cpu.dcache.demand_mshr_miss_rate::cpu.data     0.063604                      
-system.cpu.dcache.demand_mshr_miss_rate::total     0.063604                      
-system.cpu.dcache.overall_mshr_miss_rate::cpu.data     0.063604                      
-system.cpu.dcache.overall_mshr_miss_rate::total     0.063604                      
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 77567.961165                      
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 77567.961165                      
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 63280.487805                      
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 63280.487805                      
-system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data        73500                      
-system.cpu.dcache.demand_avg_mshr_miss_latency::total        73500                      
-system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data        73500                      
-system.cpu.dcache.overall_avg_mshr_miss_latency::total        73500                      
-system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED     20302000                      
-system.cpu.icache.tags.replacements                44                      
-system.cpu.icache.tags.tagsinuse           137.523624                      
-system.cpu.icache.tags.total_refs                3532                      
-system.cpu.icache.tags.sampled_refs               299                      
-system.cpu.icache.tags.avg_refs             11.812709                      
-system.cpu.icache.tags.warmup_cycle                 0                      
-system.cpu.icache.tags.occ_blocks::cpu.inst   137.523624                      
-system.cpu.icache.tags.occ_percent::cpu.inst     0.268601                      
-system.cpu.icache.tags.occ_percent::total     0.268601                      
-system.cpu.icache.tags.occ_task_id_blocks::1024          255                      
-system.cpu.icache.tags.age_task_id_blocks_1024::0          145                      
-system.cpu.icache.tags.age_task_id_blocks_1024::1          110                      
-system.cpu.icache.tags.occ_task_id_percent::1024     0.498047                      
-system.cpu.icache.tags.tag_accesses              8095                      
-system.cpu.icache.tags.data_accesses             8095                      
-system.cpu.icache.pwrStateResidencyTicks::UNDEFINED     20302000                      
-system.cpu.icache.ReadReq_hits::cpu.inst         3532                      
-system.cpu.icache.ReadReq_hits::total            3532                      
-system.cpu.icache.demand_hits::cpu.inst          3532                      
-system.cpu.icache.demand_hits::total             3532                      
-system.cpu.icache.overall_hits::cpu.inst         3532                      
-system.cpu.icache.overall_hits::total            3532                      
-system.cpu.icache.ReadReq_misses::cpu.inst          366                      
-system.cpu.icache.ReadReq_misses::total           366                      
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-system.cpu.icache.demand_misses::total            366                      
-system.cpu.icache.overall_misses::cpu.inst          366                      
-system.cpu.icache.overall_misses::total           366                      
-system.cpu.icache.ReadReq_miss_latency::cpu.inst     25091490                      
-system.cpu.icache.ReadReq_miss_latency::total     25091490                      
-system.cpu.icache.demand_miss_latency::cpu.inst     25091490                      
-system.cpu.icache.demand_miss_latency::total     25091490                      
-system.cpu.icache.overall_miss_latency::cpu.inst     25091490                      
-system.cpu.icache.overall_miss_latency::total     25091490                      
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-system.cpu.icache.ReadReq_accesses::total         3898                      
-system.cpu.icache.demand_accesses::cpu.inst         3898                      
-system.cpu.icache.demand_accesses::total         3898                      
-system.cpu.icache.overall_accesses::cpu.inst         3898                      
-system.cpu.icache.overall_accesses::total         3898                      
-system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.093894                      
-system.cpu.icache.ReadReq_miss_rate::total     0.093894                      
-system.cpu.icache.demand_miss_rate::cpu.inst     0.093894                      
-system.cpu.icache.demand_miss_rate::total     0.093894                      
-system.cpu.icache.overall_miss_rate::cpu.inst     0.093894                      
-system.cpu.icache.overall_miss_rate::total     0.093894                      
-system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 68555.983607                      
-system.cpu.icache.ReadReq_avg_miss_latency::total 68555.983607                      
-system.cpu.icache.demand_avg_miss_latency::cpu.inst 68555.983607                      
-system.cpu.icache.demand_avg_miss_latency::total 68555.983607                      
-system.cpu.icache.overall_avg_miss_latency::cpu.inst 68555.983607                      
-system.cpu.icache.overall_avg_miss_latency::total 68555.983607                      
-system.cpu.icache.blocked_cycles::no_mshrs         9833                      
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-system.cpu.icache.blocked::no_mshrs                97                      
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-system.membus.snoop_fanout::samples               445                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                     445    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                 445                      
-system.membus.reqLayer0.occupancy              554444                      
-system.membus.reqLayer0.utilization               2.7                      
-system.membus.respLayer1.occupancy            2338250                      
-system.membus.respLayer1.utilization             11.5                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini
deleted file mode 100644 (file)
index 3b9285a..0000000
+++ /dev/null
@@ -1,502 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=AtomicSimpleCPU
-children=checker dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload
-branchPred=Null
-checker=system.cpu.checker
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dstage2_mmu=system.cpu.dstage2_mmu
-dtb=system.cpu.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-istage2_mmu=system.cpu.istage2_mmu
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-width=1
-workload=system.cpu.workload
-dcache_port=system.membus.slave[2]
-icache_port=system.membus.slave[1]
-
-[system.cpu.checker]
-type=DummyChecker
-children=dstage2_mmu dtb isa istage2_mmu itb tracer
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=-1
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dstage2_mmu=system.cpu.checker.dstage2_mmu
-dtb=system.cpu.checker.dtb
-eventq_index=0
-exitOnError=false
-function_trace=false
-function_trace_start=0
-interrupts=
-isa=system.cpu.checker.isa
-istage2_mmu=system.cpu.checker.istage2_mmu
-itb=system.cpu.checker.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.checker.tracer
-updateOnError=false
-warnOnlyOnLoadError=true
-workload=system.cpu.workload
-
-[system.cpu.checker.dstage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.checker.dtb
-
-[system.cpu.checker.dstage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.checker.dstage2_mmu.stage2_tlb.walker
-
-[system.cpu.checker.dstage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.checker.dtb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.checker.dtb.walker
-
-[system.cpu.checker.dtb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.checker.isa]
-type=ArmISA
-decoderFlavour=Generic
-eventq_index=0
-fpsid=1090793632
-id_aa64afr0_el1=0
-id_aa64afr1_el1=0
-id_aa64dfr0_el1=1052678
-id_aa64dfr1_el1=0
-id_aa64isar0_el1=0
-id_aa64isar1_el1=0
-id_aa64mmfr0_el1=15728642
-id_aa64mmfr1_el1=0
-id_isar0=34607377
-id_isar1=34677009
-id_isar2=555950401
-id_isar3=17899825
-id_isar4=268501314
-id_isar5=0
-id_mmfr0=270536963
-id_mmfr1=0
-id_mmfr2=19070976
-id_mmfr3=34611729
-midr=1091551472
-pmu=Null
-system=system
-
-[system.cpu.checker.istage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.checker.itb
-
-[system.cpu.checker.istage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.checker.istage2_mmu.stage2_tlb.walker
-
-[system.cpu.checker.istage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.checker.itb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.checker.itb.walker
-
-[system.cpu.checker.itb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.checker.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.dstage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.dtb
-
-[system.cpu.dstage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.dstage2_mmu.stage2_tlb.walker
-
-[system.cpu.dstage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.dtb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.membus.slave[4]
-
-[system.cpu.interrupts]
-type=ArmInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=ArmISA
-decoderFlavour=Generic
-eventq_index=0
-fpsid=1090793632
-id_aa64afr0_el1=0
-id_aa64afr1_el1=0
-id_aa64dfr0_el1=1052678
-id_aa64dfr1_el1=0
-id_aa64isar0_el1=0
-id_aa64isar1_el1=0
-id_aa64mmfr0_el1=15728642
-id_aa64mmfr1_el1=0
-id_isar0=34607377
-id_isar1=34677009
-id_isar2=555950401
-id_isar3=17899825
-id_isar4=268501314
-id_isar5=0
-id_mmfr0=270536963
-id_mmfr1=0
-id_mmfr2=19070976
-id_mmfr3=34611729
-midr=1091551472
-pmu=Null
-system=system
-
-[system.cpu.istage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.itb
-
-[system.cpu.istage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.istage2_mmu.stage2_tlb.walker
-
-[system.cpu.istage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.itb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.membus.slave[3]
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/simerr b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/simerr
deleted file mode 100755 (executable)
index d460328..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/simout b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/simout
deleted file mode 100755 (executable)
index 6f08479..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic-dummychecker/simout
-Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic-dummychecker/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 17:55:48
-gem5 started Apr  3 2017 17:56:13
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 54232
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic-dummychecker --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/arm/linux/simple-atomic-dummychecker
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 2695000 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/stats.txt
deleted file mode 100644 (file)
index d2c8b96..0000000
+++ /dev/null
@@ -1,384 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000003                      
-sim_ticks                                     2695000                      
-final_tick                                    2695000                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 413531                      
-host_op_rate                                   483368                      
-host_tick_rate                              241807981                      
-host_mem_usage                                 270560                      
-host_seconds                                     0.01                      
-sim_insts                                        4592                      
-sim_ops                                          5378                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED      2695000                      
-system.physmem.bytes_read::cpu.inst             18420                      
-system.physmem.bytes_read::cpu.data              4491                      
-system.physmem.bytes_read::total                22911                      
-system.physmem.bytes_inst_read::cpu.inst        18420                      
-system.physmem.bytes_inst_read::total           18420                      
-system.physmem.bytes_written::cpu.data           3648                      
-system.physmem.bytes_written::total              3648                      
-system.physmem.num_reads::cpu.inst               4605                      
-system.physmem.num_reads::cpu.data               1003                      
-system.physmem.num_reads::total                  5608                      
-system.physmem.num_writes::cpu.data               924                      
-system.physmem.num_writes::total                  924                      
-system.physmem.bw_read::cpu.inst           6834879406                      
-system.physmem.bw_read::cpu.data           1666419295                      
-system.physmem.bw_read::total              8501298701                      
-system.physmem.bw_inst_read::cpu.inst      6834879406                      
-system.physmem.bw_inst_read::total         6834879406                      
-system.physmem.bw_write::cpu.data          1353617811                      
-system.physmem.bw_write::total             1353617811                      
-system.physmem.bw_total::cpu.inst          6834879406                      
-system.physmem.bw_total::cpu.data          3020037106                      
-system.physmem.bw_total::total             9854916512                      
-system.pwrStateResidencyTicks::UNDEFINED      2695000                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED      2695000                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.read_hits            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.read_misses            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.write_hits            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.write_misses            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.flush_tlb            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.checker.dstage2_mmu.stage2_tlb.flush_tlb_asid            0                      
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-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     63.55%
-system.cpu.op_class::MemRead                     1027     19.05%     82.60%
-system.cpu.op_class::MemWrite                     922     17.10%     99.70%
-system.cpu.op_class::FloatMemRead                   0      0.00%     99.70%
-system.cpu.op_class::FloatMemWrite                 16      0.30%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       5391                      
-system.membus.snoop_filter.tot_requests             0                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED      2695000                      
-system.membus.trans_dist::ReadReq                5597                      
-system.membus.trans_dist::ReadResp               5608                      
-system.membus.trans_dist::WriteReq                913                      
-system.membus.trans_dist::WriteResp               913                      
-system.membus.trans_dist::LoadLockedReq            11                      
-system.membus.trans_dist::StoreCondReq             11                      
-system.membus.trans_dist::StoreCondResp            11                      
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port         9210                      
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port         3854                      
-system.membus.pkt_count::total                  13064                      
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port        18420                      
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port         8139                      
-system.membus.pkt_size::total                   26559                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples              6532                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                    6532    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                6532                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini
deleted file mode 100644 (file)
index c1120b4..0000000
+++ /dev/null
@@ -1,330 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=AtomicSimpleCPU
-children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dstage2_mmu=system.cpu.dstage2_mmu
-dtb=system.cpu.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-istage2_mmu=system.cpu.istage2_mmu
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-width=1
-workload=system.cpu.workload
-dcache_port=system.membus.slave[2]
-icache_port=system.membus.slave[1]
-
-[system.cpu.dstage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.dtb
-
-[system.cpu.dstage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.dstage2_mmu.stage2_tlb.walker
-
-[system.cpu.dstage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.dtb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.membus.slave[4]
-
-[system.cpu.interrupts]
-type=ArmInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=ArmISA
-decoderFlavour=Generic
-eventq_index=0
-fpsid=1090793632
-id_aa64afr0_el1=0
-id_aa64afr1_el1=0
-id_aa64dfr0_el1=1052678
-id_aa64dfr1_el1=0
-id_aa64isar0_el1=0
-id_aa64isar1_el1=0
-id_aa64mmfr0_el1=15728642
-id_aa64mmfr1_el1=0
-id_isar0=34607377
-id_isar1=34677009
-id_isar2=555950401
-id_isar3=17899825
-id_isar4=268501314
-id_isar5=0
-id_mmfr0=270536963
-id_mmfr1=0
-id_mmfr2=19070976
-id_mmfr3=34611729
-midr=1091551472
-pmu=Null
-system=system
-
-[system.cpu.istage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.itb
-
-[system.cpu.istage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.istage2_mmu.stage2_tlb.walker
-
-[system.cpu.istage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.itb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.membus.slave[3]
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simerr b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simerr
deleted file mode 100755 (executable)
index c0b55d1..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simout
deleted file mode 100755 (executable)
index ffacc89..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic/simout
-Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 17:55:48
-gem5 started Apr  3 2017 17:58:26
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 54584
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/arm/linux/simple-atomic
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 2695000 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/stats.txt
deleted file mode 100644 (file)
index 9a08bb7..0000000
+++ /dev/null
@@ -1,260 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000003                      
-sim_ticks                                     2695000                      
-final_tick                                    2695000                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 427927                      
-host_op_rate                                   500175                      
-host_tick_rate                              250203319                      
-host_mem_usage                                 269284                      
-host_seconds                                     0.01                      
-sim_insts                                        4592                      
-sim_ops                                          5378                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED      2695000                      
-system.physmem.bytes_read::cpu.inst             18420                      
-system.physmem.bytes_read::cpu.data              4491                      
-system.physmem.bytes_read::total                22911                      
-system.physmem.bytes_inst_read::cpu.inst        18420                      
-system.physmem.bytes_inst_read::total           18420                      
-system.physmem.bytes_written::cpu.data           3648                      
-system.physmem.bytes_written::total              3648                      
-system.physmem.num_reads::cpu.inst               4605                      
-system.physmem.num_reads::cpu.data               1003                      
-system.physmem.num_reads::total                  5608                      
-system.physmem.num_writes::cpu.data               924                      
-system.physmem.num_writes::total                  924                      
-system.physmem.bw_read::cpu.inst           6834879406                      
-system.physmem.bw_read::cpu.data           1666419295                      
-system.physmem.bw_read::total              8501298701                      
-system.physmem.bw_inst_read::cpu.inst      6834879406                      
-system.physmem.bw_inst_read::total         6834879406                      
-system.physmem.bw_write::cpu.data          1353617811                      
-system.physmem.bw_write::total             1353617811                      
-system.physmem.bw_total::cpu.inst          6834879406                      
-system.physmem.bw_total::cpu.data          3020037106                      
-system.physmem.bw_total::total             9854916512                      
-system.pwrStateResidencyTicks::UNDEFINED      2695000                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED      2695000                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_entries            0                      
-system.cpu.dstage2_mmu.stage2_tlb.align_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.domain_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.perms_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.hits              0                      
-system.cpu.dstage2_mmu.stage2_tlb.misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.accesses            0                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED      2695000                      
-system.cpu.dtb.walker.walks                         0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin::total            0                      
-system.cpu.dtb.inst_hits                            0                      
-system.cpu.dtb.inst_misses                          0                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.flush_tlb                            0                      
-system.cpu.dtb.flush_tlb_mva                        0                      
-system.cpu.dtb.flush_tlb_mva_asid                   0                      
-system.cpu.dtb.flush_tlb_asid                       0                      
-system.cpu.dtb.flush_entries                        0                      
-system.cpu.dtb.align_faults                         0                      
-system.cpu.dtb.prefetch_faults                      0                      
-system.cpu.dtb.domain_faults                        0                      
-system.cpu.dtb.perms_faults                         0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.inst_accesses                        0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED      2695000                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_entries            0                      
-system.cpu.istage2_mmu.stage2_tlb.align_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.prefetch_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.domain_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.perms_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.hits              0                      
-system.cpu.istage2_mmu.stage2_tlb.misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.accesses            0                      
-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED      2695000                      
-system.cpu.itb.walker.walks                         0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.itb.walker.walkRequestOrigin::total            0                      
-system.cpu.itb.inst_hits                            0                      
-system.cpu.itb.inst_misses                          0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.flush_tlb                            0                      
-system.cpu.itb.flush_tlb_mva                        0                      
-system.cpu.itb.flush_tlb_mva_asid                   0                      
-system.cpu.itb.flush_tlb_asid                       0                      
-system.cpu.itb.flush_entries                        0                      
-system.cpu.itb.align_faults                         0                      
-system.cpu.itb.prefetch_faults                      0                      
-system.cpu.itb.domain_faults                        0                      
-system.cpu.itb.perms_faults                         0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.inst_accesses                        0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.workload.numSyscalls                    13                      
-system.cpu.pwrStateResidencyTicks::ON         2695000                      
-system.cpu.numCycles                             5391                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        4592                      
-system.cpu.committedOps                          5378                      
-system.cpu.num_int_alu_accesses                  4624                      
-system.cpu.num_fp_alu_accesses                     16                      
-system.cpu.num_func_calls                         203                      
-system.cpu.num_conditional_control_insts          722                      
-system.cpu.num_int_insts                         4624                      
-system.cpu.num_fp_insts                            16                      
-system.cpu.num_int_register_reads                7572                      
-system.cpu.num_int_register_writes               2728                      
-system.cpu.num_fp_register_reads                   16                      
-system.cpu.num_fp_register_writes                   0                      
-system.cpu.num_cc_register_reads                16175                      
-system.cpu.num_cc_register_writes                2432                      
-system.cpu.num_mem_refs                          1965                      
-system.cpu.num_load_insts                        1027                      
-system.cpu.num_store_insts                        938                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                       5391                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1008                      
-system.cpu.op_class::No_OpClass                     0      0.00%      0.00%
-system.cpu.op_class::IntAlu                      3419     63.42%     63.42%
-system.cpu.op_class::IntMult                        4      0.07%     63.49%
-system.cpu.op_class::IntDiv                         0      0.00%     63.49%
-system.cpu.op_class::FloatAdd                       0      0.00%     63.49%
-system.cpu.op_class::FloatCmp                       0      0.00%     63.49%
-system.cpu.op_class::FloatCvt                       0      0.00%     63.49%
-system.cpu.op_class::FloatMult                      0      0.00%     63.49%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     63.49%
-system.cpu.op_class::FloatDiv                       0      0.00%     63.49%
-system.cpu.op_class::FloatMisc                      0      0.00%     63.49%
-system.cpu.op_class::FloatSqrt                      0      0.00%     63.49%
-system.cpu.op_class::SimdAdd                        0      0.00%     63.49%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     63.49%
-system.cpu.op_class::SimdAlu                        0      0.00%     63.49%
-system.cpu.op_class::SimdCmp                        0      0.00%     63.49%
-system.cpu.op_class::SimdCvt                        0      0.00%     63.49%
-system.cpu.op_class::SimdMisc                       0      0.00%     63.49%
-system.cpu.op_class::SimdMult                       0      0.00%     63.49%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     63.49%
-system.cpu.op_class::SimdShift                      0      0.00%     63.49%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     63.49%
-system.cpu.op_class::SimdSqrt                       0      0.00%     63.49%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     63.49%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     63.49%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     63.49%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     63.49%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     63.49%
-system.cpu.op_class::SimdFloatMisc                  3      0.06%     63.55%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     63.55%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     63.55%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     63.55%
-system.cpu.op_class::MemRead                     1027     19.05%     82.60%
-system.cpu.op_class::MemWrite                     922     17.10%     99.70%
-system.cpu.op_class::FloatMemRead                   0      0.00%     99.70%
-system.cpu.op_class::FloatMemWrite                 16      0.30%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       5391                      
-system.membus.snoop_filter.tot_requests             0                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED      2695000                      
-system.membus.trans_dist::ReadReq                5597                      
-system.membus.trans_dist::ReadResp               5608                      
-system.membus.trans_dist::WriteReq                913                      
-system.membus.trans_dist::WriteResp               913                      
-system.membus.trans_dist::LoadLockedReq            11                      
-system.membus.trans_dist::StoreCondReq             11                      
-system.membus.trans_dist::StoreCondResp            11                      
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port         9210                      
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port         3854                      
-system.membus.pkt_count::total                  13064                      
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port        18420                      
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port         8139                      
-system.membus.pkt_size::total                   26559                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples              6532                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                    6532    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                6532                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/config.ini
deleted file mode 100644 (file)
index 4f88d60..0000000
+++ /dev/null
@@ -1,499 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dstage2_mmu=system.cpu.dstage2_mmu
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-istage2_mmu=system.cpu.istage2_mmu
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dstage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.dtb
-
-[system.cpu.dstage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.dstage2_mmu.stage2_tlb.walker
-
-[system.cpu.dstage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.dtb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[3]
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=ArmInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=ArmISA
-decoderFlavour=Generic
-eventq_index=0
-fpsid=1090793632
-id_aa64afr0_el1=0
-id_aa64afr1_el1=0
-id_aa64dfr0_el1=1052678
-id_aa64dfr1_el1=0
-id_aa64isar0_el1=0
-id_aa64isar1_el1=0
-id_aa64mmfr0_el1=15728642
-id_aa64mmfr1_el1=0
-id_isar0=34607377
-id_isar1=34677009
-id_isar2=555950401
-id_isar3=17899825
-id_isar4=268501314
-id_isar5=0
-id_mmfr0=270536963
-id_mmfr1=0
-id_mmfr2=19070976
-id_mmfr3=34611729
-midr=1091551472
-pmu=Null
-system=system
-
-[system.cpu.istage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.itb
-
-[system.cpu.istage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.istage2_mmu.stage2_tlb.walker
-
-[system.cpu.istage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.itb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[2]
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/simerr b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/simerr
deleted file mode 100755 (executable)
index c0b55d1..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout
deleted file mode 100755 (executable)
index b914fe5..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing/simout
-Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 17:55:48
-gem5 started Apr  3 2017 18:13:17
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 56989
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/arm/linux/simple-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 28648500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt
deleted file mode 100644 (file)
index 76c17a4..0000000
+++ /dev/null
@@ -1,630 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000029                      
-sim_ticks                                    28648500                      
-final_tick                                   28648500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 277751                      
-host_op_rate                                   323869                      
-host_tick_rate                             1739012040                      
-host_mem_usage                                 279272                      
-host_seconds                                     0.02                      
-sim_insts                                        4566                      
-sim_ops                                          5330                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED     28648500                      
-system.physmem.bytes_read::cpu.inst             14400                      
-system.physmem.bytes_read::cpu.data              8000                      
-system.physmem.bytes_read::total                22400                      
-system.physmem.bytes_inst_read::cpu.inst        14400                      
-system.physmem.bytes_inst_read::total           14400                      
-system.physmem.num_reads::cpu.inst                225                      
-system.physmem.num_reads::cpu.data                125                      
-system.physmem.num_reads::total                   350                      
-system.physmem.bw_read::cpu.inst            502644117                      
-system.physmem.bw_read::cpu.data            279246732                      
-system.physmem.bw_read::total               781890849                      
-system.physmem.bw_inst_read::cpu.inst       502644117                      
-system.physmem.bw_inst_read::total          502644117                      
-system.physmem.bw_total::cpu.inst           502644117                      
-system.physmem.bw_total::cpu.data           279246732                      
-system.physmem.bw_total::total              781890849                      
-system.pwrStateResidencyTicks::UNDEFINED     28648500                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED     28648500                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_entries            0                      
-system.cpu.dstage2_mmu.stage2_tlb.align_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.domain_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.perms_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.hits              0                      
-system.cpu.dstage2_mmu.stage2_tlb.misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.accesses            0                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED     28648500                      
-system.cpu.dtb.walker.walks                         0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin::total            0                      
-system.cpu.dtb.inst_hits                            0                      
-system.cpu.dtb.inst_misses                          0                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.flush_tlb                            0                      
-system.cpu.dtb.flush_tlb_mva                        0                      
-system.cpu.dtb.flush_tlb_mva_asid                   0                      
-system.cpu.dtb.flush_tlb_asid                       0                      
-system.cpu.dtb.flush_entries                        0                      
-system.cpu.dtb.align_faults                         0                      
-system.cpu.dtb.prefetch_faults                      0                      
-system.cpu.dtb.domain_faults                        0                      
-system.cpu.dtb.perms_faults                         0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.inst_accesses                        0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED     28648500                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_entries            0                      
-system.cpu.istage2_mmu.stage2_tlb.align_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.prefetch_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.domain_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.perms_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.hits              0                      
-system.cpu.istage2_mmu.stage2_tlb.misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.accesses            0                      
-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED     28648500                      
-system.cpu.itb.walker.walks                         0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.itb.walker.walkRequestOrigin::total            0                      
-system.cpu.itb.inst_hits                            0                      
-system.cpu.itb.inst_misses                          0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.flush_tlb                            0                      
-system.cpu.itb.flush_tlb_mva                        0                      
-system.cpu.itb.flush_tlb_mva_asid                   0                      
-system.cpu.itb.flush_tlb_asid                       0                      
-system.cpu.itb.flush_entries                        0                      
-system.cpu.itb.align_faults                         0                      
-system.cpu.itb.prefetch_faults                      0                      
-system.cpu.itb.domain_faults                        0                      
-system.cpu.itb.perms_faults                         0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.inst_accesses                        0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.workload.numSyscalls                    13                      
-system.cpu.pwrStateResidencyTicks::ON        28648500                      
-system.cpu.numCycles                            57297                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        4566                      
-system.cpu.committedOps                          5330                      
-system.cpu.num_int_alu_accesses                  4624                      
-system.cpu.num_fp_alu_accesses                     16                      
-system.cpu.num_func_calls                         203                      
-system.cpu.num_conditional_control_insts          722                      
-system.cpu.num_int_insts                         4624                      
-system.cpu.num_fp_insts                            16                      
-system.cpu.num_int_register_reads                7538                      
-system.cpu.num_int_register_writes               2728                      
-system.cpu.num_fp_register_reads                   16                      
-system.cpu.num_fp_register_writes                   0                      
-system.cpu.num_cc_register_reads                19187                      
-system.cpu.num_cc_register_writes                2432                      
-system.cpu.num_mem_refs                          1965                      
-system.cpu.num_load_insts                        1027                      
-system.cpu.num_store_insts                        938                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                      57297                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1008                      
-system.cpu.op_class::No_OpClass                     0      0.00%      0.00%
-system.cpu.op_class::IntAlu                      3419     63.42%     63.42%
-system.cpu.op_class::IntMult                        4      0.07%     63.49%
-system.cpu.op_class::IntDiv                         0      0.00%     63.49%
-system.cpu.op_class::FloatAdd                       0      0.00%     63.49%
-system.cpu.op_class::FloatCmp                       0      0.00%     63.49%
-system.cpu.op_class::FloatCvt                       0      0.00%     63.49%
-system.cpu.op_class::FloatMult                      0      0.00%     63.49%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     63.49%
-system.cpu.op_class::FloatDiv                       0      0.00%     63.49%
-system.cpu.op_class::FloatMisc                      0      0.00%     63.49%
-system.cpu.op_class::FloatSqrt                      0      0.00%     63.49%
-system.cpu.op_class::SimdAdd                        0      0.00%     63.49%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     63.49%
-system.cpu.op_class::SimdAlu                        0      0.00%     63.49%
-system.cpu.op_class::SimdCmp                        0      0.00%     63.49%
-system.cpu.op_class::SimdCvt                        0      0.00%     63.49%
-system.cpu.op_class::SimdMisc                       0      0.00%     63.49%
-system.cpu.op_class::SimdMult                       0      0.00%     63.49%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     63.49%
-system.cpu.op_class::SimdShift                      0      0.00%     63.49%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     63.49%
-system.cpu.op_class::SimdSqrt                       0      0.00%     63.49%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     63.49%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     63.49%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     63.49%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     63.49%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     63.49%
-system.cpu.op_class::SimdFloatMisc                  3      0.06%     63.55%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     63.55%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     63.55%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     63.55%
-system.cpu.op_class::MemRead                     1027     19.05%     82.60%
-system.cpu.op_class::MemWrite                     922     17.10%     99.70%
-system.cpu.op_class::FloatMemRead                   0      0.00%     99.70%
-system.cpu.op_class::FloatMemWrite                 16      0.30%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       5391                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     28648500                      
-system.cpu.dcache.tags.replacements                 0                      
-system.cpu.dcache.tags.tagsinuse            82.616265                      
-system.cpu.dcache.tags.total_refs                1786                      
-system.cpu.dcache.tags.sampled_refs               141                      
-system.cpu.dcache.tags.avg_refs             12.666667                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data    82.616265                      
-system.cpu.dcache.tags.occ_percent::cpu.data     0.020170                      
-system.cpu.dcache.tags.occ_percent::total     0.020170                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024          141                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           37                      
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-system.cpu.l2cache.demand_mshr_misses::cpu.inst          225                      
-system.cpu.l2cache.demand_mshr_misses::cpu.data          125                      
-system.cpu.l2cache.demand_mshr_misses::total          350                      
-system.cpu.l2cache.overall_mshr_misses::cpu.inst          225                      
-system.cpu.l2cache.overall_mshr_misses::cpu.data          125                      
-system.cpu.l2cache.overall_mshr_misses::total          350                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data      2171500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total      2171500                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst     11368000                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total     11368000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data      4141000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      4141000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     11368000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data      6312500                      
-system.cpu.l2cache.demand_mshr_miss_latency::total     17680500                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     11368000                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data      6312500                      
-system.cpu.l2cache.overall_mshr_miss_latency::total     17680500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.933610                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.933610                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data     0.836735                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total     0.836735                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.933610                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data     0.886525                      
-system.cpu.l2cache.demand_mshr_miss_rate::total     0.916230                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.933610                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data     0.886525                      
-system.cpu.l2cache.overall_mshr_miss_rate::total     0.916230                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total        50500                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50524.444444                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50524.444444                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total        50500                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50524.444444                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50515.714286                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50524.444444                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50515.714286                      
-system.cpu.toL2Bus.snoop_filter.tot_requests          383                      
-system.cpu.toL2Bus.snoop_filter.hit_single_requests           32                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            1                      
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     28648500                      
-system.cpu.toL2Bus.trans_dist::ReadResp           339                      
-system.cpu.toL2Bus.trans_dist::WritebackClean            1                      
-system.cpu.toL2Bus.trans_dist::ReadExReq           43                      
-system.cpu.toL2Bus.trans_dist::ReadExResp           43                      
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          241                      
-system.cpu.toL2Bus.trans_dist::ReadSharedReq           98                      
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          483                      
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          282                      
-system.cpu.toL2Bus.pkt_count::total               765                      
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        15488                      
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         9024                      
-system.cpu.toL2Bus.pkt_size::total              24512                      
-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples          382                      
-system.cpu.toL2Bus.snoop_fanout::mean        0.083770                      
-system.cpu.toL2Bus.snoop_fanout::stdev       0.277405                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0                350     91.62%     91.62%
-system.cpu.toL2Bus.snoop_fanout::1                 32      8.38%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            1                      
-system.cpu.toL2Bus.snoop_fanout::total            382                      
-system.cpu.toL2Bus.reqLayer0.occupancy         192500                      
-system.cpu.toL2Bus.reqLayer0.utilization          0.7                      
-system.cpu.toL2Bus.respLayer0.occupancy        361500                      
-system.cpu.toL2Bus.respLayer0.utilization          1.3                      
-system.cpu.toL2Bus.respLayer1.occupancy        211500                      
-system.cpu.toL2Bus.respLayer1.utilization          0.7                      
-system.membus.snoop_filter.tot_requests           350                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED     28648500                      
-system.membus.trans_dist::ReadResp                307                      
-system.membus.trans_dist::ReadExReq                43                      
-system.membus.trans_dist::ReadExResp               43                      
-system.membus.trans_dist::ReadSharedReq           307                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          700                      
-system.membus.pkt_count::total                    700                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        22400                      
-system.membus.pkt_size::total                   22400                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples               350                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                     350    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                 350                      
-system.membus.reqLayer0.occupancy              355500                      
-system.membus.reqLayer0.utilization               1.2                      
-system.membus.respLayer1.occupancy            1750000                      
-system.membus.respLayer1.utilization              6.1                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini
deleted file mode 100644 (file)
index 8fa043f..0000000
+++ /dev/null
@@ -1,875 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=DerivO3CPU
-children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload
-LFSTSize=1024
-LQEntries=32
-LSQCheckLoads=true
-LSQDepCheckShift=4
-SQEntries=32
-SSITSize=1024
-activity=0
-backComSize=5
-branchPred=system.cpu.branchPred
-cachePorts=200
-checker=Null
-clk_domain=system.cpu_clk_domain
-commitToDecodeDelay=1
-commitToFetchDelay=1
-commitToIEWDelay=1
-commitToRenameDelay=1
-commitWidth=8
-cpu_id=0
-decodeToFetchDelay=1
-decodeToRenameDelay=1
-decodeWidth=8
-default_p_state=UNDEFINED
-dispatchWidth=8
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fetchBufferSize=64
-fetchQueueSize=32
-fetchToDecodeDelay=1
-fetchTrapLatency=1
-fetchWidth=8
-forwardComSize=5
-fuPool=system.cpu.fuPool
-function_trace=false
-function_trace_start=0
-iewToCommitDelay=1
-iewToDecodeDelay=1
-iewToFetchDelay=1
-iewToRenameDelay=1
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-issueToExecuteDelay=1
-issueWidth=8
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-needsTSO=false
-numIQEntries=64
-numPhysCCRegs=0
-numPhysFloatRegs=256
-numPhysIntRegs=256
-numROBEntries=192
-numRobs=1
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-renameToDecodeDelay=1
-renameToFetchDelay=1
-renameToIEWDelay=2
-renameToROBDelay=1
-renameWidth=8
-simpoint_start_insts=
-smtCommitPolicy=RoundRobin
-smtFetchPolicy=SingleThread
-smtIQPolicy=Partitioned
-smtIQThreshold=100
-smtLSQPolicy=Partitioned
-smtLSQThreshold=100
-smtNumFetchingThreads=1
-smtROBPolicy=Partitioned
-smtROBThreshold=100
-socket_id=0
-squashWidth=8
-store_set_clear_period=250000
-switched_out=false
-system=system
-tracer=system.cpu.tracer
-trapLatency=13
-wbWidth=8
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=MipsTLB
-eventq_index=0
-size=64
-
-[system.cpu.fuPool]
-type=FUPool
-children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
-FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
-eventq_index=0
-
-[system.cpu.fuPool.FUList0]
-type=FUDesc
-children=opList
-count=6
-eventq_index=0
-opList=system.cpu.fuPool.FUList0.opList
-
-[system.cpu.fuPool.FUList0.opList]
-type=OpDesc
-eventq_index=0
-opClass=IntAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList1]
-type=FUDesc
-children=opList0 opList1
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
-
-[system.cpu.fuPool.FUList1.opList0]
-type=OpDesc
-eventq_index=0
-opClass=IntMult
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList1.opList1]
-type=OpDesc
-eventq_index=0
-opClass=IntDiv
-opLat=20
-pipelined=false
-
-[system.cpu.fuPool.FUList2]
-type=FUDesc
-children=opList0 opList1 opList2
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
-
-[system.cpu.fuPool.FUList2.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatAdd
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatCmp
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatCvt
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList3]
-type=FUDesc
-children=opList0 opList1 opList2 opList3 opList4
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 system.cpu.fuPool.FUList3.opList3 system.cpu.fuPool.FUList3.opList4
-
-[system.cpu.fuPool.FUList3.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatMult
-opLat=4
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMultAcc
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMisc
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatDiv
-opLat=12
-pipelined=false
-
-[system.cpu.fuPool.FUList3.opList4]
-type=OpDesc
-eventq_index=0
-opClass=FloatSqrt
-opLat=24
-pipelined=false
-
-[system.cpu.fuPool.FUList4]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList4.opList0 system.cpu.fuPool.FUList4.opList1
-
-[system.cpu.fuPool.FUList4.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5]
-type=FUDesc
-children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
-
-[system.cpu.fuPool.FUList5.opList00]
-type=OpDesc
-eventq_index=0
-opClass=SimdAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList01]
-type=OpDesc
-eventq_index=0
-opClass=SimdAddAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList02]
-type=OpDesc
-eventq_index=0
-opClass=SimdAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList03]
-type=OpDesc
-eventq_index=0
-opClass=SimdCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList04]
-type=OpDesc
-eventq_index=0
-opClass=SimdCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList05]
-type=OpDesc
-eventq_index=0
-opClass=SimdMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList06]
-type=OpDesc
-eventq_index=0
-opClass=SimdMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList07]
-type=OpDesc
-eventq_index=0
-opClass=SimdMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList08]
-type=OpDesc
-eventq_index=0
-opClass=SimdShift
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList09]
-type=OpDesc
-eventq_index=0
-opClass=SimdShiftAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList10]
-type=OpDesc
-eventq_index=0
-opClass=SimdSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList11]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList12]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList13]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList14]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList15]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatDiv
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList16]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList17]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList18]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList19]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1
-
-[system.cpu.fuPool.FUList6.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7]
-type=FUDesc
-children=opList0 opList1 opList2 opList3
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 system.cpu.fuPool.FUList7.opList2 system.cpu.fuPool.FUList7.opList3
-
-[system.cpu.fuPool.FUList7.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList1]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList8]
-type=FUDesc
-children=opList
-count=1
-eventq_index=0
-opList=system.cpu.fuPool.FUList8.opList
-
-[system.cpu.fuPool.FUList8.opList]
-type=OpDesc
-eventq_index=0
-opClass=IprAccess
-opLat=3
-pipelined=false
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=MipsInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=MipsISA
-eventq_index=0
-num_threads=1
-num_vpes=1
-system=system
-
-[system.cpu.itb]
-type=MipsTLB
-eventq_index=0
-size=64
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=LiveProcess
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/dist/m5/regression/test-progs/hello/bin/mips/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-max_stack_size=67108864
-output=cout
-pid=100
-ppid=99
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-page_policy=open_adaptive
-power_model=Null
-range=0:134217727:0:0:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10000
-static_frontend_latency=10000
-tBURST=5000
-tCCD_L=0
-tCK=1250
-tCL=13750
-tCS=2500
-tRAS=35000
-tRCD=13750
-tREFI=7800000
-tRFC=260000
-tRP=13750
-tRRD=6000
-tRRD_L=0
-tRTP=7500
-tRTW=2500
-tWR=15000
-tWTR=7500
-tXAW=30000
-tXP=6000
-tXPDLL=0
-tXS=270000
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/simerr b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/simerr
deleted file mode 100755 (executable)
index bbcd9d7..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/simout
deleted file mode 100755 (executable)
index b753438..0000000
+++ /dev/null
@@ -1,15 +0,0 @@
-Redirecting stdout to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing/simout
-Redirecting stderr to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Nov 29 2016 18:13:44
-gem5 started Nov 29 2016 18:14:01
-gem5 executing on zizzer, pid 32698
-command line: /z/powerjg/gem5-upstream/build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing -re /z/powerjg/gem5-upstream/tests/testing/../run.py quick/se/00.hello/mips/linux/o3-timing
-
-Global frequency set at 1000000000000 ticks per second
-info: Entering event queue @ 0.  Starting simulation...
-info: Increasing stack size by one page.
-Hello World!
-Exiting @ tick 24405000 because target called exit()
diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt
deleted file mode 100644 (file)
index 0eb508f..0000000
+++ /dev/null
@@ -1,1015 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000024                       # Number of seconds simulated
-sim_ticks                                    24405000                       # Number of ticks simulated
-final_tick                                   24405000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
-sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 119579                       # Simulator instruction rate (inst/s)
-host_op_rate                                   119550                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              583509526                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 251420                       # Number of bytes of host memory used
-host_seconds                                     0.04                       # Real time elapsed on the host
-sim_insts                                        4999                       # Number of instructions simulated
-sim_ops                                          4999                       # Number of ops (including micro ops) simulated
-system.voltage_domain.voltage                       1                       # Voltage in Volts
-system.clk_domain.clock                          1000                       # Clock period in ticks
-system.physmem.pwrStateResidencyTicks::UNDEFINED     24405000                       # Cumulative time (in ticks) in various power states
-system.physmem.bytes_read::cpu.inst             21056                       # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.data              8960                       # Number of bytes read from this memory
-system.physmem.bytes_read::total                30016                       # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst        21056                       # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total           21056                       # Number of instructions bytes read from this memory
-system.physmem.num_reads::cpu.inst                329                       # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.data                140                       # Number of read requests responded to by this memory
-system.physmem.num_reads::total                   469                       # Number of read requests responded to by this memory
-system.physmem.bw_read::cpu.inst            862774022                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data            367137882                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total              1229911903                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst       862774022                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total          862774022                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst           862774022                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data           367137882                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total             1229911903                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs                           469                       # Number of read requests accepted
-system.physmem.writeReqs                            0                       # Number of write requests accepted
-system.physmem.readBursts                         469                       # Number of DRAM read bursts, including those serviced by the write queue
-system.physmem.writeBursts                          0                       # Number of DRAM write bursts, including those merged in the write queue
-system.physmem.bytesReadDRAM                    30016                       # Total number of bytes read from DRAM
-system.physmem.bytesReadWrQ                         0                       # Total number of bytes read from write queue
-system.physmem.bytesWritten                         0                       # Total number of bytes written to DRAM
-system.physmem.bytesReadSys                     30016                       # Total read bytes from the system interface side
-system.physmem.bytesWrittenSys                      0                       # Total written bytes from the system interface side
-system.physmem.servicedByWrQ                        0                       # Number of DRAM read bursts serviced by the write queue
-system.physmem.mergedWrBursts                       0                       # Number of DRAM write bursts merged with an existing one
-system.physmem.neitherReadNorWriteReqs              0                       # Number of requests that are neither read nor write
-system.physmem.perBankRdBursts::0                  29                       # Per bank write bursts
-system.physmem.perBankRdBursts::1                   0                       # Per bank write bursts
-system.physmem.perBankRdBursts::2                   1                       # Per bank write bursts
-system.physmem.perBankRdBursts::3                   0                       # Per bank write bursts
-system.physmem.perBankRdBursts::4                   7                       # Per bank write bursts
-system.physmem.perBankRdBursts::5                   3                       # Per bank write bursts
-system.physmem.perBankRdBursts::6                  13                       # Per bank write bursts
-system.physmem.perBankRdBursts::7                  53                       # Per bank write bursts
-system.physmem.perBankRdBursts::8                  59                       # Per bank write bursts
-system.physmem.perBankRdBursts::9                  76                       # Per bank write bursts
-system.physmem.perBankRdBursts::10                 43                       # Per bank write bursts
-system.physmem.perBankRdBursts::11                 21                       # Per bank write bursts
-system.physmem.perBankRdBursts::12                 51                       # Per bank write bursts
-system.physmem.perBankRdBursts::13                 29                       # Per bank write bursts
-system.physmem.perBankRdBursts::14                 77                       # Per bank write bursts
-system.physmem.perBankRdBursts::15                  7                       # Per bank write bursts
-system.physmem.perBankWrBursts::0                   0                       # Per bank write bursts
-system.physmem.perBankWrBursts::1                   0                       # Per bank write bursts
-system.physmem.perBankWrBursts::2                   0                       # Per bank write bursts
-system.physmem.perBankWrBursts::3                   0                       # Per bank write bursts
-system.physmem.perBankWrBursts::4                   0                       # Per bank write bursts
-system.physmem.perBankWrBursts::5                   0                       # Per bank write bursts
-system.physmem.perBankWrBursts::6                   0                       # Per bank write bursts
-system.physmem.perBankWrBursts::7                   0                       # Per bank write bursts
-system.physmem.perBankWrBursts::8                   0                       # Per bank write bursts
-system.physmem.perBankWrBursts::9                   0                       # Per bank write bursts
-system.physmem.perBankWrBursts::10                  0                       # Per bank write bursts
-system.physmem.perBankWrBursts::11                  0                       # Per bank write bursts
-system.physmem.perBankWrBursts::12                  0                       # Per bank write bursts
-system.physmem.perBankWrBursts::13                  0                       # Per bank write bursts
-system.physmem.perBankWrBursts::14                  0                       # Per bank write bursts
-system.physmem.perBankWrBursts::15                  0                       # Per bank write bursts
-system.physmem.numRdRetry                           0                       # Number of times read queue was full causing retry
-system.physmem.numWrRetry                           0                       # Number of times write queue was full causing retry
-system.physmem.totGap                        24305500                       # Total gap between requests
-system.physmem.readPktSize::0                       0                       # Read request sizes (log2)
-system.physmem.readPktSize::1                       0                       # Read request sizes (log2)
-system.physmem.readPktSize::2                       0                       # Read request sizes (log2)
-system.physmem.readPktSize::3                       0                       # Read request sizes (log2)
-system.physmem.readPktSize::4                       0                       # Read request sizes (log2)
-system.physmem.readPktSize::5                       0                       # Read request sizes (log2)
-system.physmem.readPktSize::6                     469                       # Read request sizes (log2)
-system.physmem.writePktSize::0                      0                       # Write request sizes (log2)
-system.physmem.writePktSize::1                      0                       # Write request sizes (log2)
-system.physmem.writePktSize::2                      0                       # Write request sizes (log2)
-system.physmem.writePktSize::3                      0                       # Write request sizes (log2)
-system.physmem.writePktSize::4                      0                       # Write request sizes (log2)
-system.physmem.writePktSize::5                      0                       # Write request sizes (log2)
-system.physmem.writePktSize::6                      0                       # Write request sizes (log2)
-system.physmem.rdQLenPdf::0                       270                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::1                       135                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::2                        40                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::3                        17                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::4                         7                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::5                         0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::6                         0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::7                         0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::8                         0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::9                         0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::10                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::11                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::12                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::13                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::14                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::15                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::16                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::17                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::18                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::19                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::20                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::21                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::22                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::23                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::24                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::25                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::26                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::27                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::28                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::29                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::30                        0                       # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::31                        0                       # What read queue length does an incoming req see
-system.physmem.wrQLenPdf::0                         0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::1                         0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::2                         0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::3                         0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::4                         0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::5                         0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::6                         0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::7                         0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::8                         0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::9                         0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::10                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::11                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::12                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::13                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::14                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::15                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::16                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::17                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::18                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::19                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::20                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::21                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::22                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::23                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::24                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::25                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::26                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::27                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::28                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::29                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::30                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::31                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::32                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::33                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::34                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::35                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::36                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::37                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::38                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::39                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::40                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::41                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::42                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::43                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::44                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::45                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::46                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::47                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::48                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::49                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::50                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::51                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::52                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::53                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::54                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::55                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::56                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::57                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::58                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::59                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::60                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::61                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::62                        0                       # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::63                        0                       # What write queue length does an incoming req see
-system.physmem.bytesPerActivate::samples          114                       # Bytes accessed per row activation
-system.physmem.bytesPerActivate::mean      261.614035                       # Bytes accessed per row activation
-system.physmem.bytesPerActivate::gmean     175.762153                       # Bytes accessed per row activation
-system.physmem.bytesPerActivate::stdev     255.654479                       # Bytes accessed per row activation
-system.physmem.bytesPerActivate::0-127             36     31.58%     31.58% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::128-255           34     29.82%     61.40% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::256-383           19     16.67%     78.07% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::384-511            8      7.02%     85.09% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::512-639            4      3.51%     88.60% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::640-767            2      1.75%     90.35% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::768-895            4      3.51%     93.86% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::896-1023            3      2.63%     96.49% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::1024-1151            4      3.51%    100.00% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::total            114                       # Bytes accessed per row activation
-system.physmem.totQLat                        7589250                       # Total ticks spent queuing
-system.physmem.totMemAccLat                  16383000                       # Total ticks spent from burst creation until serviced by the DRAM
-system.physmem.totBusLat                      2345000                       # Total ticks spent in databus transfers
-system.physmem.avgQLat                       16181.77                       # Average queueing delay per DRAM burst
-system.physmem.avgBusLat                      5000.00                       # Average bus latency per DRAM burst
-system.physmem.avgMemAccLat                  34931.77                       # Average memory access latency per DRAM burst
-system.physmem.avgRdBW                        1229.91                       # Average DRAM read bandwidth in MiByte/s
-system.physmem.avgWrBW                           0.00                       # Average achieved write bandwidth in MiByte/s
-system.physmem.avgRdBWSys                     1229.91                       # Average system read bandwidth in MiByte/s
-system.physmem.avgWrBWSys                        0.00                       # Average system write bandwidth in MiByte/s
-system.physmem.peakBW                        12800.00                       # Theoretical peak bandwidth in MiByte/s
-system.physmem.busUtil                           9.61                       # Data bus utilization in percentage
-system.physmem.busUtilRead                       9.61                       # Data bus utilization in percentage for reads
-system.physmem.busUtilWrite                      0.00                       # Data bus utilization in percentage for writes
-system.physmem.avgRdQLen                         1.76                       # Average read queue length when enqueuing
-system.physmem.avgWrQLen                         0.00                       # Average write queue length when enqueuing
-system.physmem.readRowHits                        352                       # Number of row buffer hits during reads
-system.physmem.writeRowHits                         0                       # Number of row buffer hits during writes
-system.physmem.readRowHitRate                   75.05                       # Row buffer hit rate for reads
-system.physmem.writeRowHitRate                    nan                       # Row buffer hit rate for writes
-system.physmem.avgGap                        51824.09                       # Average gap between requests
-system.physmem.pageHitRate                      75.05                       # Row buffer hit rate, read and write combined
-system.physmem_0.actEnergy                     192780                       # Energy for activate commands per rank (pJ)
-system.physmem_0.preEnergy                      98670                       # Energy for precharge commands per rank (pJ)
-system.physmem_0.readEnergy                    756840                       # Energy for read commands per rank (pJ)
-system.physmem_0.writeEnergy                        0                       # Energy for write commands per rank (pJ)
-system.physmem_0.refreshEnergy           1843920.000000                       # Energy for refresh commands per rank (pJ)
-system.physmem_0.actBackEnergy                1603980                       # Energy for active background per rank (pJ)
-system.physmem_0.preBackEnergy                  46560                       # Energy for precharge background per rank (pJ)
-system.physmem_0.actPowerDownEnergy           8337960                       # Energy for active power-down per rank (pJ)
-system.physmem_0.prePowerDownEnergy            952800                       # Energy for precharge power-down per rank (pJ)
-system.physmem_0.selfRefreshEnergy                  0                       # Energy for self refresh per rank (pJ)
-system.physmem_0.totalEnergy                 13833510                       # Total energy per rank (pJ)
-system.physmem_0.averagePower              566.830977                       # Core power per rank (mW)
-system.physmem_0.totalIdleTime               20709000                       # Total Idle time Per DRAM Rank
-system.physmem_0.memoryStateTime::IDLE          23500                       # Time in different power states
-system.physmem_0.memoryStateTime::REF          780000                       # Time in different power states
-system.physmem_0.memoryStateTime::SREF              0                       # Time in different power states
-system.physmem_0.memoryStateTime::PRE_PDN      2481250                       # Time in different power states
-system.physmem_0.memoryStateTime::ACT         2828750                       # Time in different power states
-system.physmem_0.memoryStateTime::ACT_PDN     18291500                       # Time in different power states
-system.physmem_1.actEnergy                     642600                       # Energy for activate commands per rank (pJ)
-system.physmem_1.preEnergy                     333960                       # Energy for precharge commands per rank (pJ)
-system.physmem_1.readEnergy                   2591820                       # Energy for read commands per rank (pJ)
-system.physmem_1.writeEnergy                        0                       # Energy for write commands per rank (pJ)
-system.physmem_1.refreshEnergy           1843920.000000                       # Energy for refresh commands per rank (pJ)
-system.physmem_1.actBackEnergy                4208310                       # Energy for active background per rank (pJ)
-system.physmem_1.preBackEnergy                  89280                       # Energy for precharge background per rank (pJ)
-system.physmem_1.actPowerDownEnergy           6602310                       # Energy for active power-down per rank (pJ)
-system.physmem_1.prePowerDownEnergy            178560                       # Energy for precharge power-down per rank (pJ)
-system.physmem_1.selfRefreshEnergy                  0                       # Energy for self refresh per rank (pJ)
-system.physmem_1.totalEnergy                 16490760                       # Total energy per rank (pJ)
-system.physmem_1.averagePower              675.712354                       # Core power per rank (mW)
-system.physmem_1.totalIdleTime               14889250                       # Total Idle time Per DRAM Rank
-system.physmem_1.memoryStateTime::IDLE         122500                       # Time in different power states
-system.physmem_1.memoryStateTime::REF          780000                       # Time in different power states
-system.physmem_1.memoryStateTime::SREF              0                       # Time in different power states
-system.physmem_1.memoryStateTime::PRE_PDN       464250                       # Time in different power states
-system.physmem_1.memoryStateTime::ACT         8563750                       # Time in different power states
-system.physmem_1.memoryStateTime::ACT_PDN     14474500                       # Time in different power states
-system.pwrStateResidencyTicks::UNDEFINED     24405000                       # Cumulative time (in ticks) in various power states
-system.cpu.branchPred.lookups                    2177                       # Number of BP lookups
-system.cpu.branchPred.condPredicted              1448                       # Number of conditional branches predicted
-system.cpu.branchPred.condIncorrect               422                       # Number of conditional branches incorrect
-system.cpu.branchPred.BTBLookups                 1779                       # Number of BTB lookups
-system.cpu.branchPred.BTBHits                     589                       # Number of BTB hits
-system.cpu.branchPred.BTBCorrect                    0                       # Number of correct BTB predictions (this stat may not work properly.
-system.cpu.branchPred.BTBHitPct             33.108488                       # BTB Hit Percentage
-system.cpu.branchPred.usedRAS                     251                       # Number of times the RAS was used to get a target.
-system.cpu.branchPred.RASInCorrect                 70                       # Number of incorrect RAS predictions.
-system.cpu.branchPred.indirectLookups             270                       # Number of indirect predictor lookups.
-system.cpu.branchPred.indirectHits                  2                       # Number of indirect target hits.
-system.cpu.branchPred.indirectMisses              268                       # Number of indirect misses.
-system.cpu.branchPredindirectMispredicted           95                       # Number of mispredicted indirect branches.
-system.cpu_clk_domain.clock                       500                       # Clock period in ticks
-system.cpu.dtb.read_hits                            0                       # DTB read hits
-system.cpu.dtb.read_misses                          0                       # DTB read misses
-system.cpu.dtb.read_accesses                        0                       # DTB read accesses
-system.cpu.dtb.write_hits                           0                       # DTB write hits
-system.cpu.dtb.write_misses                         0                       # DTB write misses
-system.cpu.dtb.write_accesses                       0                       # DTB write accesses
-system.cpu.dtb.hits                                 0                       # DTB hits
-system.cpu.dtb.misses                               0                       # DTB misses
-system.cpu.dtb.accesses                             0                       # DTB accesses
-system.cpu.itb.read_hits                            0                       # DTB read hits
-system.cpu.itb.read_misses                          0                       # DTB read misses
-system.cpu.itb.read_accesses                        0                       # DTB read accesses
-system.cpu.itb.write_hits                           0                       # DTB write hits
-system.cpu.itb.write_misses                         0                       # DTB write misses
-system.cpu.itb.write_accesses                       0                       # DTB write accesses
-system.cpu.itb.hits                                 0                       # DTB hits
-system.cpu.itb.misses                               0                       # DTB misses
-system.cpu.itb.accesses                             0                       # DTB accesses
-system.cpu.workload.numSyscalls                     7                       # Number of system calls
-system.cpu.pwrStateResidencyTicks::ON        24405000                       # Cumulative time (in ticks) in various power states
-system.cpu.numCycles                            48811                       # number of cpu cycles simulated
-system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
-system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
-system.cpu.fetch.icacheStallCycles               9085                       # Number of cycles fetch is stalled on an Icache miss
-system.cpu.fetch.Insts                          12947                       # Number of instructions fetch has processed
-system.cpu.fetch.Branches                        2177                       # Number of branches that fetch encountered
-system.cpu.fetch.predictedBranches                842                       # Number of branches that fetch has predicted taken
-system.cpu.fetch.Cycles                          5440                       # Number of cycles fetch has run and was not squashing or blocked
-system.cpu.fetch.SquashCycles                     864                       # Number of cycles fetch has spent squashing
-system.cpu.fetch.PendingTrapStallCycles           205                       # Number of stall cycles due to pending traps
-system.cpu.fetch.CacheLines                      2046                       # Number of cache lines fetched
-system.cpu.fetch.IcacheSquashes                   261                       # Number of outstanding Icache misses that were squashed
-system.cpu.fetch.rateDist::samples              15162                       # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::mean              0.853911                       # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::stdev             2.140587                       # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::underflows               0      0.00%      0.00% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::0                    11809     77.89%     77.89% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::1                     1506      9.93%     87.82% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::2                      111      0.73%     88.55% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::3                      164      1.08%     89.63% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::4                      279      1.84%     91.47% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::5                      101      0.67%     92.14% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::6                      136      0.90%     93.04% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::7                      158      1.04%     94.08% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::8                      898      5.92%    100.00% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::overflows                0      0.00%    100.00% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::min_value                0                       # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::max_value                8                       # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::total                15162                       # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.branchRate                  0.044601                       # Number of branch fetches per cycle
-system.cpu.fetch.rate                        0.265248                       # Number of inst fetches per cycle
-system.cpu.decode.IdleCycles                     8416                       # Number of cycles decode is idle
-system.cpu.decode.BlockedCycles                  3447                       # Number of cycles decode is blocked
-system.cpu.decode.RunCycles                      2766                       # Number of cycles decode is running
-system.cpu.decode.UnblockCycles                   141                       # Number of cycles decode is unblocking
-system.cpu.decode.SquashCycles                    392                       # Number of cycles decode is squashing
-system.cpu.decode.BranchResolved                  589                       # Number of times decode resolved a branch
-system.cpu.decode.BranchMispred                    40                       # Number of times decode detected a branch misprediction
-system.cpu.decode.DecodedInsts                  11962                       # Number of instructions handled by decode
-system.cpu.decode.SquashedInsts                   160                       # Number of squashed instructions handled by decode
-system.cpu.rename.SquashCycles                    392                       # Number of cycles rename is squashing
-system.cpu.rename.IdleCycles                     8568                       # Number of cycles rename is idle
-system.cpu.rename.BlockCycles                     617                       # Number of cycles rename is blocking
-system.cpu.rename.serializeStallCycles           1023                       # count of cycles rename stalled for serializing inst
-system.cpu.rename.RunCycles                      2736                       # Number of cycles rename is running
-system.cpu.rename.UnblockCycles                  1826                       # Number of cycles rename is unblocking
-system.cpu.rename.RenamedInsts                  11523                       # Number of instructions processed by rename
-system.cpu.rename.ROBFullEvents                     5                       # Number of times rename has blocked due to ROB full
-system.cpu.rename.IQFullEvents                      4                       # Number of times rename has blocked due to IQ full
-system.cpu.rename.LQFullEvents                    193                       # Number of times rename has blocked due to LQ full
-system.cpu.rename.SQFullEvents                   1606                       # Number of times rename has blocked due to SQ full
-system.cpu.rename.RenamedOperands                6897                       # Number of destination operands rename has renamed
-system.cpu.rename.RenameLookups                 13509                       # Number of register rename lookups that rename has made
-system.cpu.rename.int_rename_lookups            13276                       # Number of integer rename lookups
-system.cpu.rename.fp_rename_lookups                 3                       # Number of floating rename lookups
-system.cpu.rename.CommittedMaps                  3292                       # Number of HB maps that are committed
-system.cpu.rename.UndoneMaps                     3605                       # Number of HB maps that are undone due to squashing
-system.cpu.rename.serializingInsts                 13                       # count of serializing insts renamed
-system.cpu.rename.tempSerializingInsts              9                       # count of temporary serializing insts renamed
-system.cpu.rename.skidInsts                       323                       # count of insts added to the skid buffer
-system.cpu.memDep0.insertedLoads                 2464                       # Number of loads inserted to the mem dependence unit.
-system.cpu.memDep0.insertedStores                1158                       # Number of stores inserted to the mem dependence unit.
-system.cpu.memDep0.conflictingLoads                 6                       # Number of conflicting loads.
-system.cpu.memDep0.conflictingStores                2                       # Number of conflicting stores.
-system.cpu.iq.iqInstsAdded                       8995                       # Number of instructions added to the IQ (excludes non-spec)
-system.cpu.iq.iqNonSpecInstsAdded                  11                       # Number of non-speculative instructions added to the IQ
-system.cpu.iq.iqInstsIssued                      8108                       # Number of instructions issued
-system.cpu.iq.iqSquashedInstsIssued                20                       # Number of squashed instructions issued
-system.cpu.iq.iqSquashedInstsExamined            4006                       # Number of squashed instructions iterated over during squash; mainly for profiling
-system.cpu.iq.iqSquashedOperandsExamined         1995                       # Number of squashed operands that are examined and possibly removed from graph
-system.cpu.iq.iqSquashedNonSpecRemoved              2                       # Number of squashed non-spec instructions that were removed
-system.cpu.iq.issued_per_cycle::samples         15162                       # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::mean         0.534758                       # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::stdev        1.264874                       # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::underflows            0      0.00%      0.00% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::0               11839     78.08%     78.08% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::1                1338      8.82%     86.91% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::2                 727      4.79%     91.70% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::3                 451      2.97%     94.68% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::4                 343      2.26%     96.94% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::5                 283      1.87%     98.81% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::6                 110      0.73%     99.53% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::7                  52      0.34%     99.87% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::8                  19      0.13%    100.00% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::overflows            0      0.00%    100.00% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::min_value            0                       # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::max_value            8                       # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::total           15162                       # Number of insts issued each cycle
-system.cpu.iq.fu_full::No_OpClass                   0      0.00%      0.00% # attempts to use FU when none available
-system.cpu.iq.fu_full::IntAlu                       6      3.33%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::IntMult                      0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::IntDiv                       0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatAdd                     0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatCmp                     0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatCvt                     0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatMult                    0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatMultAcc                 0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatDiv                     0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatMisc                    0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatSqrt                    0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdAdd                      0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdAddAcc                   0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdAlu                      0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdCmp                      0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdCvt                      0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdMisc                     0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdMult                     0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdMultAcc                  0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdShift                    0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdShiftAcc                 0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdSqrt                     0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatAdd                 0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatAlu                 0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatCmp                 0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatCvt                 0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatDiv                 0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatMisc                0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatMult                0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatMultAcc             0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatSqrt                0      0.00%      3.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemRead                    117     65.00%     68.33% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemWrite                    57     31.67%    100.00% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatMemRead                 0      0.00%    100.00% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatMemWrite                0      0.00%    100.00% # attempts to use FU when none available
-system.cpu.iq.fu_full::IprAccess                    0      0.00%    100.00% # attempts to use FU when none available
-system.cpu.iq.fu_full::InstPrefetch                 0      0.00%    100.00% # attempts to use FU when none available
-system.cpu.iq.FU_type_0::No_OpClass                 0      0.00%      0.00% # Type of FU issued
-system.cpu.iq.FU_type_0::IntAlu                  4767     58.79%     58.79% # Type of FU issued
-system.cpu.iq.FU_type_0::IntMult                    4      0.05%     58.84% # Type of FU issued
-system.cpu.iq.FU_type_0::IntDiv                     1      0.01%     58.86% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatAdd                   2      0.02%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatCmp                   0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatCvt                   0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatMult                  0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatMultAcc               0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatDiv                   0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatMisc                  0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatSqrt                  0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdAdd                    0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdAddAcc                 0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdAlu                    0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdCmp                    0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdCvt                    0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdMisc                   0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdMult                   0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdMultAcc                0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdShift                  0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdShiftAcc               0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdSqrt                   0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdFloatAdd               0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdFloatAlu               0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdFloatCmp               0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdFloatCvt               0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdFloatDiv               0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdFloatMisc              0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdFloatMult              0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdFloatMultAcc            0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::SimdFloatSqrt              0      0.00%     58.88% # Type of FU issued
-system.cpu.iq.FU_type_0::MemRead                 2271     28.01%     86.89% # Type of FU issued
-system.cpu.iq.FU_type_0::MemWrite                1063     13.11%    100.00% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatMemRead               0      0.00%    100.00% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatMemWrite              0      0.00%    100.00% # Type of FU issued
-system.cpu.iq.FU_type_0::IprAccess                  0      0.00%    100.00% # Type of FU issued
-system.cpu.iq.FU_type_0::InstPrefetch               0      0.00%    100.00% # Type of FU issued
-system.cpu.iq.FU_type_0::total                   8108                       # Type of FU issued
-system.cpu.iq.rate                           0.166110                       # Inst issue rate
-system.cpu.iq.fu_busy_cnt                         180                       # FU busy when requested
-system.cpu.iq.fu_busy_rate                   0.022200                       # FU busy rate (busy events/executed inst)
-system.cpu.iq.int_inst_queue_reads              31574                       # Number of integer instruction queue reads
-system.cpu.iq.int_inst_queue_writes             13019                       # Number of integer instruction queue writes
-system.cpu.iq.int_inst_queue_wakeup_accesses         7329                       # Number of integer instruction queue wakeup accesses
-system.cpu.iq.fp_inst_queue_reads                   4                       # Number of floating instruction queue reads
-system.cpu.iq.fp_inst_queue_writes                  2                       # Number of floating instruction queue writes
-system.cpu.iq.fp_inst_queue_wakeup_accesses            2                       # Number of floating instruction queue wakeup accesses
-system.cpu.iq.int_alu_accesses                   8286                       # Number of integer alu accesses
-system.cpu.iq.fp_alu_accesses                       2                       # Number of floating point alu accesses
-system.cpu.iew.lsq.thread0.forwLoads               78                       # Number of loads that had data forwarded from stores
-system.cpu.iew.lsq.thread0.invAddrLoads             0                       # Number of loads ignored due to an invalid address
-system.cpu.iew.lsq.thread0.squashedLoads         1329                       # Number of loads squashed
-system.cpu.iew.lsq.thread0.ignoredResponses            5                       # Number of memory responses ignored because the instruction is squashed
-system.cpu.iew.lsq.thread0.memOrderViolation           10                       # Number of memory ordering violations
-system.cpu.iew.lsq.thread0.squashedStores          257                       # Number of stores squashed
-system.cpu.iew.lsq.thread0.invAddrSwpfs             0                       # Number of software prefetches ignored due to an invalid address
-system.cpu.iew.lsq.thread0.blockedLoads             0                       # Number of blocked loads due to partial load-store forwarding
-system.cpu.iew.lsq.thread0.rescheduledLoads            0                       # Number of loads that were rescheduled
-system.cpu.iew.lsq.thread0.cacheBlocked            25                       # Number of times an access to memory failed due to the cache being blocked
-system.cpu.iew.iewIdleCycles                        0                       # Number of cycles IEW is idle
-system.cpu.iew.iewSquashCycles                    392                       # Number of cycles IEW is squashing
-system.cpu.iew.iewBlockCycles                     487                       # Number of cycles IEW is blocking
-system.cpu.iew.iewUnblockCycles                    74                       # Number of cycles IEW is unblocking
-system.cpu.iew.iewDispatchedInsts               10600                       # Number of instructions dispatched to IQ
-system.cpu.iew.iewDispSquashedInsts               154                       # Number of squashed instructions skipped by dispatch
-system.cpu.iew.iewDispLoadInsts                  2464                       # Number of dispatched load instructions
-system.cpu.iew.iewDispStoreInsts                 1158                       # Number of dispatched store instructions
-system.cpu.iew.iewDispNonSpecInsts                 11                       # Number of dispatched non-speculative instructions
-system.cpu.iew.iewIQFullEvents                      0                       # Number of times the IQ has become full, causing a stall
-system.cpu.iew.iewLSQFullEvents                    75                       # Number of times the LSQ has become full, causing a stall
-system.cpu.iew.memOrderViolationEvents             10                       # Number of memory order violations
-system.cpu.iew.predictedTakenIncorrect            101                       # Number of branches that were predicted taken incorrectly
-system.cpu.iew.predictedNotTakenIncorrect          335                       # Number of branches that were predicted not taken incorrectly
-system.cpu.iew.branchMispredicts                  436                       # Number of branch mispredicts detected at execute
-system.cpu.iew.iewExecutedInsts                  7776                       # Number of executed instructions
-system.cpu.iew.iewExecLoadInsts                  2123                       # Number of load instructions executed
-system.cpu.iew.iewExecSquashedInsts               332                       # Number of squashed instructions skipped in execute
-system.cpu.iew.exec_swp                             0                       # number of swp insts executed
-system.cpu.iew.exec_nop                          1594                       # number of nop insts executed
-system.cpu.iew.exec_refs                         3172                       # number of memory reference insts executed
-system.cpu.iew.exec_branches                     1361                       # Number of branches executed
-system.cpu.iew.exec_stores                       1049                       # Number of stores executed
-system.cpu.iew.exec_rate                     0.159308                       # Inst execution rate
-system.cpu.iew.wb_sent                           7424                       # cumulative count of insts sent to commit
-system.cpu.iew.wb_count                          7331                       # cumulative count of insts written-back
-system.cpu.iew.wb_producers                      2863                       # num instructions producing a value
-system.cpu.iew.wb_consumers                      4269                       # num instructions consuming a value
-system.cpu.iew.wb_rate                       0.150192                       # insts written-back per cycle
-system.cpu.iew.wb_fanout                     0.670649                       # average fanout of values written-back
-system.cpu.commit.commitSquashedInsts            4961                       # The number of squashed insts skipped by commit
-system.cpu.commit.commitNonSpecStalls               9                       # The number of times commit has been forced to stall to communicate backwards
-system.cpu.commit.branchMispredicts               382                       # The number of times a branch was mispredicted
-system.cpu.commit.committed_per_cycle::samples        14286                       # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::mean     0.394792                       # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::stdev     1.199270                       # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::underflows            0      0.00%      0.00% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::0        12095     84.66%     84.66% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::1          883      6.18%     90.84% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::2          522      3.65%     94.50% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::3          254      1.78%     96.28% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::4          160      1.12%     97.40% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::5          166      1.16%     98.56% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::6           63      0.44%     99.00% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::7           41      0.29%     99.29% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::8          102      0.71%    100.00% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::overflows            0      0.00%    100.00% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::min_value            0                       # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::max_value            8                       # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::total        14286                       # Number of insts commited each cycle
-system.cpu.commit.committedInsts                 5640                       # Number of instructions committed
-system.cpu.commit.committedOps                   5640                       # Number of ops (including micro ops) committed
-system.cpu.commit.swp_count                         0                       # Number of s/w prefetches committed
-system.cpu.commit.refs                           2036                       # Number of memory references committed
-system.cpu.commit.loads                          1135                       # Number of loads committed
-system.cpu.commit.membars                           0                       # Number of memory barriers committed
-system.cpu.commit.branches                        886                       # Number of branches committed
-system.cpu.commit.fp_insts                          2                       # Number of committed floating point instructions.
-system.cpu.commit.int_insts                      4955                       # Number of committed integer instructions.
-system.cpu.commit.function_calls                   85                       # Number of function calls committed.
-system.cpu.commit.op_class_0::No_OpClass          641     11.37%     11.37% # Class of committed instruction
-system.cpu.commit.op_class_0::IntAlu             2959     52.46%     63.83% # Class of committed instruction
-system.cpu.commit.op_class_0::IntMult               2      0.04%     63.87% # Class of committed instruction
-system.cpu.commit.op_class_0::IntDiv                0      0.00%     63.87% # Class of committed instruction
-system.cpu.commit.op_class_0::FloatAdd              2      0.04%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::FloatCmp              0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::FloatCvt              0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::FloatMult             0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::FloatMultAcc            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::FloatDiv              0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::FloatMisc             0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::FloatSqrt             0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdAdd               0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdAddAcc            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdAlu               0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdCmp               0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdCvt               0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdMisc              0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdMult              0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdMultAcc            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdShift             0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdShiftAcc            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdSqrt              0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdFloatAdd            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdFloatAlu            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdFloatCmp            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdFloatCvt            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdFloatDiv            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdFloatMisc            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdFloatMult            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdFloatMultAcc            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::SimdFloatSqrt            0      0.00%     63.90% # Class of committed instruction
-system.cpu.commit.op_class_0::MemRead            1135     20.12%     84.02% # Class of committed instruction
-system.cpu.commit.op_class_0::MemWrite            901     15.98%    100.00% # Class of committed instruction
-system.cpu.commit.op_class_0::FloatMemRead            0      0.00%    100.00% # Class of committed instruction
-system.cpu.commit.op_class_0::FloatMemWrite            0      0.00%    100.00% # Class of committed instruction
-system.cpu.commit.op_class_0::IprAccess             0      0.00%    100.00% # Class of committed instruction
-system.cpu.commit.op_class_0::InstPrefetch            0      0.00%    100.00% # Class of committed instruction
-system.cpu.commit.op_class_0::total              5640                       # Class of committed instruction
-system.cpu.commit.bw_lim_events                   102                       # number cycles where commit BW limit reached
-system.cpu.rob.rob_reads                        24772                       # The number of ROB reads
-system.cpu.rob.rob_writes                       22085                       # The number of ROB writes
-system.cpu.timesIdled                             264                       # Number of times that the entire CPU went into an idle state and unscheduled itself
-system.cpu.idleCycles                           33649                       # Total number of cycles that the CPU has spent unscheduled due to idling
-system.cpu.committedInsts                        4999                       # Number of Instructions Simulated
-system.cpu.committedOps                          4999                       # Number of Ops (including micro ops) Simulated
-system.cpu.cpi                               9.764153                       # CPI: Cycles Per Instruction
-system.cpu.cpi_total                         9.764153                       # CPI: Total CPI of All Threads
-system.cpu.ipc                               0.102415                       # IPC: Instructions Per Cycle
-system.cpu.ipc_total                         0.102415                       # IPC: Total IPC of All Threads
-system.cpu.int_regfile_reads                    10585                       # number of integer regfile reads
-system.cpu.int_regfile_writes                    5135                       # number of integer regfile writes
-system.cpu.fp_regfile_reads                         3                       # number of floating regfile reads
-system.cpu.fp_regfile_writes                        1                       # number of floating regfile writes
-system.cpu.misc_regfile_reads                     161                       # number of misc regfile reads
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     24405000                       # Cumulative time (in ticks) in various power states
-system.cpu.dcache.tags.replacements                 0                       # number of replacements
-system.cpu.dcache.tags.tagsinuse            91.124976                       # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs                2389                       # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs               140                       # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs             17.064286                       # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle                 0                       # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data    91.124976                       # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data     0.022247                       # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total     0.022247                       # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_task_id_blocks::1024          140                       # Occupied blocks per task id
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           31                       # Occupied blocks per task id
-system.cpu.dcache.tags.age_task_id_blocks_1024::1          109                       # Occupied blocks per task id
-system.cpu.dcache.tags.occ_task_id_percent::1024     0.034180                       # Percentage of cache occupancy per task id
-system.cpu.dcache.tags.tag_accesses              5940                       # Number of tag accesses
-system.cpu.dcache.tags.data_accesses             5940                       # Number of data accesses
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     24405000                       # Cumulative time (in ticks) in various power states
-system.cpu.dcache.ReadReq_hits::cpu.data         1832                       # number of ReadReq hits
-system.cpu.dcache.ReadReq_hits::total            1832                       # number of ReadReq hits
-system.cpu.dcache.WriteReq_hits::cpu.data          557                       # number of WriteReq hits
-system.cpu.dcache.WriteReq_hits::total            557                       # number of WriteReq hits
-system.cpu.dcache.demand_hits::cpu.data          2389                       # number of demand (read+write) hits
-system.cpu.dcache.demand_hits::total             2389                       # number of demand (read+write) hits
-system.cpu.dcache.overall_hits::cpu.data         2389                       # number of overall hits
-system.cpu.dcache.overall_hits::total            2389                       # number of overall hits
-system.cpu.dcache.ReadReq_misses::cpu.data          167                       # number of ReadReq misses
-system.cpu.dcache.ReadReq_misses::total           167                       # number of ReadReq misses
-system.cpu.dcache.WriteReq_misses::cpu.data          344                       # number of WriteReq misses
-system.cpu.dcache.WriteReq_misses::total          344                       # number of WriteReq misses
-system.cpu.dcache.demand_misses::cpu.data          511                       # number of demand (read+write) misses
-system.cpu.dcache.demand_misses::total            511                       # number of demand (read+write) misses
-system.cpu.dcache.overall_misses::cpu.data          511                       # number of overall misses
-system.cpu.dcache.overall_misses::total           511                       # number of overall misses
-system.cpu.dcache.ReadReq_miss_latency::cpu.data     12709500                       # number of ReadReq miss cycles
-system.cpu.dcache.ReadReq_miss_latency::total     12709500                       # number of ReadReq miss cycles
-system.cpu.dcache.WriteReq_miss_latency::cpu.data     34219499                       # number of WriteReq miss cycles
-system.cpu.dcache.WriteReq_miss_latency::total     34219499                       # number of WriteReq miss cycles
-system.cpu.dcache.demand_miss_latency::cpu.data     46928999                       # number of demand (read+write) miss cycles
-system.cpu.dcache.demand_miss_latency::total     46928999                       # number of demand (read+write) miss cycles
-system.cpu.dcache.overall_miss_latency::cpu.data     46928999                       # number of overall miss cycles
-system.cpu.dcache.overall_miss_latency::total     46928999                       # number of overall miss cycles
-system.cpu.dcache.ReadReq_accesses::cpu.data         1999                       # number of ReadReq accesses(hits+misses)
-system.cpu.dcache.ReadReq_accesses::total         1999                       # number of ReadReq accesses(hits+misses)
-system.cpu.dcache.WriteReq_accesses::cpu.data          901                       # number of WriteReq accesses(hits+misses)
-system.cpu.dcache.WriteReq_accesses::total          901                       # number of WriteReq accesses(hits+misses)
-system.cpu.dcache.demand_accesses::cpu.data         2900                       # number of demand (read+write) accesses
-system.cpu.dcache.demand_accesses::total         2900                       # number of demand (read+write) accesses
-system.cpu.dcache.overall_accesses::cpu.data         2900                       # number of overall (read+write) accesses
-system.cpu.dcache.overall_accesses::total         2900                       # number of overall (read+write) accesses
-system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.083542                       # miss rate for ReadReq accesses
-system.cpu.dcache.ReadReq_miss_rate::total     0.083542                       # miss rate for ReadReq accesses
-system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.381798                       # miss rate for WriteReq accesses
-system.cpu.dcache.WriteReq_miss_rate::total     0.381798                       # miss rate for WriteReq accesses
-system.cpu.dcache.demand_miss_rate::cpu.data     0.176207                       # miss rate for demand accesses
-system.cpu.dcache.demand_miss_rate::total     0.176207                       # miss rate for demand accesses
-system.cpu.dcache.overall_miss_rate::cpu.data     0.176207                       # miss rate for overall accesses
-system.cpu.dcache.overall_miss_rate::total     0.176207                       # miss rate for overall accesses
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 76104.790419                       # average ReadReq miss latency
-system.cpu.dcache.ReadReq_avg_miss_latency::total 76104.790419                       # average ReadReq miss latency
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 99475.287791                       # average WriteReq miss latency
-system.cpu.dcache.WriteReq_avg_miss_latency::total 99475.287791                       # average WriteReq miss latency
-system.cpu.dcache.demand_avg_miss_latency::cpu.data 91837.571429                       # average overall miss latency
-system.cpu.dcache.demand_avg_miss_latency::total 91837.571429                       # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 91837.571429                       # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::total 91837.571429                       # average overall miss latency
-system.cpu.dcache.blocked_cycles::no_mshrs          636                       # number of cycles access was blocked
-system.cpu.dcache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
-system.cpu.dcache.blocked::no_mshrs                10                       # number of cycles access was blocked
-system.cpu.dcache.blocked::no_targets               0                       # number of cycles access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_mshrs    63.600000                       # average number of cycles each access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
-system.cpu.dcache.ReadReq_mshr_hits::cpu.data           77                       # number of ReadReq MSHR hits
-system.cpu.dcache.ReadReq_mshr_hits::total           77                       # number of ReadReq MSHR hits
-system.cpu.dcache.WriteReq_mshr_hits::cpu.data          294                       # number of WriteReq MSHR hits
-system.cpu.dcache.WriteReq_mshr_hits::total          294                       # number of WriteReq MSHR hits
-system.cpu.dcache.demand_mshr_hits::cpu.data          371                       # number of demand (read+write) MSHR hits
-system.cpu.dcache.demand_mshr_hits::total          371                       # number of demand (read+write) MSHR hits
-system.cpu.dcache.overall_mshr_hits::cpu.data          371                       # number of overall MSHR hits
-system.cpu.dcache.overall_mshr_hits::total          371                       # number of overall MSHR hits
-system.cpu.dcache.ReadReq_mshr_misses::cpu.data           90                       # number of ReadReq MSHR misses
-system.cpu.dcache.ReadReq_mshr_misses::total           90                       # number of ReadReq MSHR misses
-system.cpu.dcache.WriteReq_mshr_misses::cpu.data           50                       # number of WriteReq MSHR misses
-system.cpu.dcache.WriteReq_mshr_misses::total           50                       # number of WriteReq MSHR misses
-system.cpu.dcache.demand_mshr_misses::cpu.data          140                       # number of demand (read+write) MSHR misses
-system.cpu.dcache.demand_mshr_misses::total          140                       # number of demand (read+write) MSHR misses
-system.cpu.dcache.overall_mshr_misses::cpu.data          140                       # number of overall MSHR misses
-system.cpu.dcache.overall_mshr_misses::total          140                       # number of overall MSHR misses
-system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data      8094500                       # number of ReadReq MSHR miss cycles
-system.cpu.dcache.ReadReq_mshr_miss_latency::total      8094500                       # number of ReadReq MSHR miss cycles
-system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data      4915999                       # number of WriteReq MSHR miss cycles
-system.cpu.dcache.WriteReq_mshr_miss_latency::total      4915999                       # number of WriteReq MSHR miss cycles
-system.cpu.dcache.demand_mshr_miss_latency::cpu.data     13010499                       # number of demand (read+write) MSHR miss cycles
-system.cpu.dcache.demand_mshr_miss_latency::total     13010499                       # number of demand (read+write) MSHR miss cycles
-system.cpu.dcache.overall_mshr_miss_latency::cpu.data     13010499                       # number of overall MSHR miss cycles
-system.cpu.dcache.overall_mshr_miss_latency::total     13010499                       # number of overall MSHR miss cycles
-system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.045023                       # mshr miss rate for ReadReq accesses
-system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.045023                       # mshr miss rate for ReadReq accesses
-system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.055494                       # mshr miss rate for WriteReq accesses
-system.cpu.dcache.WriteReq_mshr_miss_rate::total     0.055494                       # mshr miss rate for WriteReq accesses
-system.cpu.dcache.demand_mshr_miss_rate::cpu.data     0.048276                       # mshr miss rate for demand accesses
-system.cpu.dcache.demand_mshr_miss_rate::total     0.048276                       # mshr miss rate for demand accesses
-system.cpu.dcache.overall_mshr_miss_rate::cpu.data     0.048276                       # mshr miss rate for overall accesses
-system.cpu.dcache.overall_mshr_miss_rate::total     0.048276                       # mshr miss rate for overall accesses
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 89938.888889                       # average ReadReq mshr miss latency
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 89938.888889                       # average ReadReq mshr miss latency
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 98319.980000                       # average WriteReq mshr miss latency
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 98319.980000                       # average WriteReq mshr miss latency
-system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 92932.135714                       # average overall mshr miss latency
-system.cpu.dcache.demand_avg_mshr_miss_latency::total 92932.135714                       # average overall mshr miss latency
-system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 92932.135714                       # average overall mshr miss latency
-system.cpu.dcache.overall_avg_mshr_miss_latency::total 92932.135714                       # average overall mshr miss latency
-system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED     24405000                       # Cumulative time (in ticks) in various power states
-system.cpu.icache.tags.replacements                17                       # number of replacements
-system.cpu.icache.tags.tagsinuse           160.153151                       # Cycle average of tags in use
-system.cpu.icache.tags.total_refs                1609                       # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs               332                       # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs              4.846386                       # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle                 0                       # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst   160.153151                       # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst     0.078200                       # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total     0.078200                       # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_task_id_blocks::1024          315                       # Occupied blocks per task id
-system.cpu.icache.tags.age_task_id_blocks_1024::0          132                       # Occupied blocks per task id
-system.cpu.icache.tags.age_task_id_blocks_1024::1          183                       # Occupied blocks per task id
-system.cpu.icache.tags.occ_task_id_percent::1024     0.153809                       # Percentage of cache occupancy per task id
-system.cpu.icache.tags.tag_accesses              4424                       # Number of tag accesses
-system.cpu.icache.tags.data_accesses             4424                       # Number of data accesses
-system.cpu.icache.pwrStateResidencyTicks::UNDEFINED     24405000                       # Cumulative time (in ticks) in various power states
-system.cpu.icache.ReadReq_hits::cpu.inst         1609                       # number of ReadReq hits
-system.cpu.icache.ReadReq_hits::total            1609                       # number of ReadReq hits
-system.cpu.icache.demand_hits::cpu.inst          1609                       # number of demand (read+write) hits
-system.cpu.icache.demand_hits::total             1609                       # number of demand (read+write) hits
-system.cpu.icache.overall_hits::cpu.inst         1609                       # number of overall hits
-system.cpu.icache.overall_hits::total            1609                       # number of overall hits
-system.cpu.icache.ReadReq_misses::cpu.inst          437                       # number of ReadReq misses
-system.cpu.icache.ReadReq_misses::total           437                       # number of ReadReq misses
-system.cpu.icache.demand_misses::cpu.inst          437                       # number of demand (read+write) misses
-system.cpu.icache.demand_misses::total            437                       # number of demand (read+write) misses
-system.cpu.icache.overall_misses::cpu.inst          437                       # number of overall misses
-system.cpu.icache.overall_misses::total           437                       # number of overall misses
-system.cpu.icache.ReadReq_miss_latency::cpu.inst     35547000                       # number of ReadReq miss cycles
-system.cpu.icache.ReadReq_miss_latency::total     35547000                       # number of ReadReq miss cycles
-system.cpu.icache.demand_miss_latency::cpu.inst     35547000                       # number of demand (read+write) miss cycles
-system.cpu.icache.demand_miss_latency::total     35547000                       # number of demand (read+write) miss cycles
-system.cpu.icache.overall_miss_latency::cpu.inst     35547000                       # number of overall miss cycles
-system.cpu.icache.overall_miss_latency::total     35547000                       # number of overall miss cycles
-system.cpu.icache.ReadReq_accesses::cpu.inst         2046                       # number of ReadReq accesses(hits+misses)
-system.cpu.icache.ReadReq_accesses::total         2046                       # number of ReadReq accesses(hits+misses)
-system.cpu.icache.demand_accesses::cpu.inst         2046                       # number of demand (read+write) accesses
-system.cpu.icache.demand_accesses::total         2046                       # number of demand (read+write) accesses
-system.cpu.icache.overall_accesses::cpu.inst         2046                       # number of overall (read+write) accesses
-system.cpu.icache.overall_accesses::total         2046                       # number of overall (read+write) accesses
-system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.213587                       # miss rate for ReadReq accesses
-system.cpu.icache.ReadReq_miss_rate::total     0.213587                       # miss rate for ReadReq accesses
-system.cpu.icache.demand_miss_rate::cpu.inst     0.213587                       # miss rate for demand accesses
-system.cpu.icache.demand_miss_rate::total     0.213587                       # miss rate for demand accesses
-system.cpu.icache.overall_miss_rate::cpu.inst     0.213587                       # miss rate for overall accesses
-system.cpu.icache.overall_miss_rate::total     0.213587                       # miss rate for overall accesses
-system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 81343.249428                       # average ReadReq miss latency
-system.cpu.icache.ReadReq_avg_miss_latency::total 81343.249428                       # average ReadReq miss latency
-system.cpu.icache.demand_avg_miss_latency::cpu.inst 81343.249428                       # average overall miss latency
-system.cpu.icache.demand_avg_miss_latency::total 81343.249428                       # average overall miss latency
-system.cpu.icache.overall_avg_miss_latency::cpu.inst 81343.249428                       # average overall miss latency
-system.cpu.icache.overall_avg_miss_latency::total 81343.249428                       # average overall miss latency
-system.cpu.icache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
-system.cpu.icache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
-system.cpu.icache.blocked::no_mshrs                 0                       # number of cycles access was blocked
-system.cpu.icache.blocked::no_targets               0                       # number of cycles access was blocked
-system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
-system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
-system.cpu.icache.writebacks::writebacks           17                       # number of writebacks
-system.cpu.icache.writebacks::total                17                       # number of writebacks
-system.cpu.icache.ReadReq_mshr_hits::cpu.inst          105                       # number of ReadReq MSHR hits
-system.cpu.icache.ReadReq_mshr_hits::total          105                       # number of ReadReq MSHR hits
-system.cpu.icache.demand_mshr_hits::cpu.inst          105                       # number of demand (read+write) MSHR hits
-system.cpu.icache.demand_mshr_hits::total          105                       # number of demand (read+write) MSHR hits
-system.cpu.icache.overall_mshr_hits::cpu.inst          105                       # number of overall MSHR hits
-system.cpu.icache.overall_mshr_hits::total          105                       # number of overall MSHR hits
-system.cpu.icache.ReadReq_mshr_misses::cpu.inst          332                       # number of ReadReq MSHR misses
-system.cpu.icache.ReadReq_mshr_misses::total          332                       # number of ReadReq MSHR misses
-system.cpu.icache.demand_mshr_misses::cpu.inst          332                       # number of demand (read+write) MSHR misses
-system.cpu.icache.demand_mshr_misses::total          332                       # number of demand (read+write) MSHR misses
-system.cpu.icache.overall_mshr_misses::cpu.inst          332                       # number of overall MSHR misses
-system.cpu.icache.overall_mshr_misses::total          332                       # number of overall MSHR misses
-system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst     28124000                       # number of ReadReq MSHR miss cycles
-system.cpu.icache.ReadReq_mshr_miss_latency::total     28124000                       # number of ReadReq MSHR miss cycles
-system.cpu.icache.demand_mshr_miss_latency::cpu.inst     28124000                       # number of demand (read+write) MSHR miss cycles
-system.cpu.icache.demand_mshr_miss_latency::total     28124000                       # number of demand (read+write) MSHR miss cycles
-system.cpu.icache.overall_mshr_miss_latency::cpu.inst     28124000                       # number of overall MSHR miss cycles
-system.cpu.icache.overall_mshr_miss_latency::total     28124000                       # number of overall MSHR miss cycles
-system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst     0.162268                       # mshr miss rate for ReadReq accesses
-system.cpu.icache.ReadReq_mshr_miss_rate::total     0.162268                       # mshr miss rate for ReadReq accesses
-system.cpu.icache.demand_mshr_miss_rate::cpu.inst     0.162268                       # mshr miss rate for demand accesses
-system.cpu.icache.demand_mshr_miss_rate::total     0.162268                       # mshr miss rate for demand accesses
-system.cpu.icache.overall_mshr_miss_rate::cpu.inst     0.162268                       # mshr miss rate for overall accesses
-system.cpu.icache.overall_mshr_miss_rate::total     0.162268                       # mshr miss rate for overall accesses
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 84710.843373                       # average ReadReq mshr miss latency
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 84710.843373                       # average ReadReq mshr miss latency
-system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 84710.843373                       # average overall mshr miss latency
-system.cpu.icache.demand_avg_mshr_miss_latency::total 84710.843373                       # average overall mshr miss latency
-system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 84710.843373                       # average overall mshr miss latency
-system.cpu.icache.overall_avg_mshr_miss_latency::total 84710.843373                       # average overall mshr miss latency
-system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED     24405000                       # Cumulative time (in ticks) in various power states
-system.cpu.l2cache.tags.replacements                0                       # number of replacements
-system.cpu.l2cache.tags.tagsinuse          253.368786                       # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs                 20                       # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs              469                       # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs             0.042644                       # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle                0                       # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::cpu.inst   162.183576                       # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data    91.185210                       # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_percent::cpu.inst     0.004949                       # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::cpu.data     0.002783                       # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total     0.007732                       # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_task_id_blocks::1024          469                       # Occupied blocks per task id
-system.cpu.l2cache.tags.age_task_id_blocks_1024::0          171                       # Occupied blocks per task id
-system.cpu.l2cache.tags.age_task_id_blocks_1024::1          298                       # Occupied blocks per task id
-system.cpu.l2cache.tags.occ_task_id_percent::1024     0.014313                       # Percentage of cache occupancy per task id
-system.cpu.l2cache.tags.tag_accesses             4381                       # Number of tag accesses
-system.cpu.l2cache.tags.data_accesses            4381                       # Number of data accesses
-system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED     24405000                       # Cumulative time (in ticks) in various power states
-system.cpu.l2cache.WritebackClean_hits::writebacks           17                       # number of WritebackClean hits
-system.cpu.l2cache.WritebackClean_hits::total           17                       # number of WritebackClean hits
-system.cpu.l2cache.ReadCleanReq_hits::cpu.inst            3                       # number of ReadCleanReq hits
-system.cpu.l2cache.ReadCleanReq_hits::total            3                       # number of ReadCleanReq hits
-system.cpu.l2cache.demand_hits::cpu.inst            3                       # number of demand (read+write) hits
-system.cpu.l2cache.demand_hits::total               3                       # number of demand (read+write) hits
-system.cpu.l2cache.overall_hits::cpu.inst            3                       # number of overall hits
-system.cpu.l2cache.overall_hits::total              3                       # number of overall hits
-system.cpu.l2cache.ReadExReq_misses::cpu.data           50                       # number of ReadExReq misses
-system.cpu.l2cache.ReadExReq_misses::total           50                       # number of ReadExReq misses
-system.cpu.l2cache.ReadCleanReq_misses::cpu.inst          329                       # number of ReadCleanReq misses
-system.cpu.l2cache.ReadCleanReq_misses::total          329                       # number of ReadCleanReq misses
-system.cpu.l2cache.ReadSharedReq_misses::cpu.data           90                       # number of ReadSharedReq misses
-system.cpu.l2cache.ReadSharedReq_misses::total           90                       # number of ReadSharedReq misses
-system.cpu.l2cache.demand_misses::cpu.inst          329                       # number of demand (read+write) misses
-system.cpu.l2cache.demand_misses::cpu.data          140                       # number of demand (read+write) misses
-system.cpu.l2cache.demand_misses::total           469                       # number of demand (read+write) misses
-system.cpu.l2cache.overall_misses::cpu.inst          329                       # number of overall misses
-system.cpu.l2cache.overall_misses::cpu.data          140                       # number of overall misses
-system.cpu.l2cache.overall_misses::total          469                       # number of overall misses
-system.cpu.l2cache.ReadExReq_miss_latency::cpu.data      4840000                       # number of ReadExReq miss cycles
-system.cpu.l2cache.ReadExReq_miss_latency::total      4840000                       # number of ReadExReq miss cycles
-system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst     27593000                       # number of ReadCleanReq miss cycles
-system.cpu.l2cache.ReadCleanReq_miss_latency::total     27593000                       # number of ReadCleanReq miss cycles
-system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data      7956500                       # number of ReadSharedReq miss cycles
-system.cpu.l2cache.ReadSharedReq_miss_latency::total      7956500                       # number of ReadSharedReq miss cycles
-system.cpu.l2cache.demand_miss_latency::cpu.inst     27593000                       # number of demand (read+write) miss cycles
-system.cpu.l2cache.demand_miss_latency::cpu.data     12796500                       # number of demand (read+write) miss cycles
-system.cpu.l2cache.demand_miss_latency::total     40389500                       # number of demand (read+write) miss cycles
-system.cpu.l2cache.overall_miss_latency::cpu.inst     27593000                       # number of overall miss cycles
-system.cpu.l2cache.overall_miss_latency::cpu.data     12796500                       # number of overall miss cycles
-system.cpu.l2cache.overall_miss_latency::total     40389500                       # number of overall miss cycles
-system.cpu.l2cache.WritebackClean_accesses::writebacks           17                       # number of WritebackClean accesses(hits+misses)
-system.cpu.l2cache.WritebackClean_accesses::total           17                       # number of WritebackClean accesses(hits+misses)
-system.cpu.l2cache.ReadExReq_accesses::cpu.data           50                       # number of ReadExReq accesses(hits+misses)
-system.cpu.l2cache.ReadExReq_accesses::total           50                       # number of ReadExReq accesses(hits+misses)
-system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst          332                       # number of ReadCleanReq accesses(hits+misses)
-system.cpu.l2cache.ReadCleanReq_accesses::total          332                       # number of ReadCleanReq accesses(hits+misses)
-system.cpu.l2cache.ReadSharedReq_accesses::cpu.data           90                       # number of ReadSharedReq accesses(hits+misses)
-system.cpu.l2cache.ReadSharedReq_accesses::total           90                       # number of ReadSharedReq accesses(hits+misses)
-system.cpu.l2cache.demand_accesses::cpu.inst          332                       # number of demand (read+write) accesses
-system.cpu.l2cache.demand_accesses::cpu.data          140                       # number of demand (read+write) accesses
-system.cpu.l2cache.demand_accesses::total          472                       # number of demand (read+write) accesses
-system.cpu.l2cache.overall_accesses::cpu.inst          332                       # number of overall (read+write) accesses
-system.cpu.l2cache.overall_accesses::cpu.data          140                       # number of overall (read+write) accesses
-system.cpu.l2cache.overall_accesses::total          472                       # number of overall (read+write) accesses
-system.cpu.l2cache.ReadExReq_miss_rate::cpu.data            1                       # miss rate for ReadExReq accesses
-system.cpu.l2cache.ReadExReq_miss_rate::total            1                       # miss rate for ReadExReq accesses
-system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.990964                       # miss rate for ReadCleanReq accesses
-system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.990964                       # miss rate for ReadCleanReq accesses
-system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data            1                       # miss rate for ReadSharedReq accesses
-system.cpu.l2cache.ReadSharedReq_miss_rate::total            1                       # miss rate for ReadSharedReq accesses
-system.cpu.l2cache.demand_miss_rate::cpu.inst     0.990964                       # miss rate for demand accesses
-system.cpu.l2cache.demand_miss_rate::cpu.data            1                       # miss rate for demand accesses
-system.cpu.l2cache.demand_miss_rate::total     0.993644                       # miss rate for demand accesses
-system.cpu.l2cache.overall_miss_rate::cpu.inst     0.990964                       # miss rate for overall accesses
-system.cpu.l2cache.overall_miss_rate::cpu.data            1                       # miss rate for overall accesses
-system.cpu.l2cache.overall_miss_rate::total     0.993644                       # miss rate for overall accesses
-system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data        96800                       # average ReadExReq miss latency
-system.cpu.l2cache.ReadExReq_avg_miss_latency::total        96800                       # average ReadExReq miss latency
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 83869.300912                       # average ReadCleanReq miss latency
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 83869.300912                       # average ReadCleanReq miss latency
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 88405.555556                       # average ReadSharedReq miss latency
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 88405.555556                       # average ReadSharedReq miss latency
-system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 83869.300912                       # average overall miss latency
-system.cpu.l2cache.demand_avg_miss_latency::cpu.data 91403.571429                       # average overall miss latency
-system.cpu.l2cache.demand_avg_miss_latency::total 86118.336887                       # average overall miss latency
-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 83869.300912                       # average overall miss latency
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data 91403.571429                       # average overall miss latency
-system.cpu.l2cache.overall_avg_miss_latency::total 86118.336887                       # average overall miss latency
-system.cpu.l2cache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
-system.cpu.l2cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
-system.cpu.l2cache.blocked::no_mshrs                0                       # number of cycles access was blocked
-system.cpu.l2cache.blocked::no_targets              0                       # number of cycles access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
-system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data           50                       # number of ReadExReq MSHR misses
-system.cpu.l2cache.ReadExReq_mshr_misses::total           50                       # number of ReadExReq MSHR misses
-system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst          329                       # number of ReadCleanReq MSHR misses
-system.cpu.l2cache.ReadCleanReq_mshr_misses::total          329                       # number of ReadCleanReq MSHR misses
-system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data           90                       # number of ReadSharedReq MSHR misses
-system.cpu.l2cache.ReadSharedReq_mshr_misses::total           90                       # number of ReadSharedReq MSHR misses
-system.cpu.l2cache.demand_mshr_misses::cpu.inst          329                       # number of demand (read+write) MSHR misses
-system.cpu.l2cache.demand_mshr_misses::cpu.data          140                       # number of demand (read+write) MSHR misses
-system.cpu.l2cache.demand_mshr_misses::total          469                       # number of demand (read+write) MSHR misses
-system.cpu.l2cache.overall_mshr_misses::cpu.inst          329                       # number of overall MSHR misses
-system.cpu.l2cache.overall_mshr_misses::cpu.data          140                       # number of overall MSHR misses
-system.cpu.l2cache.overall_mshr_misses::total          469                       # number of overall MSHR misses
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data      4340000                       # number of ReadExReq MSHR miss cycles
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total      4340000                       # number of ReadExReq MSHR miss cycles
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst     24303000                       # number of ReadCleanReq MSHR miss cycles
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total     24303000                       # number of ReadCleanReq MSHR miss cycles
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data      7056500                       # number of ReadSharedReq MSHR miss cycles
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      7056500                       # number of ReadSharedReq MSHR miss cycles
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     24303000                       # number of demand (read+write) MSHR miss cycles
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data     11396500                       # number of demand (read+write) MSHR miss cycles
-system.cpu.l2cache.demand_mshr_miss_latency::total     35699500                       # number of demand (read+write) MSHR miss cycles
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     24303000                       # number of overall MSHR miss cycles
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data     11396500                       # number of overall MSHR miss cycles
-system.cpu.l2cache.overall_mshr_miss_latency::total     35699500                       # number of overall MSHR miss cycles
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                       # mshr miss rate for ReadExReq accesses
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                       # mshr miss rate for ReadExReq accesses
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.990964                       # mshr miss rate for ReadCleanReq accesses
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.990964                       # mshr miss rate for ReadCleanReq accesses
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data            1                       # mshr miss rate for ReadSharedReq accesses
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total            1                       # mshr miss rate for ReadSharedReq accesses
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.990964                       # mshr miss rate for demand accesses
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data            1                       # mshr miss rate for demand accesses
-system.cpu.l2cache.demand_mshr_miss_rate::total     0.993644                       # mshr miss rate for demand accesses
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.990964                       # mshr miss rate for overall accesses
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data            1                       # mshr miss rate for overall accesses
-system.cpu.l2cache.overall_mshr_miss_rate::total     0.993644                       # mshr miss rate for overall accesses
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data        86800                       # average ReadExReq mshr miss latency
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total        86800                       # average ReadExReq mshr miss latency
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 73869.300912                       # average ReadCleanReq mshr miss latency
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 73869.300912                       # average ReadCleanReq mshr miss latency
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 78405.555556                       # average ReadSharedReq mshr miss latency
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 78405.555556                       # average ReadSharedReq mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 73869.300912                       # average overall mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 81403.571429                       # average overall mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 76118.336887                       # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 73869.300912                       # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 81403.571429                       # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 76118.336887                       # average overall mshr miss latency
-system.cpu.toL2Bus.snoop_filter.tot_requests          489                       # Total number of requests made to the snoop filter.
-system.cpu.toL2Bus.snoop_filter.hit_single_requests           17                       # Number of requests hitting in the snoop filter with a single holder of the requested data.
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0                       # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                       # Total number of snoops made to the snoop filter.
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     24405000                       # Cumulative time (in ticks) in various power states
-system.cpu.toL2Bus.trans_dist::ReadResp           422                       # Transaction distribution
-system.cpu.toL2Bus.trans_dist::WritebackClean           17                       # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadExReq           50                       # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadExResp           50                       # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          332                       # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadSharedReq           90                       # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          681                       # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          280                       # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count::total               961                       # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        22336                       # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         8960                       # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size::total              31296                       # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.snoops                           0                       # Total snoops (count)
-system.cpu.toL2Bus.snoopTraffic                     0                       # Total snoop traffic (bytes)
-system.cpu.toL2Bus.snoop_fanout::samples          472                       # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::mean               0                       # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::stdev              0                       # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::0                472    100.00%    100.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::1                  0      0.00%    100.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::min_value            0                       # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::max_value            0                       # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::total            472                       # Request fanout histogram
-system.cpu.toL2Bus.reqLayer0.occupancy         261500                       # Layer occupancy (ticks)
-system.cpu.toL2Bus.reqLayer0.utilization          1.1                       # Layer utilization (%)
-system.cpu.toL2Bus.respLayer0.occupancy        498000                       # Layer occupancy (ticks)
-system.cpu.toL2Bus.respLayer0.utilization          2.0                       # Layer utilization (%)
-system.cpu.toL2Bus.respLayer1.occupancy        210000                       # Layer occupancy (ticks)
-system.cpu.toL2Bus.respLayer1.utilization          0.9                       # Layer utilization (%)
-system.membus.snoop_filter.tot_requests           469                       # Total number of requests made to the snoop filter.
-system.membus.snoop_filter.hit_single_requests            0                       # Number of requests hitting in the snoop filter with a single holder of the requested data.
-system.membus.snoop_filter.hit_multi_requests            0                       # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.membus.snoop_filter.tot_snoops               0                       # Total number of snoops made to the snoop filter.
-system.membus.snoop_filter.hit_single_snoops            0                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
-system.membus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.membus.pwrStateResidencyTicks::UNDEFINED     24405000                       # Cumulative time (in ticks) in various power states
-system.membus.trans_dist::ReadResp                419                       # Transaction distribution
-system.membus.trans_dist::ReadExReq                50                       # Transaction distribution
-system.membus.trans_dist::ReadExResp               50                       # Transaction distribution
-system.membus.trans_dist::ReadSharedReq           419                       # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          938                       # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total                    938                       # Packet count per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        30016                       # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total                   30016                       # Cumulative packet size per connected master and slave (bytes)
-system.membus.snoops                                0                       # Total snoops (count)
-system.membus.snoopTraffic                          0                       # Total snoop traffic (bytes)
-system.membus.snoop_fanout::samples               469                       # Request fanout histogram
-system.membus.snoop_fanout::mean                    0                       # Request fanout histogram
-system.membus.snoop_fanout::stdev                   0                       # Request fanout histogram
-system.membus.snoop_fanout::underflows              0      0.00%      0.00% # Request fanout histogram
-system.membus.snoop_fanout::0                     469    100.00%    100.00% # Request fanout histogram
-system.membus.snoop_fanout::1                       0      0.00%    100.00% # Request fanout histogram
-system.membus.snoop_fanout::overflows               0      0.00%    100.00% # Request fanout histogram
-system.membus.snoop_fanout::min_value               0                       # Request fanout histogram
-system.membus.snoop_fanout::max_value               0                       # Request fanout histogram
-system.membus.snoop_fanout::total                 469                       # Request fanout histogram
-system.membus.reqLayer0.occupancy              581000                       # Layer occupancy (ticks)
-system.membus.reqLayer0.utilization               2.4                       # Layer utilization (%)
-system.membus.respLayer1.occupancy            2488500                       # Layer occupancy (ticks)
-system.membus.respLayer1.utilization             10.2                       # Layer utilization (%)
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini
deleted file mode 100644 (file)
index 9bfe34f..0000000
+++ /dev/null
@@ -1,205 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=AtomicSimpleCPU
-children=dtb interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-system=system
-tracer=system.cpu.tracer
-width=1
-workload=system.cpu.workload
-dcache_port=system.membus.slave[2]
-icache_port=system.membus.slave[1]
-
-[system.cpu.dtb]
-type=MipsTLB
-eventq_index=0
-size=64
-
-[system.cpu.interrupts]
-type=MipsInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=MipsISA
-eventq_index=0
-num_threads=1
-num_vpes=1
-system=system
-
-[system.cpu.itb]
-type=MipsTLB
-eventq_index=0
-size=64
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=LiveProcess
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/mips/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-max_stack_size=67108864
-output=cout
-pid=100
-ppid=99
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=Null
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/simerr b/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/simerr
deleted file mode 100755 (executable)
index aadc3d0..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/simout
deleted file mode 100755 (executable)
index 8185b0f..0000000
+++ /dev/null
@@ -1,15 +0,0 @@
-Redirecting stdout to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic/simout
-Redirecting stderr to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Jul 21 2016 14:23:13
-gem5 started Jul 21 2016 14:23:47
-gem5 executing on e108600-lin, pid 13283
-command line: /work/curdun01/gem5-external.hg/build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/00.hello/mips/linux/simple-atomic
-
-Global frequency set at 1000000000000 ticks per second
-info: Entering event queue @ 0.  Starting simulation...
-info: Increasing stack size by one page.
-Hello World!
-Exiting @ tick 2820500 because target called exit()
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/stats.txt
deleted file mode 100644 (file)
index d57d5ac..0000000
+++ /dev/null
@@ -1,153 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000003                       # Number of seconds simulated
-sim_ticks                                     2820500                       # Number of ticks simulated
-final_tick                                    2820500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
-sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 973752                       # Simulator instruction rate (inst/s)
-host_op_rate                                   969638                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              482917179                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 239104                       # Number of bytes of host memory used
-host_seconds                                     0.01                       # Real time elapsed on the host
-sim_insts                                        5641                       # Number of instructions simulated
-sim_ops                                          5641                       # Number of ops (including micro ops) simulated
-system.voltage_domain.voltage                       1                       # Voltage in Volts
-system.clk_domain.clock                          1000                       # Clock period in ticks
-system.physmem.pwrStateResidencyTicks::UNDEFINED      2820500                       # Cumulative time (in ticks) in various power states
-system.physmem.bytes_read::cpu.inst             22568                       # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.data              4301                       # Number of bytes read from this memory
-system.physmem.bytes_read::total                26869                       # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst        22568                       # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total           22568                       # Number of instructions bytes read from this memory
-system.physmem.bytes_written::cpu.data           3601                       # Number of bytes written to this memory
-system.physmem.bytes_written::total              3601                       # Number of bytes written to this memory
-system.physmem.num_reads::cpu.inst               5642                       # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.data               1135                       # Number of read requests responded to by this memory
-system.physmem.num_reads::total                  6777                       # Number of read requests responded to by this memory
-system.physmem.num_writes::cpu.data               901                       # Number of write requests responded to by this memory
-system.physmem.num_writes::total                  901                       # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst           8001418188                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data           1524906931                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total              9526325120                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst      8001418188                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total         8001418188                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data          1276723985                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total             1276723985                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst          8001418188                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data          2801630917                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total            10803049105                       # Total bandwidth to/from this memory (bytes/s)
-system.pwrStateResidencyTicks::UNDEFINED      2820500                       # Cumulative time (in ticks) in various power states
-system.cpu_clk_domain.clock                       500                       # Clock period in ticks
-system.cpu.dtb.read_hits                            0                       # DTB read hits
-system.cpu.dtb.read_misses                          0                       # DTB read misses
-system.cpu.dtb.read_accesses                        0                       # DTB read accesses
-system.cpu.dtb.write_hits                           0                       # DTB write hits
-system.cpu.dtb.write_misses                         0                       # DTB write misses
-system.cpu.dtb.write_accesses                       0                       # DTB write accesses
-system.cpu.dtb.hits                                 0                       # DTB hits
-system.cpu.dtb.misses                               0                       # DTB misses
-system.cpu.dtb.accesses                             0                       # DTB accesses
-system.cpu.itb.read_hits                            0                       # DTB read hits
-system.cpu.itb.read_misses                          0                       # DTB read misses
-system.cpu.itb.read_accesses                        0                       # DTB read accesses
-system.cpu.itb.write_hits                           0                       # DTB write hits
-system.cpu.itb.write_misses                         0                       # DTB write misses
-system.cpu.itb.write_accesses                       0                       # DTB write accesses
-system.cpu.itb.hits                                 0                       # DTB hits
-system.cpu.itb.misses                               0                       # DTB misses
-system.cpu.itb.accesses                             0                       # DTB accesses
-system.cpu.workload.numSyscalls                     7                       # Number of system calls
-system.cpu.pwrStateResidencyTicks::ON         2820500                       # Cumulative time (in ticks) in various power states
-system.cpu.numCycles                             5642                       # number of cpu cycles simulated
-system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
-system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
-system.cpu.committedInsts                        5641                       # Number of instructions committed
-system.cpu.committedOps                          5641                       # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses                  4957                       # Number of integer alu accesses
-system.cpu.num_fp_alu_accesses                      2                       # Number of float alu accesses
-system.cpu.num_func_calls                         191                       # number of times a function call or return occured
-system.cpu.num_conditional_control_insts          651                       # number of instructions that are conditional controls
-system.cpu.num_int_insts                         4957                       # number of integer instructions
-system.cpu.num_fp_insts                             2                       # number of float instructions
-system.cpu.num_int_register_reads                7072                       # number of times the integer registers were read
-system.cpu.num_int_register_writes               3291                       # number of times the integer registers were written
-system.cpu.num_fp_register_reads                    3                       # number of times the floating registers were read
-system.cpu.num_fp_register_writes                   1                       # number of times the floating registers were written
-system.cpu.num_mem_refs                          2037                       # number of memory refs
-system.cpu.num_load_insts                        1135                       # Number of load instructions
-system.cpu.num_store_insts                        902                       # Number of store instructions
-system.cpu.num_idle_cycles                          0                       # Number of idle cycles
-system.cpu.num_busy_cycles                       5642                       # Number of busy cycles
-system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
-system.cpu.idle_fraction                            0                       # Percentage of idle cycles
-system.cpu.Branches                               886                       # Number of branches fetched
-system.cpu.op_class::No_OpClass                   641     11.36%     11.36% # Class of executed instruction
-system.cpu.op_class::IntAlu                      2960     52.46%     63.82% # Class of executed instruction
-system.cpu.op_class::IntMult                        2      0.04%     63.86% # Class of executed instruction
-system.cpu.op_class::IntDiv                         0      0.00%     63.86% # Class of executed instruction
-system.cpu.op_class::FloatAdd                       2      0.04%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatCmp                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatCvt                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatMult                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatMultAcc                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatDiv                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatMisc                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatSqrt                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdAdd                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdAddAcc                     0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdAlu                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdCmp                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdCvt                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdMisc                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdMult                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdMultAcc                    0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdShift                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdSqrt                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatMult                  0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::MemRead                     1135     20.12%     84.01% # Class of executed instruction
-system.cpu.op_class::MemWrite                     902     15.99%    100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemRead                   0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemWrite                  0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::total                       5642                       # Class of executed instruction
-system.membus.snoop_filter.tot_requests             0                       # Total number of requests made to the snoop filter.
-system.membus.snoop_filter.hit_single_requests            0                       # Number of requests hitting in the snoop filter with a single holder of the requested data.
-system.membus.snoop_filter.hit_multi_requests            0                       # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.membus.snoop_filter.tot_snoops               0                       # Total number of snoops made to the snoop filter.
-system.membus.snoop_filter.hit_single_snoops            0                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
-system.membus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.membus.pwrStateResidencyTicks::UNDEFINED      2820500                       # Cumulative time (in ticks) in various power states
-system.membus.trans_dist::ReadReq                6777                       # Transaction distribution
-system.membus.trans_dist::ReadResp               6777                       # Transaction distribution
-system.membus.trans_dist::WriteReq                901                       # Transaction distribution
-system.membus.trans_dist::WriteResp               901                       # Transaction distribution
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port        11284                       # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port         4072                       # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total                  15356                       # Packet count per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port        22568                       # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port         7902                       # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total                   30470                       # Cumulative packet size per connected master and slave (bytes)
-system.membus.snoops                                0                       # Total snoops (count)
-system.membus.snoopTraffic                          0                       # Total snoop traffic (bytes)
-system.membus.snoop_fanout::samples              7678                       # Request fanout histogram
-system.membus.snoop_fanout::mean                    0                       # Request fanout histogram
-system.membus.snoop_fanout::stdev                   0                       # Request fanout histogram
-system.membus.snoop_fanout::underflows              0      0.00%      0.00% # Request fanout histogram
-system.membus.snoop_fanout::0                    7678    100.00%    100.00% # Request fanout histogram
-system.membus.snoop_fanout::1                       0      0.00%    100.00% # Request fanout histogram
-system.membus.snoop_fanout::overflows               0      0.00%    100.00% # Request fanout histogram
-system.membus.snoop_fanout::min_value               0                       # Request fanout histogram
-system.membus.snoop_fanout::max_value               0                       # Request fanout histogram
-system.membus.snoop_fanout::total                7678                       # Request fanout histogram
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini
deleted file mode 100644 (file)
index ff37cda..0000000
+++ /dev/null
@@ -1,1268 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000
-time_sync_spin_threshold=100000
-
-[system]
-type=System
-children=clk_domain cpu dvfs_handler mem_ctrls ruby sys_port_proxy voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=0:268435455:0:0:0:0
-memories=system.mem_ctrls
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.sys_port_proxy.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=clk_domain dtb interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu.clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-system=system
-tracer=system.cpu.tracer
-workload=system.cpu.workload
-dcache_port=system.ruby.l1_cntrl0.sequencer.slave[1]
-icache_port=system.ruby.l1_cntrl0.sequencer.slave[0]
-
-[system.cpu.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu.dtb]
-type=MipsTLB
-eventq_index=0
-size=64
-
-[system.cpu.interrupts]
-type=MipsInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=MipsISA
-eventq_index=0
-num_threads=1
-num_vpes=1
-system=system
-
-[system.cpu.itb]
-type=MipsTLB
-eventq_index=0
-size=64
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=LiveProcess
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/mips/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-max_stack_size=67108864
-output=cout
-pid=100
-ppid=99
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000
-
-[system.mem_ctrls]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-page_policy=open_adaptive
-power_model=Null
-range=0:268435455:5:19:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10
-static_frontend_latency=10
-tBURST=5
-tCCD_L=0
-tCK=1
-tCL=14
-tCS=3
-tRAS=35
-tRCD=14
-tREFI=7800
-tRFC=260
-tRP=14
-tRRD=6
-tRRD_L=0
-tRTP=8
-tRTW=3
-tWR=15
-tWTR=8
-tXAW=30
-tXP=6
-tXPDLL=0
-tXS=270
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.ruby.dir_cntrl0.memory
-
-[system.ruby]
-type=RubySystem
-children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network
-access_backing_store=false
-all_instructions=false
-block_size_bytes=64
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-hot_lines=false
-memory_size_bits=48
-num_of_sequencers=1
-number_of_virtual_networks=5
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-phys_mem=Null
-power_model=Null
-randomization=false
-
-[system.ruby.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.ruby.dir_cntrl0]
-type=Directory_Controller
-children=directory dmaRequestToDir dmaResponseFromDir forwardFromDir requestToDir responseFromDir responseFromMemory
-buffer_size=0
-clk_domain=system.ruby.clk_domain
-cluster_id=0
-default_p_state=UNDEFINED
-directory=system.ruby.dir_cntrl0.directory
-directory_latency=12
-dmaRequestToDir=system.ruby.dir_cntrl0.dmaRequestToDir
-dmaResponseFromDir=system.ruby.dir_cntrl0.dmaResponseFromDir
-eventq_index=0
-forwardFromDir=system.ruby.dir_cntrl0.forwardFromDir
-number_of_TBEs=256
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-recycle_latency=10
-requestToDir=system.ruby.dir_cntrl0.requestToDir
-responseFromDir=system.ruby.dir_cntrl0.responseFromDir
-responseFromMemory=system.ruby.dir_cntrl0.responseFromMemory
-ruby_system=system.ruby
-system=system
-to_memory_controller_latency=1
-transitions_per_cycle=4
-version=0
-memory=system.mem_ctrls.port
-
-[system.ruby.dir_cntrl0.directory]
-type=RubyDirectoryMemory
-eventq_index=0
-numa_high_bit=5
-size=268435456
-version=0
-
-[system.ruby.dir_cntrl0.dmaRequestToDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[3]
-
-[system.ruby.dir_cntrl0.dmaResponseFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[3]
-
-[system.ruby.dir_cntrl0.forwardFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-master=system.ruby.network.slave[4]
-
-[system.ruby.dir_cntrl0.requestToDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[2]
-
-[system.ruby.dir_cntrl0.responseFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-master=system.ruby.network.slave[2]
-
-[system.ruby.dir_cntrl0.responseFromMemory]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-
-[system.ruby.l1_cntrl0]
-type=L1Cache_Controller
-children=cacheMemory forwardToCache mandatoryQueue requestFromCache responseFromCache responseToCache sequencer
-buffer_size=0
-cacheMemory=system.ruby.l1_cntrl0.cacheMemory
-cache_response_latency=12
-clk_domain=system.cpu.clk_domain
-cluster_id=0
-default_p_state=UNDEFINED
-eventq_index=0
-forwardToCache=system.ruby.l1_cntrl0.forwardToCache
-issue_latency=2
-mandatoryQueue=system.ruby.l1_cntrl0.mandatoryQueue
-number_of_TBEs=256
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-recycle_latency=10
-requestFromCache=system.ruby.l1_cntrl0.requestFromCache
-responseFromCache=system.ruby.l1_cntrl0.responseFromCache
-responseToCache=system.ruby.l1_cntrl0.responseToCache
-ruby_system=system.ruby
-send_evictions=false
-sequencer=system.ruby.l1_cntrl0.sequencer
-system=system
-transitions_per_cycle=4
-version=0
-
-[system.ruby.l1_cntrl0.cacheMemory]
-type=RubyCache
-children=replacement_policy
-assoc=2
-block_size=0
-dataAccessLatency=1
-dataArrayBanks=1
-eventq_index=0
-is_icache=false
-replacement_policy=system.ruby.l1_cntrl0.cacheMemory.replacement_policy
-resourceStalls=false
-ruby_system=system.ruby
-size=256
-start_index_bit=6
-tagAccessLatency=1
-tagArrayBanks=1
-
-[system.ruby.l1_cntrl0.cacheMemory.replacement_policy]
-type=PseudoLRUReplacementPolicy
-assoc=2
-block_size=64
-eventq_index=0
-size=256
-
-[system.ruby.l1_cntrl0.forwardToCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[0]
-
-[system.ruby.l1_cntrl0.mandatoryQueue]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-
-[system.ruby.l1_cntrl0.requestFromCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[0]
-
-[system.ruby.l1_cntrl0.responseFromCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[1]
-
-[system.ruby.l1_cntrl0.responseToCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[1]
-
-[system.ruby.l1_cntrl0.sequencer]
-type=RubySequencer
-clk_domain=system.cpu.clk_domain
-coreid=99
-dcache=system.ruby.l1_cntrl0.cacheMemory
-dcache_hit_latency=1
-deadlock_threshold=500000
-default_p_state=UNDEFINED
-eventq_index=0
-garnet_standalone=false
-icache=system.ruby.l1_cntrl0.cacheMemory
-icache_hit_latency=1
-is_cpu_sequencer=true
-max_outstanding_requests=16
-no_retry_on_stall=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-ruby_system=system.ruby
-support_data_reqs=true
-support_inst_reqs=true
-system=system
-using_ruby_tester=false
-version=0
-slave=system.cpu.icache_port system.cpu.dcache_port
-
-[system.ruby.memctrl_clk_domain]
-type=DerivedClockDomain
-clk_divider=3
-clk_domain=system.ruby.clk_domain
-eventq_index=0
-
-[system.ruby.network]
-type=SimpleNetwork
-children=ext_links0 ext_links1 int_link_buffers00 int_link_buffers01 int_link_buffers02 int_link_buffers03 int_link_buffers04 int_link_buffers05 int_link_buffers06 int_link_buffers07 int_link_buffers08 int_link_buffers09 int_link_buffers10 int_link_buffers11 int_link_buffers12 int_link_buffers13 int_link_buffers14 int_link_buffers15 int_link_buffers16 int_link_buffers17 int_link_buffers18 int_link_buffers19 int_link_buffers20 int_link_buffers21 int_link_buffers22 int_link_buffers23 int_link_buffers24 int_link_buffers25 int_link_buffers26 int_link_buffers27 int_link_buffers28 int_link_buffers29 int_link_buffers30 int_link_buffers31 int_link_buffers32 int_link_buffers33 int_link_buffers34 int_link_buffers35 int_link_buffers36 int_link_buffers37 int_link_buffers38 int_link_buffers39 int_links0 int_links1 int_links2 int_links3 routers0 routers1 routers2
-adaptive_routing=false
-buffer_size=0
-clk_domain=system.ruby.clk_domain
-control_msg_size=8
-default_p_state=UNDEFINED
-endpoint_bandwidth=1000
-eventq_index=0
-ext_links=system.ruby.network.ext_links0 system.ruby.network.ext_links1
-int_link_buffers=system.ruby.network.int_link_buffers00 system.ruby.network.int_link_buffers01 system.ruby.network.int_link_buffers02 system.ruby.network.int_link_buffers03 system.ruby.network.int_link_buffers04 system.ruby.network.int_link_buffers05 system.ruby.network.int_link_buffers06 system.ruby.network.int_link_buffers07 system.ruby.network.int_link_buffers08 system.ruby.network.int_link_buffers09 system.ruby.network.int_link_buffers10 system.ruby.network.int_link_buffers11 system.ruby.network.int_link_buffers12 system.ruby.network.int_link_buffers13 system.ruby.network.int_link_buffers14 system.ruby.network.int_link_buffers15 system.ruby.network.int_link_buffers16 system.ruby.network.int_link_buffers17 system.ruby.network.int_link_buffers18 system.ruby.network.int_link_buffers19 system.ruby.network.int_link_buffers20 system.ruby.network.int_link_buffers21 system.ruby.network.int_link_buffers22 system.ruby.network.int_link_buffers23 system.ruby.network.int_link_buffers24 system.ruby.network.int_link_buffers25 system.ruby.network.int_link_buffers26 system.ruby.network.int_link_buffers27 system.ruby.network.int_link_buffers28 system.ruby.network.int_link_buffers29 system.ruby.network.int_link_buffers30 system.ruby.network.int_link_buffers31 system.ruby.network.int_link_buffers32 system.ruby.network.int_link_buffers33 system.ruby.network.int_link_buffers34 system.ruby.network.int_link_buffers35 system.ruby.network.int_link_buffers36 system.ruby.network.int_link_buffers37 system.ruby.network.int_link_buffers38 system.ruby.network.int_link_buffers39
-int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2 system.ruby.network.int_links3
-netifs=
-number_of_virtual_networks=5
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
-ruby_system=system.ruby
-topology=Crossbar
-master=system.ruby.l1_cntrl0.forwardToCache.slave system.ruby.l1_cntrl0.responseToCache.slave system.ruby.dir_cntrl0.requestToDir.slave system.ruby.dir_cntrl0.dmaRequestToDir.slave
-slave=system.ruby.l1_cntrl0.requestFromCache.master system.ruby.l1_cntrl0.responseFromCache.master system.ruby.dir_cntrl0.responseFromDir.master system.ruby.dir_cntrl0.dmaResponseFromDir.master system.ruby.dir_cntrl0.forwardFromDir.master
-
-[system.ruby.network.ext_links0]
-type=SimpleExtLink
-bandwidth_factor=16
-eventq_index=0
-ext_node=system.ruby.l1_cntrl0
-int_node=system.ruby.network.routers0
-latency=1
-link_id=0
-weight=1
-
-[system.ruby.network.ext_links1]
-type=SimpleExtLink
-bandwidth_factor=16
-eventq_index=0
-ext_node=system.ruby.dir_cntrl0
-int_node=system.ruby.network.routers1
-latency=1
-link_id=1
-weight=1
-
-[system.ruby.network.int_link_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers15]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers16]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers17]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers18]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers19]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers20]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers21]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers22]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers23]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers24]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers25]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers26]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers27]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers28]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers29]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers30]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers31]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers32]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers33]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers34]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers35]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers36]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers37]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers38]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers39]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_links0]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers2
-eventq_index=0
-latency=1
-link_id=2
-src_node=system.ruby.network.routers0
-src_outport=
-weight=1
-
-[system.ruby.network.int_links1]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers2
-eventq_index=0
-latency=1
-link_id=3
-src_node=system.ruby.network.routers1
-src_outport=
-weight=1
-
-[system.ruby.network.int_links2]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers0
-eventq_index=0
-latency=1
-link_id=4
-src_node=system.ruby.network.routers2
-src_outport=
-weight=1
-
-[system.ruby.network.int_links3]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers1
-eventq_index=0
-latency=1
-link_id=5
-src_node=system.ruby.network.routers2
-src_outport=
-weight=1
-
-[system.ruby.network.routers0]
-type=Switch
-children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14
-power_model=Null
-router_id=0
-virt_nets=5
-
-[system.ruby.network.routers0.port_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1]
-type=Switch
-children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14
-power_model=Null
-router_id=1
-virt_nets=5
-
-[system.ruby.network.routers1.port_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2]
-type=Switch
-children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14 port_buffers15 port_buffers16 port_buffers17 port_buffers18 port_buffers19
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19
-power_model=Null
-router_id=2
-virt_nets=5
-
-[system.ruby.network.routers2.port_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers15]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers16]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers17]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers18]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers19]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.sys_port_proxy]
-type=RubyPortProxy
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_cpu_sequencer=true
-no_retry_on_stall=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-ruby_system=system.ruby
-support_data_reqs=true
-support_inst_reqs=true
-system=system
-using_ruby_tester=false
-version=0
-slave=system.system_port
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simerr b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simerr
deleted file mode 100755 (executable)
index f6f6f15..0000000
+++ /dev/null
@@ -1,10 +0,0 @@
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simout
deleted file mode 100755 (executable)
index 2e6bde8..0000000
+++ /dev/null
@@ -1,15 +0,0 @@
-Redirecting stdout to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby/simout
-Redirecting stderr to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Oct 13 2016 20:36:34
-gem5 started Oct 13 2016 20:36:59
-gem5 executing on e108600-lin, pid 36842
-command line: /work/curdun01/gem5-external.hg/build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/00.hello/mips/linux/simple-timing-ruby
-
-Global frequency set at 1000000000 ticks per second
-info: Entering event queue @ 0.  Starting simulation...
-info: Increasing stack size by one page.
-Hello World!
-Exiting @ tick 106125 because target called exit()
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt
deleted file mode 100644 (file)
index f7eb0c9..0000000
+++ /dev/null
@@ -1,689 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000106                       # Number of seconds simulated
-sim_ticks                                      106125                       # Number of ticks simulated
-final_tick                                     106125                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
-sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                  95829                       # Simulator instruction rate (inst/s)
-host_op_rate                                    95814                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                1802278                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 414992                       # Number of bytes of host memory used
-host_seconds                                     0.06                       # Real time elapsed on the host
-sim_insts                                        5641                       # Number of instructions simulated
-sim_ops                                          5641                       # Number of ops (including micro ops) simulated
-system.voltage_domain.voltage                       1                       # Voltage in Volts
-system.clk_domain.clock                             1                       # Clock period in ticks
-system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED       106125                       # Cumulative time (in ticks) in various power states
-system.mem_ctrls.bytes_read::ruby.dir_cntrl0        94208                       # Number of bytes read from this memory
-system.mem_ctrls.bytes_read::total              94208                       # Number of bytes read from this memory
-system.mem_ctrls.bytes_written::ruby.dir_cntrl0        93952                       # Number of bytes written to this memory
-system.mem_ctrls.bytes_written::total           93952                       # Number of bytes written to this memory
-system.mem_ctrls.num_reads::ruby.dir_cntrl0         1472                       # Number of read requests responded to by this memory
-system.mem_ctrls.num_reads::total                1472                       # Number of read requests responded to by this memory
-system.mem_ctrls.num_writes::ruby.dir_cntrl0         1468                       # Number of write requests responded to by this memory
-system.mem_ctrls.num_writes::total               1468                       # Number of write requests responded to by this memory
-system.mem_ctrls.bw_read::ruby.dir_cntrl0    887707892                       # Total read bandwidth from this memory (bytes/s)
-system.mem_ctrls.bw_read::total             887707892                       # Total read bandwidth from this memory (bytes/s)
-system.mem_ctrls.bw_write::ruby.dir_cntrl0    885295642                       # Write bandwidth from this memory (bytes/s)
-system.mem_ctrls.bw_write::total            885295642                       # Write bandwidth from this memory (bytes/s)
-system.mem_ctrls.bw_total::ruby.dir_cntrl0   1773003534                       # Total bandwidth to/from this memory (bytes/s)
-system.mem_ctrls.bw_total::total           1773003534                       # Total bandwidth to/from this memory (bytes/s)
-system.mem_ctrls.readReqs                        1472                       # Number of read requests accepted
-system.mem_ctrls.writeReqs                       1468                       # Number of write requests accepted
-system.mem_ctrls.readBursts                      1472                       # Number of DRAM read bursts, including those serviced by the write queue
-system.mem_ctrls.writeBursts                     1468                       # Number of DRAM write bursts, including those merged in the write queue
-system.mem_ctrls.bytesReadDRAM                  58880                       # Total number of bytes read from DRAM
-system.mem_ctrls.bytesReadWrQ                   35328                       # Total number of bytes read from write queue
-system.mem_ctrls.bytesWritten                   59776                       # Total number of bytes written to DRAM
-system.mem_ctrls.bytesReadSys                   94208                       # Total read bytes from the system interface side
-system.mem_ctrls.bytesWrittenSys                93952                       # Total written bytes from the system interface side
-system.mem_ctrls.servicedByWrQ                    552                       # Number of DRAM read bursts serviced by the write queue
-system.mem_ctrls.mergedWrBursts                   510                       # Number of DRAM write bursts merged with an existing one
-system.mem_ctrls.neitherReadNorWriteReqs            0                       # Number of requests that are neither read nor write
-system.mem_ctrls.perBankRdBursts::0                31                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::1                 0                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::2                 0                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::3                 0                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::4                 7                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::5                 3                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::6                13                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::7                83                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::8                66                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::9               250                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::10              100                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::11               44                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::12              107                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::13               46                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::14              157                       # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::15               13                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::0                32                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::1                 0                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::2                 0                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::3                 0                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::4                 7                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::5                 3                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::6                13                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::7                75                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::8                60                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::9               250                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::10              100                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::11               45                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::12              110                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::13               48                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::14              177                       # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::15               14                       # Per bank write bursts
-system.mem_ctrls.numRdRetry                         0                       # Number of times read queue was full causing retry
-system.mem_ctrls.numWrRetry                         0                       # Number of times write queue was full causing retry
-system.mem_ctrls.totGap                        106076                       # Total gap between requests
-system.mem_ctrls.readPktSize::0                     0                       # Read request sizes (log2)
-system.mem_ctrls.readPktSize::1                     0                       # Read request sizes (log2)
-system.mem_ctrls.readPktSize::2                     0                       # Read request sizes (log2)
-system.mem_ctrls.readPktSize::3                     0                       # Read request sizes (log2)
-system.mem_ctrls.readPktSize::4                     0                       # Read request sizes (log2)
-system.mem_ctrls.readPktSize::5                     0                       # Read request sizes (log2)
-system.mem_ctrls.readPktSize::6                  1472                       # Read request sizes (log2)
-system.mem_ctrls.writePktSize::0                    0                       # Write request sizes (log2)
-system.mem_ctrls.writePktSize::1                    0                       # Write request sizes (log2)
-system.mem_ctrls.writePktSize::2                    0                       # Write request sizes (log2)
-system.mem_ctrls.writePktSize::3                    0                       # Write request sizes (log2)
-system.mem_ctrls.writePktSize::4                    0                       # Write request sizes (log2)
-system.mem_ctrls.writePktSize::5                    0                       # Write request sizes (log2)
-system.mem_ctrls.writePktSize::6                 1468                       # Write request sizes (log2)
-system.mem_ctrls.rdQLenPdf::0                     920                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::1                       0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::2                       0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::3                       0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::4                       0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::5                       0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::6                       0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::7                       0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::8                       0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::9                       0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::10                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::11                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::12                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::13                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::14                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::15                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::16                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::17                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::18                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::19                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::20                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::21                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::22                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::23                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::24                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::25                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::26                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::27                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::28                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::29                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::30                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::31                      0                       # What read queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::0                       1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::1                       1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::2                       1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::3                       1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::4                       1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::5                       1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::6                       1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::7                       1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::8                       1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::9                       1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::10                      1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::11                      1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::12                      1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::13                      1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::14                      1                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::15                      8                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::16                     11                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::17                     51                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::18                     61                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::19                     60                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::20                     61                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::21                     61                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::22                     58                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::23                     59                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::24                     57                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::25                     57                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::26                     57                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::27                     57                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::28                     57                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::29                     57                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::30                     57                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::31                     57                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::32                     57                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::33                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::34                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::35                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::36                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::37                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::38                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::39                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::40                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::41                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::42                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::43                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::44                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::45                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::46                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::47                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::48                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::49                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::50                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::51                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::52                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::53                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::54                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::55                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::56                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::57                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::58                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::59                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::60                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::61                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::62                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::63                      0                       # What write queue length does an incoming req see
-system.mem_ctrls.bytesPerActivate::samples          352                       # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::mean    334.181818                       # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::gmean   220.342342                       # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::stdev   312.466834                       # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::0-127           73     20.74%     20.74% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::128-255          116     32.95%     53.69% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::256-383           49     13.92%     67.61% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::384-511           31      8.81%     76.42% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::512-639           18      5.11%     81.53% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::640-767           13      3.69%     85.23% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::768-895            9      2.56%     87.78% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::896-1023            3      0.85%     88.64% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::1024-1151           40     11.36%    100.00% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::total          352                       # Bytes accessed per row activation
-system.mem_ctrls.rdPerTurnAround::samples           57                       # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::mean             16                       # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::gmean     15.842454                       # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::stdev      2.738613                       # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::12-13             2      3.51%      3.51% # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::14-15            25     43.86%     47.37% # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::16-17            25     43.86%     91.23% # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::18-19             4      7.02%     98.25% # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::34-35             1      1.75%    100.00% # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::total            57                       # Reads before turning the bus around for writes
-system.mem_ctrls.wrPerTurnAround::samples           57                       # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::mean      16.385965                       # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::gmean     16.360622                       # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::stdev      0.959062                       # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::16               48     84.21%     84.21% # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::17                1      1.75%     85.96% # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::18                4      7.02%     92.98% # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::19                3      5.26%     98.25% # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::20                1      1.75%    100.00% # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::total            57                       # Writes before turning the bus around for reads
-system.mem_ctrls.totQLat                        18473                       # Total ticks spent queuing
-system.mem_ctrls.totMemAccLat                   35953                       # Total ticks spent from burst creation until serviced by the DRAM
-system.mem_ctrls.totBusLat                       4600                       # Total ticks spent in databus transfers
-system.mem_ctrls.avgQLat                        20.08                       # Average queueing delay per DRAM burst
-system.mem_ctrls.avgBusLat                       5.00                       # Average bus latency per DRAM burst
-system.mem_ctrls.avgMemAccLat                   39.08                       # Average memory access latency per DRAM burst
-system.mem_ctrls.avgRdBW                       554.82                       # Average DRAM read bandwidth in MiByte/s
-system.mem_ctrls.avgWrBW                       563.26                       # Average achieved write bandwidth in MiByte/s
-system.mem_ctrls.avgRdBWSys                    887.71                       # Average system read bandwidth in MiByte/s
-system.mem_ctrls.avgWrBWSys                    885.30                       # Average system write bandwidth in MiByte/s
-system.mem_ctrls.peakBW                      12800.00                       # Theoretical peak bandwidth in MiByte/s
-system.mem_ctrls.busUtil                         8.73                       # Data bus utilization in percentage
-system.mem_ctrls.busUtilRead                     4.33                       # Data bus utilization in percentage for reads
-system.mem_ctrls.busUtilWrite                    4.40                       # Data bus utilization in percentage for writes
-system.mem_ctrls.avgRdQLen                       1.00                       # Average read queue length when enqueuing
-system.mem_ctrls.avgWrQLen                      25.41                       # Average write queue length when enqueuing
-system.mem_ctrls.readRowHits                      632                       # Number of row buffer hits during reads
-system.mem_ctrls.writeRowHits                     865                       # Number of row buffer hits during writes
-system.mem_ctrls.readRowHitRate                 68.70                       # Row buffer hit rate for reads
-system.mem_ctrls.writeRowHitRate                90.29                       # Row buffer hit rate for writes
-system.mem_ctrls.avgGap                         36.08                       # Average gap between requests
-system.mem_ctrls.pageHitRate                    79.71                       # Row buffer hit rate, read and write combined
-system.mem_ctrls_0.actEnergy                   542640                       # Energy for activate commands per rank (pJ)
-system.mem_ctrls_0.preEnergy                   289800                       # Energy for precharge commands per rank (pJ)
-system.mem_ctrls_0.readEnergy                 1565088                       # Energy for read commands per rank (pJ)
-system.mem_ctrls_0.writeEnergy                1085760                       # Energy for write commands per rank (pJ)
-system.mem_ctrls_0.refreshEnergy         8604960.000000                       # Energy for refresh commands per rank (pJ)
-system.mem_ctrls_0.actBackEnergy             15123696                       # Energy for active background per rank (pJ)
-system.mem_ctrls_0.preBackEnergy               297600                       # Energy for precharge background per rank (pJ)
-system.mem_ctrls_0.actPowerDownEnergy        24352224                       # Energy for active power-down per rank (pJ)
-system.mem_ctrls_0.prePowerDownEnergy         7106304                       # Energy for precharge power-down per rank (pJ)
-system.mem_ctrls_0.selfRefreshEnergy     647736.000000                       # Energy for self refresh per rank (pJ)
-system.mem_ctrls_0.totalEnergy               59655384                       # Total energy per rank (pJ)
-system.mem_ctrls_0.averagePower            562.123760                       # Core power per rank (mW)
-system.mem_ctrls_0.totalIdleTime                71087                       # Total Idle time Per DRAM Rank
-system.mem_ctrls_0.memoryStateTime::IDLE          340                       # Time in different power states
-system.mem_ctrls_0.memoryStateTime::REF          3646                       # Time in different power states
-system.mem_ctrls_0.memoryStateTime::SREF          185                       # Time in different power states
-system.mem_ctrls_0.memoryStateTime::PRE_PDN        18506                       # Time in different power states
-system.mem_ctrls_0.memoryStateTime::ACT         30044                       # Time in different power states
-system.mem_ctrls_0.memoryStateTime::ACT_PDN        53404                       # Time in different power states
-system.mem_ctrls_1.actEnergy                  2006340                       # Energy for activate commands per rank (pJ)
-system.mem_ctrls_1.preEnergy                  1070328                       # Energy for precharge commands per rank (pJ)
-system.mem_ctrls_1.readEnergy                 8944992                       # Energy for read commands per rank (pJ)
-system.mem_ctrls_1.writeEnergy                6715008                       # Energy for write commands per rank (pJ)
-system.mem_ctrls_1.refreshEnergy         7990320.000000                       # Energy for refresh commands per rank (pJ)
-system.mem_ctrls_1.actBackEnergy             16837800                       # Energy for active background per rank (pJ)
-system.mem_ctrls_1.preBackEnergy               207360                       # Energy for precharge background per rank (pJ)
-system.mem_ctrls_1.actPowerDownEnergy        31179912                       # Energy for active power-down per rank (pJ)
-system.mem_ctrls_1.prePowerDownEnergy          108672                       # Energy for precharge power-down per rank (pJ)
-system.mem_ctrls_1.selfRefreshEnergy                0                       # Energy for self refresh per rank (pJ)
-system.mem_ctrls_1.totalEnergy               75060732                       # Total energy per rank (pJ)
-system.mem_ctrls_1.averagePower            707.286049                       # Core power per rank (mW)
-system.mem_ctrls_1.totalIdleTime                68578                       # Total Idle time Per DRAM Rank
-system.mem_ctrls_1.memoryStateTime::IDLE          148                       # Time in different power states
-system.mem_ctrls_1.memoryStateTime::REF          3380                       # Time in different power states
-system.mem_ctrls_1.memoryStateTime::SREF            0                       # Time in different power states
-system.mem_ctrls_1.memoryStateTime::PRE_PDN          283                       # Time in different power states
-system.mem_ctrls_1.memoryStateTime::ACT         33937                       # Time in different power states
-system.mem_ctrls_1.memoryStateTime::ACT_PDN        68377                       # Time in different power states
-system.pwrStateResidencyTicks::UNDEFINED       106125                       # Cumulative time (in ticks) in various power states
-system.cpu.clk_domain.clock                         1                       # Clock period in ticks
-system.cpu.dtb.read_hits                            0                       # DTB read hits
-system.cpu.dtb.read_misses                          0                       # DTB read misses
-system.cpu.dtb.read_accesses                        0                       # DTB read accesses
-system.cpu.dtb.write_hits                           0                       # DTB write hits
-system.cpu.dtb.write_misses                         0                       # DTB write misses
-system.cpu.dtb.write_accesses                       0                       # DTB write accesses
-system.cpu.dtb.hits                                 0                       # DTB hits
-system.cpu.dtb.misses                               0                       # DTB misses
-system.cpu.dtb.accesses                             0                       # DTB accesses
-system.cpu.itb.read_hits                            0                       # DTB read hits
-system.cpu.itb.read_misses                          0                       # DTB read misses
-system.cpu.itb.read_accesses                        0                       # DTB read accesses
-system.cpu.itb.write_hits                           0                       # DTB write hits
-system.cpu.itb.write_misses                         0                       # DTB write misses
-system.cpu.itb.write_accesses                       0                       # DTB write accesses
-system.cpu.itb.hits                                 0                       # DTB hits
-system.cpu.itb.misses                               0                       # DTB misses
-system.cpu.itb.accesses                             0                       # DTB accesses
-system.cpu.workload.numSyscalls                     7                       # Number of system calls
-system.cpu.pwrStateResidencyTicks::ON          106125                       # Cumulative time (in ticks) in various power states
-system.cpu.numCycles                           106125                       # number of cpu cycles simulated
-system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
-system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
-system.cpu.committedInsts                        5641                       # Number of instructions committed
-system.cpu.committedOps                          5641                       # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses                  4957                       # Number of integer alu accesses
-system.cpu.num_fp_alu_accesses                      2                       # Number of float alu accesses
-system.cpu.num_func_calls                         191                       # number of times a function call or return occured
-system.cpu.num_conditional_control_insts          651                       # number of instructions that are conditional controls
-system.cpu.num_int_insts                         4957                       # number of integer instructions
-system.cpu.num_fp_insts                             2                       # number of float instructions
-system.cpu.num_int_register_reads                7072                       # number of times the integer registers were read
-system.cpu.num_int_register_writes               3291                       # number of times the integer registers were written
-system.cpu.num_fp_register_reads                    3                       # number of times the floating registers were read
-system.cpu.num_fp_register_writes                   1                       # number of times the floating registers were written
-system.cpu.num_mem_refs                          2037                       # number of memory refs
-system.cpu.num_load_insts                        1135                       # Number of load instructions
-system.cpu.num_store_insts                        902                       # Number of store instructions
-system.cpu.num_idle_cycles                          0                       # Number of idle cycles
-system.cpu.num_busy_cycles                     106125                       # Number of busy cycles
-system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
-system.cpu.idle_fraction                            0                       # Percentage of idle cycles
-system.cpu.Branches                               886                       # Number of branches fetched
-system.cpu.op_class::No_OpClass                   641     11.36%     11.36% # Class of executed instruction
-system.cpu.op_class::IntAlu                      2960     52.46%     63.82% # Class of executed instruction
-system.cpu.op_class::IntMult                        2      0.04%     63.86% # Class of executed instruction
-system.cpu.op_class::IntDiv                         0      0.00%     63.86% # Class of executed instruction
-system.cpu.op_class::FloatAdd                       2      0.04%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatCmp                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatCvt                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatMult                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatMultAcc                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatDiv                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatMisc                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatSqrt                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdAdd                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdAddAcc                     0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdAlu                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdCmp                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdCvt                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdMisc                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdMult                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdMultAcc                    0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdShift                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdSqrt                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatMult                  0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::MemRead                     1135     20.12%     84.01% # Class of executed instruction
-system.cpu.op_class::MemWrite                     902     15.99%    100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemRead                   0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemWrite                  0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::total                       5642                       # Class of executed instruction
-system.ruby.clk_domain.clock                        1                       # Clock period in ticks
-system.ruby.pwrStateResidencyTicks::UNDEFINED       106125                       # Cumulative time (in ticks) in various power states
-system.ruby.delayHist::bucket_size                  1                       # delay histogram for all message
-system.ruby.delayHist::max_bucket                   9                       # delay histogram for all message
-system.ruby.delayHist::samples                   2940                       # delay histogram for all message
-system.ruby.delayHist                    |        2940    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% # delay histogram for all message
-system.ruby.delayHist::total                     2940                       # delay histogram for all message
-system.ruby.outstanding_req_hist_seqr::bucket_size            1                      
-system.ruby.outstanding_req_hist_seqr::max_bucket            9                      
-system.ruby.outstanding_req_hist_seqr::samples         7679                      
-system.ruby.outstanding_req_hist_seqr::mean            1                      
-system.ruby.outstanding_req_hist_seqr::gmean            1                      
-system.ruby.outstanding_req_hist_seqr    |           0      0.00%      0.00% |        7679    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.outstanding_req_hist_seqr::total         7679                      
-system.ruby.latency_hist_seqr::bucket_size           64                      
-system.ruby.latency_hist_seqr::max_bucket          639                      
-system.ruby.latency_hist_seqr::samples           7678                      
-system.ruby.latency_hist_seqr::mean         12.821959                      
-system.ruby.latency_hist_seqr::gmean         2.158431                      
-system.ruby.latency_hist_seqr::stdev        29.332675                      
-system.ruby.latency_hist_seqr            |        6783     88.34%     88.34% |         834     10.86%     99.21% |          40      0.52%     99.73% |           8      0.10%     99.83% |           8      0.10%     99.93% |           5      0.07%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.latency_hist_seqr::total             7678                      
-system.ruby.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.hit_latency_hist_seqr::samples         6206                      
-system.ruby.hit_latency_hist_seqr::mean             1                      
-system.ruby.hit_latency_hist_seqr::gmean            1                      
-system.ruby.hit_latency_hist_seqr        |           0      0.00%      0.00% |        6206    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.hit_latency_hist_seqr::total         6206                      
-system.ruby.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.miss_latency_hist_seqr::samples         1472                      
-system.ruby.miss_latency_hist_seqr::mean    62.663723                      
-system.ruby.miss_latency_hist_seqr::gmean    55.319189                      
-system.ruby.miss_latency_hist_seqr::stdev    37.614530                      
-system.ruby.miss_latency_hist_seqr       |         577     39.20%     39.20% |         834     56.66%     95.86% |          40      2.72%     98.57% |           8      0.54%     99.12% |           8      0.54%     99.66% |           5      0.34%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.miss_latency_hist_seqr::total         1472                      
-system.ruby.Directory.incomplete_times_seqr         1471                      
-system.ruby.dir_cntrl0.forwardFromDir.avg_buf_msgs     0.013833                       # Average number of messages in buffer
-system.ruby.dir_cntrl0.forwardFromDir.avg_stall_time     0.997663                       # Average number of cycles messages are stalled in this MB
-system.ruby.dir_cntrl0.requestToDir.avg_buf_msgs     0.027703                       # Average number of messages in buffer
-system.ruby.dir_cntrl0.requestToDir.avg_stall_time    11.765826                       # Average number of cycles messages are stalled in this MB
-system.ruby.dir_cntrl0.responseFromDir.avg_buf_msgs     0.013870                       # Average number of messages in buffer
-system.ruby.dir_cntrl0.responseFromDir.avg_stall_time     0.999350                       # Average number of cycles messages are stalled in this MB
-system.ruby.dir_cntrl0.responseFromMemory.avg_buf_msgs     0.027703                       # Average number of messages in buffer
-system.ruby.dir_cntrl0.responseFromMemory.avg_stall_time     0.999359                       # Average number of cycles messages are stalled in this MB
-system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED       106125                       # Cumulative time (in ticks) in various power states
-system.ruby.l1_cntrl0.cacheMemory.demand_hits         6206                       # Number of cache demand hits
-system.ruby.l1_cntrl0.cacheMemory.demand_misses         1472                       # Number of cache demand misses
-system.ruby.l1_cntrl0.cacheMemory.demand_accesses         7678                       # Number of cache demand accesses
-system.ruby.l1_cntrl0.forwardToCache.avg_buf_msgs     0.013833                       # Average number of messages in buffer
-system.ruby.l1_cntrl0.forwardToCache.avg_stall_time     6.983246                       # Average number of cycles messages are stalled in this MB
-system.ruby.l1_cntrl0.mandatoryQueue.avg_buf_msgs     0.072357                       # Average number of messages in buffer
-system.ruby.l1_cntrl0.mandatoryQueue.avg_stall_time     0.999991                       # Average number of cycles messages are stalled in this MB
-system.ruby.l1_cntrl0.requestFromCache.avg_buf_msgs     0.055406                       # Average number of messages in buffer
-system.ruby.l1_cntrl0.requestFromCache.avg_stall_time     1.999943                       # Average number of cycles messages are stalled in this MB
-system.ruby.l1_cntrl0.responseToCache.avg_buf_msgs     0.013870                       # Average number of messages in buffer
-system.ruby.l1_cntrl0.responseToCache.avg_stall_time     6.995053                       # Average number of cycles messages are stalled in this MB
-system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED       106125                       # Cumulative time (in ticks) in various power states
-system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED       106125                       # Cumulative time (in ticks) in various power states
-system.ruby.memctrl_clk_domain.clock                3                       # Clock period in ticks
-system.ruby.network.routers0.port_buffers03.avg_buf_msgs     0.013833                       # Average number of messages in buffer
-system.ruby.network.routers0.port_buffers03.avg_stall_time     5.985696                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers0.port_buffers04.avg_buf_msgs     0.013870                       # Average number of messages in buffer
-system.ruby.network.routers0.port_buffers04.avg_stall_time     5.995816                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers0.port_buffers07.avg_buf_msgs     0.083033                       # Average number of messages in buffer
-system.ruby.network.routers0.port_buffers07.avg_stall_time     6.766579                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED       106125                       # Cumulative time (in ticks) in various power states
-system.ruby.network.routers0.percent_links_utilized     6.925795                      
-system.ruby.network.routers0.msg_count.Control::2         1472                      
-system.ruby.network.routers0.msg_count.Data::2         1468                      
-system.ruby.network.routers0.msg_count.Response_Data::4         1472                      
-system.ruby.network.routers0.msg_count.Writeback_Control::3         1468                      
-system.ruby.network.routers0.msg_bytes.Control::2        11776                      
-system.ruby.network.routers0.msg_bytes.Data::2       105696                      
-system.ruby.network.routers0.msg_bytes.Response_Data::4       105984                      
-system.ruby.network.routers0.msg_bytes.Writeback_Control::3        11744                      
-system.ruby.network.routers1.port_buffers02.avg_buf_msgs     0.027703                       # Average number of messages in buffer
-system.ruby.network.routers1.port_buffers02.avg_stall_time    10.766014                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers1.port_buffers06.avg_buf_msgs     0.013833                       # Average number of messages in buffer
-system.ruby.network.routers1.port_buffers06.avg_stall_time     1.995307                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers1.port_buffers07.avg_buf_msgs     0.013870                       # Average number of messages in buffer
-system.ruby.network.routers1.port_buffers07.avg_stall_time     1.998681                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED       106125                       # Cumulative time (in ticks) in various power states
-system.ruby.network.routers1.percent_links_utilized     6.925795                      
-system.ruby.network.routers1.msg_count.Control::2         1472                      
-system.ruby.network.routers1.msg_count.Data::2         1468                      
-system.ruby.network.routers1.msg_count.Response_Data::4         1472                      
-system.ruby.network.routers1.msg_count.Writeback_Control::3         1468                      
-system.ruby.network.routers1.msg_bytes.Control::2        11776                      
-system.ruby.network.routers1.msg_bytes.Data::2       105696                      
-system.ruby.network.routers1.msg_bytes.Response_Data::4       105984                      
-system.ruby.network.routers1.msg_bytes.Writeback_Control::3        11744                      
-system.ruby.network.int_link_buffers02.avg_buf_msgs     0.027703                       # Average number of messages in buffer
-system.ruby.network.int_link_buffers02.avg_stall_time     7.766466                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.int_link_buffers08.avg_buf_msgs     0.013833                       # Average number of messages in buffer
-system.ruby.network.int_link_buffers08.avg_stall_time     2.992933                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.int_link_buffers09.avg_buf_msgs     0.013870                       # Average number of messages in buffer
-system.ruby.network.int_link_buffers09.avg_stall_time     2.997993                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.int_link_buffers13.avg_buf_msgs     0.013833                       # Average number of messages in buffer
-system.ruby.network.int_link_buffers13.avg_stall_time     4.988127                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.int_link_buffers14.avg_buf_msgs     0.013870                       # Average number of messages in buffer
-system.ruby.network.int_link_buffers14.avg_stall_time     4.996561                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.int_link_buffers17.avg_buf_msgs     0.027703                       # Average number of messages in buffer
-system.ruby.network.int_link_buffers17.avg_stall_time     9.766184                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers2.port_buffers03.avg_buf_msgs     0.013833                       # Average number of messages in buffer
-system.ruby.network.routers2.port_buffers03.avg_stall_time     3.990540                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers2.port_buffers04.avg_buf_msgs     0.013870                       # Average number of messages in buffer
-system.ruby.network.routers2.port_buffers04.avg_stall_time     3.997286                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers2.port_buffers07.avg_buf_msgs     0.027703                       # Average number of messages in buffer
-system.ruby.network.routers2.port_buffers07.avg_stall_time     8.766334                       # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED       106125                       # Cumulative time (in ticks) in various power states
-system.ruby.network.routers2.percent_links_utilized     6.925795                      
-system.ruby.network.routers2.msg_count.Control::2         1472                      
-system.ruby.network.routers2.msg_count.Data::2         1468                      
-system.ruby.network.routers2.msg_count.Response_Data::4         1472                      
-system.ruby.network.routers2.msg_count.Writeback_Control::3         1468                      
-system.ruby.network.routers2.msg_bytes.Control::2        11776                      
-system.ruby.network.routers2.msg_bytes.Data::2       105696                      
-system.ruby.network.routers2.msg_bytes.Response_Data::4       105984                      
-system.ruby.network.routers2.msg_bytes.Writeback_Control::3        11744                      
-system.ruby.network.pwrStateResidencyTicks::UNDEFINED       106125                       # Cumulative time (in ticks) in various power states
-system.ruby.network.msg_count.Control            4416                      
-system.ruby.network.msg_count.Data               4404                      
-system.ruby.network.msg_count.Response_Data         4416                      
-system.ruby.network.msg_count.Writeback_Control         4404                      
-system.ruby.network.msg_byte.Control            35328                      
-system.ruby.network.msg_byte.Data              317088                      
-system.ruby.network.msg_byte.Response_Data       317952                      
-system.ruby.network.msg_byte.Writeback_Control        35232                      
-system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED       106125                       # Cumulative time (in ticks) in various power states
-system.ruby.network.routers0.throttle0.link_utilization     6.933333                      
-system.ruby.network.routers0.throttle0.msg_count.Response_Data::4         1472                      
-system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3         1468                      
-system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4       105984                      
-system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3        11744                      
-system.ruby.network.routers0.throttle1.link_utilization     6.918257                      
-system.ruby.network.routers0.throttle1.msg_count.Control::2         1472                      
-system.ruby.network.routers0.throttle1.msg_count.Data::2         1468                      
-system.ruby.network.routers0.throttle1.msg_bytes.Control::2        11776                      
-system.ruby.network.routers0.throttle1.msg_bytes.Data::2       105696                      
-system.ruby.network.routers1.throttle0.link_utilization     6.918257                      
-system.ruby.network.routers1.throttle0.msg_count.Control::2         1472                      
-system.ruby.network.routers1.throttle0.msg_count.Data::2         1468                      
-system.ruby.network.routers1.throttle0.msg_bytes.Control::2        11776                      
-system.ruby.network.routers1.throttle0.msg_bytes.Data::2       105696                      
-system.ruby.network.routers1.throttle1.link_utilization     6.933333                      
-system.ruby.network.routers1.throttle1.msg_count.Response_Data::4         1472                      
-system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3         1468                      
-system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4       105984                      
-system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3        11744                      
-system.ruby.network.routers2.throttle0.link_utilization     6.933333                      
-system.ruby.network.routers2.throttle0.msg_count.Response_Data::4         1472                      
-system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3         1468                      
-system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4       105984                      
-system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3        11744                      
-system.ruby.network.routers2.throttle1.link_utilization     6.918257                      
-system.ruby.network.routers2.throttle1.msg_count.Control::2         1472                      
-system.ruby.network.routers2.throttle1.msg_count.Data::2         1468                      
-system.ruby.network.routers2.throttle1.msg_bytes.Control::2        11776                      
-system.ruby.network.routers2.throttle1.msg_bytes.Data::2       105696                      
-system.ruby.delayVCHist.vnet_1::bucket_size            1                       # delay histogram for vnet_1
-system.ruby.delayVCHist.vnet_1::max_bucket            9                       # delay histogram for vnet_1
-system.ruby.delayVCHist.vnet_1::samples          1472                       # delay histogram for vnet_1
-system.ruby.delayVCHist.vnet_1           |        1472    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% # delay histogram for vnet_1
-system.ruby.delayVCHist.vnet_1::total            1472                       # delay histogram for vnet_1
-system.ruby.delayVCHist.vnet_2::bucket_size            1                       # delay histogram for vnet_2
-system.ruby.delayVCHist.vnet_2::max_bucket            9                       # delay histogram for vnet_2
-system.ruby.delayVCHist.vnet_2::samples          1468                       # delay histogram for vnet_2
-system.ruby.delayVCHist.vnet_2           |        1468    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% # delay histogram for vnet_2
-system.ruby.delayVCHist.vnet_2::total            1468                       # delay histogram for vnet_2
-system.ruby.LD.latency_hist_seqr::bucket_size           64                      
-system.ruby.LD.latency_hist_seqr::max_bucket          639                      
-system.ruby.LD.latency_hist_seqr::samples         1135                      
-system.ruby.LD.latency_hist_seqr::mean      35.394714                      
-system.ruby.LD.latency_hist_seqr::gmean     10.319359                      
-system.ruby.LD.latency_hist_seqr::stdev     39.399406                      
-system.ruby.LD.latency_hist_seqr         |         768     67.67%     67.67% |         344     30.31%     97.97% |          15      1.32%     99.30% |           4      0.35%     99.65% |           2      0.18%     99.82% |           2      0.18%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.latency_hist_seqr::total          1135                      
-system.ruby.LD.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.LD.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.LD.hit_latency_hist_seqr::samples          466                      
-system.ruby.LD.hit_latency_hist_seqr::mean            1                      
-system.ruby.LD.hit_latency_hist_seqr::gmean            1                      
-system.ruby.LD.hit_latency_hist_seqr     |           0      0.00%      0.00% |         466    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.hit_latency_hist_seqr::total          466                      
-system.ruby.LD.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.LD.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.LD.miss_latency_hist_seqr::samples          669                      
-system.ruby.LD.miss_latency_hist_seqr::mean    59.352765                      
-system.ruby.LD.miss_latency_hist_seqr::gmean    52.447495                      
-system.ruby.LD.miss_latency_hist_seqr::stdev    35.144031                      
-system.ruby.LD.miss_latency_hist_seqr    |         302     45.14%     45.14% |         344     51.42%     96.56% |          15      2.24%     98.80% |           4      0.60%     99.40% |           2      0.30%     99.70% |           2      0.30%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.miss_latency_hist_seqr::total          669                      
-system.ruby.ST.latency_hist_seqr::bucket_size           32                      
-system.ruby.ST.latency_hist_seqr::max_bucket          319                      
-system.ruby.ST.latency_hist_seqr::samples          901                      
-system.ruby.ST.latency_hist_seqr::mean      13.442841                      
-system.ruby.ST.latency_hist_seqr::gmean      2.518866                      
-system.ruby.ST.latency_hist_seqr::stdev     27.757167                      
-system.ruby.ST.latency_hist_seqr         |         684     75.92%     75.92% |         130     14.43%     90.34% |          81      8.99%     99.33% |           0      0.00%     99.33% |           1      0.11%     99.45% |           3      0.33%     99.78% |           0      0.00%     99.78% |           0      0.00%     99.78% |           1      0.11%     99.89% |           1      0.11%    100.00%
-system.ruby.ST.latency_hist_seqr::total           901                      
-system.ruby.ST.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.ST.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.ST.hit_latency_hist_seqr::samples          684                      
-system.ruby.ST.hit_latency_hist_seqr::mean            1                      
-system.ruby.ST.hit_latency_hist_seqr::gmean            1                      
-system.ruby.ST.hit_latency_hist_seqr     |           0      0.00%      0.00% |         684    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.hit_latency_hist_seqr::total          684                      
-system.ruby.ST.miss_latency_hist_seqr::bucket_size           32                      
-system.ruby.ST.miss_latency_hist_seqr::max_bucket          319                      
-system.ruby.ST.miss_latency_hist_seqr::samples          217                      
-system.ruby.ST.miss_latency_hist_seqr::mean    52.663594                      
-system.ruby.ST.miss_latency_hist_seqr::gmean    46.326875                      
-system.ruby.ST.miss_latency_hist_seqr::stdev    34.272225                      
-system.ruby.ST.miss_latency_hist_seqr    |           0      0.00%      0.00% |         130     59.91%     59.91% |          81     37.33%     97.24% |           0      0.00%     97.24% |           1      0.46%     97.70% |           3      1.38%     99.08% |           0      0.00%     99.08% |           0      0.00%     99.08% |           1      0.46%     99.54% |           1      0.46%    100.00%
-system.ruby.ST.miss_latency_hist_seqr::total          217                      
-system.ruby.IFETCH.latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.latency_hist_seqr::samples         5642                      
-system.ruby.IFETCH.latency_hist_seqr::mean     8.181850                      
-system.ruby.IFETCH.latency_hist_seqr::gmean     1.537199                      
-system.ruby.IFETCH.latency_hist_seqr::stdev    24.735651                      
-system.ruby.IFETCH.latency_hist_seqr     |        5201     92.18%     92.18% |         409      7.25%     99.43% |          21      0.37%     99.81% |           4      0.07%     99.88% |           4      0.07%     99.95% |           3      0.05%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.latency_hist_seqr::total         5642                      
-system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.IFETCH.hit_latency_hist_seqr::samples         5056                      
-system.ruby.IFETCH.hit_latency_hist_seqr::mean            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr::gmean            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr |           0      0.00%      0.00% |        5056    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.hit_latency_hist_seqr::total         5056                      
-system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.miss_latency_hist_seqr::samples          586                      
-system.ruby.IFETCH.miss_latency_hist_seqr::mean    70.146758                      
-system.ruby.IFETCH.miss_latency_hist_seqr::gmean    62.782043                      
-system.ruby.IFETCH.miss_latency_hist_seqr::stdev    40.099052                      
-system.ruby.IFETCH.miss_latency_hist_seqr |         145     24.74%     24.74% |         409     69.80%     94.54% |          21      3.58%     98.12% |           4      0.68%     98.81% |           4      0.68%     99.49% |           3      0.51%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.miss_latency_hist_seqr::total          586                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::samples         1472                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::mean    62.663723                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::gmean    55.319189                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::stdev    37.614530                      
-system.ruby.Directory.miss_mach_latency_hist_seqr |         577     39.20%     39.20% |         834     56.66%     95.86% |          40      2.72%     98.57% |           8      0.54%     99.12% |           8      0.54%     99.66% |           5      0.34%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_mach_latency_hist_seqr::total         1472                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size            8                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket           79                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean           75                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean    75.000000                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           1    100.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total            1                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples          669                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean    59.352765                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean    52.447495                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev    35.144031                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr |         302     45.14%     45.14% |         344     51.42%     96.56% |          15      2.24%     98.80% |           4      0.60%     99.40% |           2      0.30%     99.70% |           2      0.30%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total          669                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size           32                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket          319                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples          217                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean    52.663594                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean    46.326875                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev    34.272225                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr |           0      0.00%      0.00% |         130     59.91%     59.91% |          81     37.33%     97.24% |           0      0.00%     97.24% |           1      0.46%     97.70% |           3      1.38%     99.08% |           0      0.00%     99.08% |           0      0.00%     99.08% |           1      0.46%     99.54% |           1      0.46%    100.00%
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total          217                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples          586                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean    70.146758                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean    62.782043                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev    40.099052                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr |         145     24.74%     24.74% |         409     69.80%     94.54% |          21      3.58%     98.12% |           4      0.68%     98.81% |           4      0.68%     99.49% |           3      0.51%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total          586                      
-system.ruby.Directory_Controller.GETX            1472      0.00%      0.00%
-system.ruby.Directory_Controller.PUTX            1468      0.00%      0.00%
-system.ruby.Directory_Controller.Memory_Data         1472      0.00%      0.00%
-system.ruby.Directory_Controller.Memory_Ack         1468      0.00%      0.00%
-system.ruby.Directory_Controller.I.GETX          1472      0.00%      0.00%
-system.ruby.Directory_Controller.M.PUTX          1468      0.00%      0.00%
-system.ruby.Directory_Controller.IM.Memory_Data         1472      0.00%      0.00%
-system.ruby.Directory_Controller.MI.Memory_Ack         1468      0.00%      0.00%
-system.ruby.L1Cache_Controller.Load              1135      0.00%      0.00%
-system.ruby.L1Cache_Controller.Ifetch            5642      0.00%      0.00%
-system.ruby.L1Cache_Controller.Store              901      0.00%      0.00%
-system.ruby.L1Cache_Controller.Data              1472      0.00%      0.00%
-system.ruby.L1Cache_Controller.Replacement         1468      0.00%      0.00%
-system.ruby.L1Cache_Controller.Writeback_Ack         1468      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Load             669      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Ifetch           586      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Store            217      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Load             466      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Ifetch          5056      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Store            684      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Replacement         1468      0.00%      0.00%
-system.ruby.L1Cache_Controller.MI.Writeback_Ack         1468      0.00%      0.00%
-system.ruby.L1Cache_Controller.IS.Data           1255      0.00%      0.00%
-system.ruby.L1Cache_Controller.IM.Data            217      0.00%      0.00%
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini
deleted file mode 100644 (file)
index 2eeeec5..0000000
+++ /dev/null
@@ -1,368 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-system=system
-tracer=system.cpu.tracer
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-hit_latency=2
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-hit_latency=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-
-[system.cpu.dtb]
-type=MipsTLB
-eventq_index=0
-size=64
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-hit_latency=2
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-hit_latency=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-
-[system.cpu.interrupts]
-type=MipsInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=MipsISA
-eventq_index=0
-num_threads=1
-num_vpes=1
-system=system
-
-[system.cpu.itb]
-type=MipsTLB
-eventq_index=0
-size=64
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-hit_latency=20
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-hit_latency=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=LiveProcess
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/mips/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-max_stack_size=67108864
-output=cout
-pid=100
-ppid=99
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=Null
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/simerr b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/simerr
deleted file mode 100755 (executable)
index aadc3d0..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/simout
deleted file mode 100755 (executable)
index 9b7b607..0000000
+++ /dev/null
@@ -1,15 +0,0 @@
-Redirecting stdout to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing/simout
-Redirecting stderr to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Jul 21 2016 14:23:13
-gem5 started Jul 21 2016 14:23:47
-gem5 executing on e108600-lin, pid 13258
-command line: /work/curdun01/gem5-external.hg/build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/00.hello/mips/linux/simple-timing
-
-Global frequency set at 1000000000000 ticks per second
-info: Entering event queue @ 0.  Starting simulation...
-info: Increasing stack size by one page.
-Hello World!
-Exiting @ tick 33932500 because target called exit()
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt
deleted file mode 100644 (file)
index a6a936b..0000000
+++ /dev/null
@@ -1,518 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000034                       # Number of seconds simulated
-sim_ticks                                    34362500                       # Number of ticks simulated
-final_tick                                   34362500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
-sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 587904                       # Simulator instruction rate (inst/s)
-host_op_rate                                   587165                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             3572983060                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 249352                       # Number of bytes of host memory used
-host_seconds                                     0.01                       # Real time elapsed on the host
-sim_insts                                        5641                       # Number of instructions simulated
-sim_ops                                          5641                       # Number of ops (including micro ops) simulated
-system.voltage_domain.voltage                       1                       # Voltage in Volts
-system.clk_domain.clock                          1000                       # Clock period in ticks
-system.physmem.pwrStateResidencyTicks::UNDEFINED     34362500                       # Cumulative time (in ticks) in various power states
-system.physmem.bytes_read::cpu.inst             18752                       # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.data              8768                       # Number of bytes read from this memory
-system.physmem.bytes_read::total                27520                       # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst        18752                       # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total           18752                       # Number of instructions bytes read from this memory
-system.physmem.num_reads::cpu.inst                293                       # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.data                137                       # Number of read requests responded to by this memory
-system.physmem.num_reads::total                   430                       # Number of read requests responded to by this memory
-system.physmem.bw_read::cpu.inst            545711168                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data            255161877                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total               800873045                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst       545711168                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total          545711168                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst           545711168                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data           255161877                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total              800873045                       # Total bandwidth to/from this memory (bytes/s)
-system.pwrStateResidencyTicks::UNDEFINED     34362500                       # Cumulative time (in ticks) in various power states
-system.cpu_clk_domain.clock                       500                       # Clock period in ticks
-system.cpu.dtb.read_hits                            0                       # DTB read hits
-system.cpu.dtb.read_misses                          0                       # DTB read misses
-system.cpu.dtb.read_accesses                        0                       # DTB read accesses
-system.cpu.dtb.write_hits                           0                       # DTB write hits
-system.cpu.dtb.write_misses                         0                       # DTB write misses
-system.cpu.dtb.write_accesses                       0                       # DTB write accesses
-system.cpu.dtb.hits                                 0                       # DTB hits
-system.cpu.dtb.misses                               0                       # DTB misses
-system.cpu.dtb.accesses                             0                       # DTB accesses
-system.cpu.itb.read_hits                            0                       # DTB read hits
-system.cpu.itb.read_misses                          0                       # DTB read misses
-system.cpu.itb.read_accesses                        0                       # DTB read accesses
-system.cpu.itb.write_hits                           0                       # DTB write hits
-system.cpu.itb.write_misses                         0                       # DTB write misses
-system.cpu.itb.write_accesses                       0                       # DTB write accesses
-system.cpu.itb.hits                                 0                       # DTB hits
-system.cpu.itb.misses                               0                       # DTB misses
-system.cpu.itb.accesses                             0                       # DTB accesses
-system.cpu.workload.numSyscalls                     7                       # Number of system calls
-system.cpu.pwrStateResidencyTicks::ON        34362500                       # Cumulative time (in ticks) in various power states
-system.cpu.numCycles                            68725                       # number of cpu cycles simulated
-system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
-system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
-system.cpu.committedInsts                        5641                       # Number of instructions committed
-system.cpu.committedOps                          5641                       # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses                  4957                       # Number of integer alu accesses
-system.cpu.num_fp_alu_accesses                      2                       # Number of float alu accesses
-system.cpu.num_func_calls                         191                       # number of times a function call or return occured
-system.cpu.num_conditional_control_insts          651                       # number of instructions that are conditional controls
-system.cpu.num_int_insts                         4957                       # number of integer instructions
-system.cpu.num_fp_insts                             2                       # number of float instructions
-system.cpu.num_int_register_reads                7072                       # number of times the integer registers were read
-system.cpu.num_int_register_writes               3291                       # number of times the integer registers were written
-system.cpu.num_fp_register_reads                    3                       # number of times the floating registers were read
-system.cpu.num_fp_register_writes                   1                       # number of times the floating registers were written
-system.cpu.num_mem_refs                          2037                       # number of memory refs
-system.cpu.num_load_insts                        1135                       # Number of load instructions
-system.cpu.num_store_insts                        902                       # Number of store instructions
-system.cpu.num_idle_cycles                          0                       # Number of idle cycles
-system.cpu.num_busy_cycles                      68725                       # Number of busy cycles
-system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
-system.cpu.idle_fraction                            0                       # Percentage of idle cycles
-system.cpu.Branches                               886                       # Number of branches fetched
-system.cpu.op_class::No_OpClass                   641     11.36%     11.36% # Class of executed instruction
-system.cpu.op_class::IntAlu                      2960     52.46%     63.82% # Class of executed instruction
-system.cpu.op_class::IntMult                        2      0.04%     63.86% # Class of executed instruction
-system.cpu.op_class::IntDiv                         0      0.00%     63.86% # Class of executed instruction
-system.cpu.op_class::FloatAdd                       2      0.04%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatCmp                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatCvt                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatMult                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatMultAcc                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatDiv                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatMisc                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::FloatSqrt                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdAdd                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdAddAcc                     0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdAlu                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdCmp                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdCvt                        0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdMisc                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdMult                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdMultAcc                    0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdShift                      0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdSqrt                       0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatMult                  0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     63.90% # Class of executed instruction
-system.cpu.op_class::MemRead                     1135     20.12%     84.01% # Class of executed instruction
-system.cpu.op_class::MemWrite                     902     15.99%    100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemRead                   0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemWrite                  0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
-system.cpu.op_class::total                       5642                       # Class of executed instruction
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     34362500                       # Cumulative time (in ticks) in various power states
-system.cpu.dcache.tags.replacements                 0                       # number of replacements
-system.cpu.dcache.tags.tagsinuse            86.019878                       # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs                1899                       # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs               137                       # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs             13.861314                       # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle                 0                       # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data    86.019878                       # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data     0.021001                       # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total     0.021001                       # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_task_id_blocks::1024          137                       # Occupied blocks per task id
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           22                       # Occupied blocks per task id
-system.cpu.dcache.tags.age_task_id_blocks_1024::1          115                       # Occupied blocks per task id
-system.cpu.dcache.tags.occ_task_id_percent::1024     0.033447                       # Percentage of cache occupancy per task id
-system.cpu.dcache.tags.tag_accesses              4209                       # Number of tag accesses
-system.cpu.dcache.tags.data_accesses             4209                       # Number of data accesses
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     34362500                       # Cumulative time (in ticks) in various power states
-system.cpu.dcache.ReadReq_hits::cpu.data         1048                       # number of ReadReq hits
-system.cpu.dcache.ReadReq_hits::total            1048                       # number of ReadReq hits
-system.cpu.dcache.WriteReq_hits::cpu.data          851                       # number of WriteReq hits
-system.cpu.dcache.WriteReq_hits::total            851                       # number of WriteReq hits
-system.cpu.dcache.demand_hits::cpu.data          1899                       # number of demand (read+write) hits
-system.cpu.dcache.demand_hits::total             1899                       # number of demand (read+write) hits
-system.cpu.dcache.overall_hits::cpu.data         1899                       # number of overall hits
-system.cpu.dcache.overall_hits::total            1899                       # number of overall hits
-system.cpu.dcache.ReadReq_misses::cpu.data           87                       # number of ReadReq misses
-system.cpu.dcache.ReadReq_misses::total            87                       # number of ReadReq misses
-system.cpu.dcache.WriteReq_misses::cpu.data           50                       # number of WriteReq misses
-system.cpu.dcache.WriteReq_misses::total           50                       # number of WriteReq misses
-system.cpu.dcache.demand_misses::cpu.data          137                       # number of demand (read+write) misses
-system.cpu.dcache.demand_misses::total            137                       # number of demand (read+write) misses
-system.cpu.dcache.overall_misses::cpu.data          137                       # number of overall misses
-system.cpu.dcache.overall_misses::total           137                       # number of overall misses
-system.cpu.dcache.ReadReq_miss_latency::cpu.data      5481000                       # number of ReadReq miss cycles
-system.cpu.dcache.ReadReq_miss_latency::total      5481000                       # number of ReadReq miss cycles
-system.cpu.dcache.WriteReq_miss_latency::cpu.data      3150000                       # number of WriteReq miss cycles
-system.cpu.dcache.WriteReq_miss_latency::total      3150000                       # number of WriteReq miss cycles
-system.cpu.dcache.demand_miss_latency::cpu.data      8631000                       # number of demand (read+write) miss cycles
-system.cpu.dcache.demand_miss_latency::total      8631000                       # number of demand (read+write) miss cycles
-system.cpu.dcache.overall_miss_latency::cpu.data      8631000                       # number of overall miss cycles
-system.cpu.dcache.overall_miss_latency::total      8631000                       # number of overall miss cycles
-system.cpu.dcache.ReadReq_accesses::cpu.data         1135                       # number of ReadReq accesses(hits+misses)
-system.cpu.dcache.ReadReq_accesses::total         1135                       # number of ReadReq accesses(hits+misses)
-system.cpu.dcache.WriteReq_accesses::cpu.data          901                       # number of WriteReq accesses(hits+misses)
-system.cpu.dcache.WriteReq_accesses::total          901                       # number of WriteReq accesses(hits+misses)
-system.cpu.dcache.demand_accesses::cpu.data         2036                       # number of demand (read+write) accesses
-system.cpu.dcache.demand_accesses::total         2036                       # number of demand (read+write) accesses
-system.cpu.dcache.overall_accesses::cpu.data         2036                       # number of overall (read+write) accesses
-system.cpu.dcache.overall_accesses::total         2036                       # number of overall (read+write) accesses
-system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.076652                       # miss rate for ReadReq accesses
-system.cpu.dcache.ReadReq_miss_rate::total     0.076652                       # miss rate for ReadReq accesses
-system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.055494                       # miss rate for WriteReq accesses
-system.cpu.dcache.WriteReq_miss_rate::total     0.055494                       # miss rate for WriteReq accesses
-system.cpu.dcache.demand_miss_rate::cpu.data     0.067289                       # miss rate for demand accesses
-system.cpu.dcache.demand_miss_rate::total     0.067289                       # miss rate for demand accesses
-system.cpu.dcache.overall_miss_rate::cpu.data     0.067289                       # miss rate for overall accesses
-system.cpu.dcache.overall_miss_rate::total     0.067289                       # miss rate for overall accesses
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data        63000                       # average ReadReq miss latency
-system.cpu.dcache.ReadReq_avg_miss_latency::total        63000                       # average ReadReq miss latency
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data        63000                       # average WriteReq miss latency
-system.cpu.dcache.WriteReq_avg_miss_latency::total        63000                       # average WriteReq miss latency
-system.cpu.dcache.demand_avg_miss_latency::cpu.data        63000                       # average overall miss latency
-system.cpu.dcache.demand_avg_miss_latency::total        63000                       # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::cpu.data        63000                       # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::total        63000                       # average overall miss latency
-system.cpu.dcache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
-system.cpu.dcache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
-system.cpu.dcache.blocked::no_mshrs                 0                       # number of cycles access was blocked
-system.cpu.dcache.blocked::no_targets               0                       # number of cycles access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
-system.cpu.dcache.ReadReq_mshr_misses::cpu.data           87                       # number of ReadReq MSHR misses
-system.cpu.dcache.ReadReq_mshr_misses::total           87                       # number of ReadReq MSHR misses
-system.cpu.dcache.WriteReq_mshr_misses::cpu.data           50                       # number of WriteReq MSHR misses
-system.cpu.dcache.WriteReq_mshr_misses::total           50                       # number of WriteReq MSHR misses
-system.cpu.dcache.demand_mshr_misses::cpu.data          137                       # number of demand (read+write) MSHR misses
-system.cpu.dcache.demand_mshr_misses::total          137                       # number of demand (read+write) MSHR misses
-system.cpu.dcache.overall_mshr_misses::cpu.data          137                       # number of overall MSHR misses
-system.cpu.dcache.overall_mshr_misses::total          137                       # number of overall MSHR misses
-system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data      5394000                       # number of ReadReq MSHR miss cycles
-system.cpu.dcache.ReadReq_mshr_miss_latency::total      5394000                       # number of ReadReq MSHR miss cycles
-system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data      3100000                       # number of WriteReq MSHR miss cycles
-system.cpu.dcache.WriteReq_mshr_miss_latency::total      3100000                       # number of WriteReq MSHR miss cycles
-system.cpu.dcache.demand_mshr_miss_latency::cpu.data      8494000                       # number of demand (read+write) MSHR miss cycles
-system.cpu.dcache.demand_mshr_miss_latency::total      8494000                       # number of demand (read+write) MSHR miss cycles
-system.cpu.dcache.overall_mshr_miss_latency::cpu.data      8494000                       # number of overall MSHR miss cycles
-system.cpu.dcache.overall_mshr_miss_latency::total      8494000                       # number of overall MSHR miss cycles
-system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.076652                       # mshr miss rate for ReadReq accesses
-system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.076652                       # mshr miss rate for ReadReq accesses
-system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.055494                       # mshr miss rate for WriteReq accesses
-system.cpu.dcache.WriteReq_mshr_miss_rate::total     0.055494                       # mshr miss rate for WriteReq accesses
-system.cpu.dcache.demand_mshr_miss_rate::cpu.data     0.067289                       # mshr miss rate for demand accesses
-system.cpu.dcache.demand_mshr_miss_rate::total     0.067289                       # mshr miss rate for demand accesses
-system.cpu.dcache.overall_mshr_miss_rate::cpu.data     0.067289                       # mshr miss rate for overall accesses
-system.cpu.dcache.overall_mshr_miss_rate::total     0.067289                       # mshr miss rate for overall accesses
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data        62000                       # average ReadReq mshr miss latency
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total        62000                       # average ReadReq mshr miss latency
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data        62000                       # average WriteReq mshr miss latency
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total        62000                       # average WriteReq mshr miss latency
-system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data        62000                       # average overall mshr miss latency
-system.cpu.dcache.demand_avg_mshr_miss_latency::total        62000                       # average overall mshr miss latency
-system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data        62000                       # average overall mshr miss latency
-system.cpu.dcache.overall_avg_mshr_miss_latency::total        62000                       # average overall mshr miss latency
-system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED     34362500                       # Cumulative time (in ticks) in various power states
-system.cpu.icache.tags.replacements                13                       # number of replacements
-system.cpu.icache.tags.tagsinuse           128.944610                       # Cycle average of tags in use
-system.cpu.icache.tags.total_refs                5348                       # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs               295                       # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs             18.128814                       # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle                 0                       # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst   128.944610                       # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst     0.062961                       # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total     0.062961                       # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_task_id_blocks::1024          282                       # Occupied blocks per task id
-system.cpu.icache.tags.age_task_id_blocks_1024::0          105                       # Occupied blocks per task id
-system.cpu.icache.tags.age_task_id_blocks_1024::1          177                       # Occupied blocks per task id
-system.cpu.icache.tags.occ_task_id_percent::1024     0.137695                       # Percentage of cache occupancy per task id
-system.cpu.icache.tags.tag_accesses             11581                       # Number of tag accesses
-system.cpu.icache.tags.data_accesses            11581                       # Number of data accesses
-system.cpu.icache.pwrStateResidencyTicks::UNDEFINED     34362500                       # Cumulative time (in ticks) in various power states
-system.cpu.icache.ReadReq_hits::cpu.inst         5348                       # number of ReadReq hits
-system.cpu.icache.ReadReq_hits::total            5348                       # number of ReadReq hits
-system.cpu.icache.demand_hits::cpu.inst          5348                       # number of demand (read+write) hits
-system.cpu.icache.demand_hits::total             5348                       # number of demand (read+write) hits
-system.cpu.icache.overall_hits::cpu.inst         5348                       # number of overall hits
-system.cpu.icache.overall_hits::total            5348                       # number of overall hits
-system.cpu.icache.ReadReq_misses::cpu.inst          295                       # number of ReadReq misses
-system.cpu.icache.ReadReq_misses::total           295                       # number of ReadReq misses
-system.cpu.icache.demand_misses::cpu.inst          295                       # number of demand (read+write) misses
-system.cpu.icache.demand_misses::total            295                       # number of demand (read+write) misses
-system.cpu.icache.overall_misses::cpu.inst          295                       # number of overall misses
-system.cpu.icache.overall_misses::total           295                       # number of overall misses
-system.cpu.icache.ReadReq_miss_latency::cpu.inst     18485500                       # number of ReadReq miss cycles
-system.cpu.icache.ReadReq_miss_latency::total     18485500                       # number of ReadReq miss cycles
-system.cpu.icache.demand_miss_latency::cpu.inst     18485500                       # number of demand (read+write) miss cycles
-system.cpu.icache.demand_miss_latency::total     18485500                       # number of demand (read+write) miss cycles
-system.cpu.icache.overall_miss_latency::cpu.inst     18485500                       # number of overall miss cycles
-system.cpu.icache.overall_miss_latency::total     18485500                       # number of overall miss cycles
-system.cpu.icache.ReadReq_accesses::cpu.inst         5643                       # number of ReadReq accesses(hits+misses)
-system.cpu.icache.ReadReq_accesses::total         5643                       # number of ReadReq accesses(hits+misses)
-system.cpu.icache.demand_accesses::cpu.inst         5643                       # number of demand (read+write) accesses
-system.cpu.icache.demand_accesses::total         5643                       # number of demand (read+write) accesses
-system.cpu.icache.overall_accesses::cpu.inst         5643                       # number of overall (read+write) accesses
-system.cpu.icache.overall_accesses::total         5643                       # number of overall (read+write) accesses
-system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.052277                       # miss rate for ReadReq accesses
-system.cpu.icache.ReadReq_miss_rate::total     0.052277                       # miss rate for ReadReq accesses
-system.cpu.icache.demand_miss_rate::cpu.inst     0.052277                       # miss rate for demand accesses
-system.cpu.icache.demand_miss_rate::total     0.052277                       # miss rate for demand accesses
-system.cpu.icache.overall_miss_rate::cpu.inst     0.052277                       # miss rate for overall accesses
-system.cpu.icache.overall_miss_rate::total     0.052277                       # miss rate for overall accesses
-system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 62662.711864                       # average ReadReq miss latency
-system.cpu.icache.ReadReq_avg_miss_latency::total 62662.711864                       # average ReadReq miss latency
-system.cpu.icache.demand_avg_miss_latency::cpu.inst 62662.711864                       # average overall miss latency
-system.cpu.icache.demand_avg_miss_latency::total 62662.711864                       # average overall miss latency
-system.cpu.icache.overall_avg_miss_latency::cpu.inst 62662.711864                       # average overall miss latency
-system.cpu.icache.overall_avg_miss_latency::total 62662.711864                       # average overall miss latency
-system.cpu.icache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
-system.cpu.icache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
-system.cpu.icache.blocked::no_mshrs                 0                       # number of cycles access was blocked
-system.cpu.icache.blocked::no_targets               0                       # number of cycles access was blocked
-system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
-system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
-system.cpu.icache.writebacks::writebacks           13                       # number of writebacks
-system.cpu.icache.writebacks::total                13                       # number of writebacks
-system.cpu.icache.ReadReq_mshr_misses::cpu.inst          295                       # number of ReadReq MSHR misses
-system.cpu.icache.ReadReq_mshr_misses::total          295                       # number of ReadReq MSHR misses
-system.cpu.icache.demand_mshr_misses::cpu.inst          295                       # number of demand (read+write) MSHR misses
-system.cpu.icache.demand_mshr_misses::total          295                       # number of demand (read+write) MSHR misses
-system.cpu.icache.overall_mshr_misses::cpu.inst          295                       # number of overall MSHR misses
-system.cpu.icache.overall_mshr_misses::total          295                       # number of overall MSHR misses
-system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst     18190500                       # number of ReadReq MSHR miss cycles
-system.cpu.icache.ReadReq_mshr_miss_latency::total     18190500                       # number of ReadReq MSHR miss cycles
-system.cpu.icache.demand_mshr_miss_latency::cpu.inst     18190500                       # number of demand (read+write) MSHR miss cycles
-system.cpu.icache.demand_mshr_miss_latency::total     18190500                       # number of demand (read+write) MSHR miss cycles
-system.cpu.icache.overall_mshr_miss_latency::cpu.inst     18190500                       # number of overall MSHR miss cycles
-system.cpu.icache.overall_mshr_miss_latency::total     18190500                       # number of overall MSHR miss cycles
-system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst     0.052277                       # mshr miss rate for ReadReq accesses
-system.cpu.icache.ReadReq_mshr_miss_rate::total     0.052277                       # mshr miss rate for ReadReq accesses
-system.cpu.icache.demand_mshr_miss_rate::cpu.inst     0.052277                       # mshr miss rate for demand accesses
-system.cpu.icache.demand_mshr_miss_rate::total     0.052277                       # mshr miss rate for demand accesses
-system.cpu.icache.overall_mshr_miss_rate::cpu.inst     0.052277                       # mshr miss rate for overall accesses
-system.cpu.icache.overall_mshr_miss_rate::total     0.052277                       # mshr miss rate for overall accesses
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 61662.711864                       # average ReadReq mshr miss latency
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 61662.711864                       # average ReadReq mshr miss latency
-system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 61662.711864                       # average overall mshr miss latency
-system.cpu.icache.demand_avg_mshr_miss_latency::total 61662.711864                       # average overall mshr miss latency
-system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 61662.711864                       # average overall mshr miss latency
-system.cpu.icache.overall_avg_mshr_miss_latency::total 61662.711864                       # average overall mshr miss latency
-system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED     34362500                       # Cumulative time (in ticks) in various power states
-system.cpu.l2cache.tags.replacements                0                       # number of replacements
-system.cpu.l2cache.tags.tagsinuse          216.139082                       # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs                 15                       # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs              430                       # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs             0.034884                       # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle                0                       # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::cpu.inst   130.077342                       # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data    86.061740                       # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_percent::cpu.inst     0.003970                       # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::cpu.data     0.002626                       # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total     0.006596                       # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_task_id_blocks::1024          430                       # Occupied blocks per task id
-system.cpu.l2cache.tags.age_task_id_blocks_1024::0          130                       # Occupied blocks per task id
-system.cpu.l2cache.tags.age_task_id_blocks_1024::1          300                       # Occupied blocks per task id
-system.cpu.l2cache.tags.occ_task_id_percent::1024     0.013123                       # Percentage of cache occupancy per task id
-system.cpu.l2cache.tags.tag_accesses             3990                       # Number of tag accesses
-system.cpu.l2cache.tags.data_accesses            3990                       # Number of data accesses
-system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED     34362500                       # Cumulative time (in ticks) in various power states
-system.cpu.l2cache.WritebackClean_hits::writebacks           13                       # number of WritebackClean hits
-system.cpu.l2cache.WritebackClean_hits::total           13                       # number of WritebackClean hits
-system.cpu.l2cache.ReadCleanReq_hits::cpu.inst            2                       # number of ReadCleanReq hits
-system.cpu.l2cache.ReadCleanReq_hits::total            2                       # number of ReadCleanReq hits
-system.cpu.l2cache.demand_hits::cpu.inst            2                       # number of demand (read+write) hits
-system.cpu.l2cache.demand_hits::total               2                       # number of demand (read+write) hits
-system.cpu.l2cache.overall_hits::cpu.inst            2                       # number of overall hits
-system.cpu.l2cache.overall_hits::total              2                       # number of overall hits
-system.cpu.l2cache.ReadExReq_misses::cpu.data           50                       # number of ReadExReq misses
-system.cpu.l2cache.ReadExReq_misses::total           50                       # number of ReadExReq misses
-system.cpu.l2cache.ReadCleanReq_misses::cpu.inst          293                       # number of ReadCleanReq misses
-system.cpu.l2cache.ReadCleanReq_misses::total          293                       # number of ReadCleanReq misses
-system.cpu.l2cache.ReadSharedReq_misses::cpu.data           87                       # number of ReadSharedReq misses
-system.cpu.l2cache.ReadSharedReq_misses::total           87                       # number of ReadSharedReq misses
-system.cpu.l2cache.demand_misses::cpu.inst          293                       # number of demand (read+write) misses
-system.cpu.l2cache.demand_misses::cpu.data          137                       # number of demand (read+write) misses
-system.cpu.l2cache.demand_misses::total           430                       # number of demand (read+write) misses
-system.cpu.l2cache.overall_misses::cpu.inst          293                       # number of overall misses
-system.cpu.l2cache.overall_misses::cpu.data          137                       # number of overall misses
-system.cpu.l2cache.overall_misses::total          430                       # number of overall misses
-system.cpu.l2cache.ReadExReq_miss_latency::cpu.data      3025000                       # number of ReadExReq miss cycles
-system.cpu.l2cache.ReadExReq_miss_latency::total      3025000                       # number of ReadExReq miss cycles
-system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst     17727000                       # number of ReadCleanReq miss cycles
-system.cpu.l2cache.ReadCleanReq_miss_latency::total     17727000                       # number of ReadCleanReq miss cycles
-system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data      5263500                       # number of ReadSharedReq miss cycles
-system.cpu.l2cache.ReadSharedReq_miss_latency::total      5263500                       # number of ReadSharedReq miss cycles
-system.cpu.l2cache.demand_miss_latency::cpu.inst     17727000                       # number of demand (read+write) miss cycles
-system.cpu.l2cache.demand_miss_latency::cpu.data      8288500                       # number of demand (read+write) miss cycles
-system.cpu.l2cache.demand_miss_latency::total     26015500                       # number of demand (read+write) miss cycles
-system.cpu.l2cache.overall_miss_latency::cpu.inst     17727000                       # number of overall miss cycles
-system.cpu.l2cache.overall_miss_latency::cpu.data      8288500                       # number of overall miss cycles
-system.cpu.l2cache.overall_miss_latency::total     26015500                       # number of overall miss cycles
-system.cpu.l2cache.WritebackClean_accesses::writebacks           13                       # number of WritebackClean accesses(hits+misses)
-system.cpu.l2cache.WritebackClean_accesses::total           13                       # number of WritebackClean accesses(hits+misses)
-system.cpu.l2cache.ReadExReq_accesses::cpu.data           50                       # number of ReadExReq accesses(hits+misses)
-system.cpu.l2cache.ReadExReq_accesses::total           50                       # number of ReadExReq accesses(hits+misses)
-system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst          295                       # number of ReadCleanReq accesses(hits+misses)
-system.cpu.l2cache.ReadCleanReq_accesses::total          295                       # number of ReadCleanReq accesses(hits+misses)
-system.cpu.l2cache.ReadSharedReq_accesses::cpu.data           87                       # number of ReadSharedReq accesses(hits+misses)
-system.cpu.l2cache.ReadSharedReq_accesses::total           87                       # number of ReadSharedReq accesses(hits+misses)
-system.cpu.l2cache.demand_accesses::cpu.inst          295                       # number of demand (read+write) accesses
-system.cpu.l2cache.demand_accesses::cpu.data          137                       # number of demand (read+write) accesses
-system.cpu.l2cache.demand_accesses::total          432                       # number of demand (read+write) accesses
-system.cpu.l2cache.overall_accesses::cpu.inst          295                       # number of overall (read+write) accesses
-system.cpu.l2cache.overall_accesses::cpu.data          137                       # number of overall (read+write) accesses
-system.cpu.l2cache.overall_accesses::total          432                       # number of overall (read+write) accesses
-system.cpu.l2cache.ReadExReq_miss_rate::cpu.data            1                       # miss rate for ReadExReq accesses
-system.cpu.l2cache.ReadExReq_miss_rate::total            1                       # miss rate for ReadExReq accesses
-system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.993220                       # miss rate for ReadCleanReq accesses
-system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.993220                       # miss rate for ReadCleanReq accesses
-system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data            1                       # miss rate for ReadSharedReq accesses
-system.cpu.l2cache.ReadSharedReq_miss_rate::total            1                       # miss rate for ReadSharedReq accesses
-system.cpu.l2cache.demand_miss_rate::cpu.inst     0.993220                       # miss rate for demand accesses
-system.cpu.l2cache.demand_miss_rate::cpu.data            1                       # miss rate for demand accesses
-system.cpu.l2cache.demand_miss_rate::total     0.995370                       # miss rate for demand accesses
-system.cpu.l2cache.overall_miss_rate::cpu.inst     0.993220                       # miss rate for overall accesses
-system.cpu.l2cache.overall_miss_rate::cpu.data            1                       # miss rate for overall accesses
-system.cpu.l2cache.overall_miss_rate::total     0.995370                       # miss rate for overall accesses
-system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data        60500                       # average ReadExReq miss latency
-system.cpu.l2cache.ReadExReq_avg_miss_latency::total        60500                       # average ReadExReq miss latency
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 60501.706485                       # average ReadCleanReq miss latency
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 60501.706485                       # average ReadCleanReq miss latency
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data        60500                       # average ReadSharedReq miss latency
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total        60500                       # average ReadSharedReq miss latency
-system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 60501.706485                       # average overall miss latency
-system.cpu.l2cache.demand_avg_miss_latency::cpu.data        60500                       # average overall miss latency
-system.cpu.l2cache.demand_avg_miss_latency::total 60501.162791                       # average overall miss latency
-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 60501.706485                       # average overall miss latency
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data        60500                       # average overall miss latency
-system.cpu.l2cache.overall_avg_miss_latency::total 60501.162791                       # average overall miss latency
-system.cpu.l2cache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
-system.cpu.l2cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
-system.cpu.l2cache.blocked::no_mshrs                0                       # number of cycles access was blocked
-system.cpu.l2cache.blocked::no_targets              0                       # number of cycles access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
-system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data           50                       # number of ReadExReq MSHR misses
-system.cpu.l2cache.ReadExReq_mshr_misses::total           50                       # number of ReadExReq MSHR misses
-system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst          293                       # number of ReadCleanReq MSHR misses
-system.cpu.l2cache.ReadCleanReq_mshr_misses::total          293                       # number of ReadCleanReq MSHR misses
-system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data           87                       # number of ReadSharedReq MSHR misses
-system.cpu.l2cache.ReadSharedReq_mshr_misses::total           87                       # number of ReadSharedReq MSHR misses
-system.cpu.l2cache.demand_mshr_misses::cpu.inst          293                       # number of demand (read+write) MSHR misses
-system.cpu.l2cache.demand_mshr_misses::cpu.data          137                       # number of demand (read+write) MSHR misses
-system.cpu.l2cache.demand_mshr_misses::total          430                       # number of demand (read+write) MSHR misses
-system.cpu.l2cache.overall_mshr_misses::cpu.inst          293                       # number of overall MSHR misses
-system.cpu.l2cache.overall_mshr_misses::cpu.data          137                       # number of overall MSHR misses
-system.cpu.l2cache.overall_mshr_misses::total          430                       # number of overall MSHR misses
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data      2525000                       # number of ReadExReq MSHR miss cycles
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total      2525000                       # number of ReadExReq MSHR miss cycles
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst     14797000                       # number of ReadCleanReq MSHR miss cycles
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total     14797000                       # number of ReadCleanReq MSHR miss cycles
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data      4393500                       # number of ReadSharedReq MSHR miss cycles
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      4393500                       # number of ReadSharedReq MSHR miss cycles
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     14797000                       # number of demand (read+write) MSHR miss cycles
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data      6918500                       # number of demand (read+write) MSHR miss cycles
-system.cpu.l2cache.demand_mshr_miss_latency::total     21715500                       # number of demand (read+write) MSHR miss cycles
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     14797000                       # number of overall MSHR miss cycles
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data      6918500                       # number of overall MSHR miss cycles
-system.cpu.l2cache.overall_mshr_miss_latency::total     21715500                       # number of overall MSHR miss cycles
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                       # mshr miss rate for ReadExReq accesses
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                       # mshr miss rate for ReadExReq accesses
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.993220                       # mshr miss rate for ReadCleanReq accesses
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.993220                       # mshr miss rate for ReadCleanReq accesses
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data            1                       # mshr miss rate for ReadSharedReq accesses
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total            1                       # mshr miss rate for ReadSharedReq accesses
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.993220                       # mshr miss rate for demand accesses
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data            1                       # mshr miss rate for demand accesses
-system.cpu.l2cache.demand_mshr_miss_rate::total     0.995370                       # mshr miss rate for demand accesses
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.993220                       # mshr miss rate for overall accesses
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data            1                       # mshr miss rate for overall accesses
-system.cpu.l2cache.overall_mshr_miss_rate::total     0.995370                       # mshr miss rate for overall accesses
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data        50500                       # average ReadExReq mshr miss latency
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total        50500                       # average ReadExReq mshr miss latency
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50501.706485                       # average ReadCleanReq mshr miss latency
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50501.706485                       # average ReadCleanReq mshr miss latency
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data        50500                       # average ReadSharedReq mshr miss latency
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total        50500                       # average ReadSharedReq mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50501.706485                       # average overall mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data        50500                       # average overall mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50501.162791                       # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50501.706485                       # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data        50500                       # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50501.162791                       # average overall mshr miss latency
-system.cpu.toL2Bus.snoop_filter.tot_requests          445                       # Total number of requests made to the snoop filter.
-system.cpu.toL2Bus.snoop_filter.hit_single_requests           13                       # Number of requests hitting in the snoop filter with a single holder of the requested data.
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0                       # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                       # Total number of snoops made to the snoop filter.
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     34362500                       # Cumulative time (in ticks) in various power states
-system.cpu.toL2Bus.trans_dist::ReadResp           382                       # Transaction distribution
-system.cpu.toL2Bus.trans_dist::WritebackClean           13                       # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadExReq           50                       # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadExResp           50                       # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          295                       # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadSharedReq           87                       # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          603                       # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          274                       # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count::total               877                       # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        19712                       # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         8768                       # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size::total              28480                       # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.snoops                           0                       # Total snoops (count)
-system.cpu.toL2Bus.snoopTraffic                     0                       # Total snoop traffic (bytes)
-system.cpu.toL2Bus.snoop_fanout::samples          432                       # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::mean               0                       # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::stdev              0                       # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::0                432    100.00%    100.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::1                  0      0.00%    100.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::min_value            0                       # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::max_value            0                       # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::total            432                       # Request fanout histogram
-system.cpu.toL2Bus.reqLayer0.occupancy         235500                       # Layer occupancy (ticks)
-system.cpu.toL2Bus.reqLayer0.utilization          0.7                       # Layer utilization (%)
-system.cpu.toL2Bus.respLayer0.occupancy        442500                       # Layer occupancy (ticks)
-system.cpu.toL2Bus.respLayer0.utilization          1.3                       # Layer utilization (%)
-system.cpu.toL2Bus.respLayer1.occupancy        205500                       # Layer occupancy (ticks)
-system.cpu.toL2Bus.respLayer1.utilization          0.6                       # Layer utilization (%)
-system.membus.snoop_filter.tot_requests           430                       # Total number of requests made to the snoop filter.
-system.membus.snoop_filter.hit_single_requests            0                       # Number of requests hitting in the snoop filter with a single holder of the requested data.
-system.membus.snoop_filter.hit_multi_requests            0                       # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.membus.snoop_filter.tot_snoops               0                       # Total number of snoops made to the snoop filter.
-system.membus.snoop_filter.hit_single_snoops            0                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
-system.membus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.membus.pwrStateResidencyTicks::UNDEFINED     34362500                       # Cumulative time (in ticks) in various power states
-system.membus.trans_dist::ReadResp                380                       # Transaction distribution
-system.membus.trans_dist::ReadExReq                50                       # Transaction distribution
-system.membus.trans_dist::ReadExResp               50                       # Transaction distribution
-system.membus.trans_dist::ReadSharedReq           380                       # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          860                       # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total                    860                       # Packet count per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        27520                       # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total                   27520                       # Cumulative packet size per connected master and slave (bytes)
-system.membus.snoops                                0                       # Total snoops (count)
-system.membus.snoopTraffic                          0                       # Total snoop traffic (bytes)
-system.membus.snoop_fanout::samples               430                       # Request fanout histogram
-system.membus.snoop_fanout::mean                    0                       # Request fanout histogram
-system.membus.snoop_fanout::stdev                   0                       # Request fanout histogram
-system.membus.snoop_fanout::underflows              0      0.00%      0.00% # Request fanout histogram
-system.membus.snoop_fanout::0                     430    100.00%    100.00% # Request fanout histogram
-system.membus.snoop_fanout::1                       0      0.00%    100.00% # Request fanout histogram
-system.membus.snoop_fanout::overflows               0      0.00%    100.00% # Request fanout histogram
-system.membus.snoop_fanout::min_value               0                       # Request fanout histogram
-system.membus.snoop_fanout::max_value               0                       # Request fanout histogram
-system.membus.snoop_fanout::total                 430                       # Request fanout histogram
-system.membus.reqLayer0.occupancy              430500                       # Layer occupancy (ticks)
-system.membus.reqLayer0.utilization               1.3                       # Layer utilization (%)
-system.membus.respLayer1.occupancy            2150000                       # Layer occupancy (ticks)
-system.membus.respLayer1.utilization              6.3                       # Layer utilization (%)
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini
deleted file mode 100644 (file)
index c234169..0000000
+++ /dev/null
@@ -1,875 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=DerivO3CPU
-children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload
-LFSTSize=1024
-LQEntries=32
-LSQCheckLoads=true
-LSQDepCheckShift=4
-SQEntries=32
-SSITSize=1024
-UnifiedTLB=true
-activity=0
-backComSize=5
-branchPred=system.cpu.branchPred
-cacheStorePorts=200
-checker=Null
-clk_domain=system.cpu_clk_domain
-commitToDecodeDelay=1
-commitToFetchDelay=1
-commitToIEWDelay=1
-commitToRenameDelay=1
-commitWidth=8
-cpu_id=0
-decodeToFetchDelay=1
-decodeToRenameDelay=1
-decodeWidth=8
-default_p_state=UNDEFINED
-dispatchWidth=8
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fetchBufferSize=64
-fetchQueueSize=32
-fetchToDecodeDelay=1
-fetchTrapLatency=1
-fetchWidth=8
-forwardComSize=5
-fuPool=system.cpu.fuPool
-function_trace=false
-function_trace_start=0
-iewToCommitDelay=1
-iewToDecodeDelay=1
-iewToFetchDelay=1
-iewToRenameDelay=1
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-issueToExecuteDelay=1
-issueWidth=8
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-needsTSO=false
-numIQEntries=64
-numPhysCCRegs=0
-numPhysFloatRegs=256
-numPhysIntRegs=256
-numROBEntries=192
-numRobs=1
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-renameToDecodeDelay=1
-renameToFetchDelay=1
-renameToIEWDelay=2
-renameToROBDelay=1
-renameWidth=8
-simpoint_start_insts=
-smtCommitPolicy=RoundRobin
-smtFetchPolicy=SingleThread
-smtIQPolicy=Partitioned
-smtIQThreshold=100
-smtLSQPolicy=Partitioned
-smtLSQThreshold=100
-smtNumFetchingThreads=1
-smtROBPolicy=Partitioned
-smtROBThreshold=100
-socket_id=0
-squashWidth=8
-store_set_clear_period=250000
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-trapLatency=13
-wbWidth=8
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=PowerTLB
-eventq_index=0
-size=64
-
-[system.cpu.fuPool]
-type=FUPool
-children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
-FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
-eventq_index=0
-
-[system.cpu.fuPool.FUList0]
-type=FUDesc
-children=opList
-count=6
-eventq_index=0
-opList=system.cpu.fuPool.FUList0.opList
-
-[system.cpu.fuPool.FUList0.opList]
-type=OpDesc
-eventq_index=0
-opClass=IntAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList1]
-type=FUDesc
-children=opList0 opList1
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
-
-[system.cpu.fuPool.FUList1.opList0]
-type=OpDesc
-eventq_index=0
-opClass=IntMult
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList1.opList1]
-type=OpDesc
-eventq_index=0
-opClass=IntDiv
-opLat=20
-pipelined=false
-
-[system.cpu.fuPool.FUList2]
-type=FUDesc
-children=opList0 opList1 opList2
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
-
-[system.cpu.fuPool.FUList2.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatAdd
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatCmp
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatCvt
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList3]
-type=FUDesc
-children=opList0 opList1 opList2 opList3 opList4
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 system.cpu.fuPool.FUList3.opList3 system.cpu.fuPool.FUList3.opList4
-
-[system.cpu.fuPool.FUList3.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatMult
-opLat=4
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMultAcc
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMisc
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatDiv
-opLat=12
-pipelined=false
-
-[system.cpu.fuPool.FUList3.opList4]
-type=OpDesc
-eventq_index=0
-opClass=FloatSqrt
-opLat=24
-pipelined=false
-
-[system.cpu.fuPool.FUList4]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList4.opList0 system.cpu.fuPool.FUList4.opList1
-
-[system.cpu.fuPool.FUList4.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5]
-type=FUDesc
-children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
-
-[system.cpu.fuPool.FUList5.opList00]
-type=OpDesc
-eventq_index=0
-opClass=SimdAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList01]
-type=OpDesc
-eventq_index=0
-opClass=SimdAddAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList02]
-type=OpDesc
-eventq_index=0
-opClass=SimdAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList03]
-type=OpDesc
-eventq_index=0
-opClass=SimdCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList04]
-type=OpDesc
-eventq_index=0
-opClass=SimdCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList05]
-type=OpDesc
-eventq_index=0
-opClass=SimdMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList06]
-type=OpDesc
-eventq_index=0
-opClass=SimdMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList07]
-type=OpDesc
-eventq_index=0
-opClass=SimdMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList08]
-type=OpDesc
-eventq_index=0
-opClass=SimdShift
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList09]
-type=OpDesc
-eventq_index=0
-opClass=SimdShiftAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList10]
-type=OpDesc
-eventq_index=0
-opClass=SimdSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList11]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList12]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList13]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList14]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList15]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatDiv
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList16]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList17]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList18]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList19]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1
-
-[system.cpu.fuPool.FUList6.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7]
-type=FUDesc
-children=opList0 opList1 opList2 opList3
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 system.cpu.fuPool.FUList7.opList2 system.cpu.fuPool.FUList7.opList3
-
-[system.cpu.fuPool.FUList7.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList1]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList8]
-type=FUDesc
-children=opList
-count=1
-eventq_index=0
-opList=system.cpu.fuPool.FUList8.opList
-
-[system.cpu.fuPool.FUList8.opList]
-type=OpDesc
-eventq_index=0
-opClass=IprAccess
-opLat=3
-pipelined=false
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=PowerInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=PowerISA
-eventq_index=0
-
-[system.cpu.itb]
-type=PowerTLB
-eventq_index=0
-size=64
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/power/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-page_policy=open_adaptive
-power_model=Null
-range=0:134217727:0:0:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10000
-static_frontend_latency=10000
-tBURST=5000
-tCCD_L=0
-tCK=1250
-tCL=13750
-tCS=2500
-tRAS=35000
-tRCD=13750
-tREFI=7800000
-tRFC=260000
-tRP=13750
-tRRD=6000
-tRRD_L=0
-tRTP=7500
-tRTW=2500
-tWR=15000
-tWTR=7500
-tXAW=30000
-tXP=6000
-tXPDLL=0
-tXS=270000
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/simerr b/tests/quick/se/00.hello/ref/power/linux/o3-timing/simerr
deleted file mode 100755 (executable)
index 707fed9..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/power/linux/o3-timing/simout
deleted file mode 100755 (executable)
index a796e39..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing/simout
-Redirecting stderr to build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 19:22:30
-gem5 started Apr  3 2017 19:22:48
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 103796
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/POWER/gem5.opt -d build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/power/linux/o3-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 21189000 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt
deleted file mode 100644 (file)
index 189de9f..0000000
+++ /dev/null
@@ -1,1012 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000021                      
-sim_ticks                                    21189000                      
-final_tick                                   21189000                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                  70012                      
-host_op_rate                                    69995                      
-host_tick_rate                              256014000                      
-host_mem_usage                                 260844                      
-host_seconds                                     0.08                      
-sim_insts                                        5792                      
-sim_ops                                          5792                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED     21189000                      
-system.physmem.bytes_read::cpu.inst             21824                      
-system.physmem.bytes_read::cpu.data              6528                      
-system.physmem.bytes_read::total                28352                      
-system.physmem.bytes_inst_read::cpu.inst        21824                      
-system.physmem.bytes_inst_read::total           21824                      
-system.physmem.num_reads::cpu.inst                341                      
-system.physmem.num_reads::cpu.data                102                      
-system.physmem.num_reads::total                   443                      
-system.physmem.bw_read::cpu.inst           1029968380                      
-system.physmem.bw_read::cpu.data            308084383                      
-system.physmem.bw_read::total              1338052763                      
-system.physmem.bw_inst_read::cpu.inst      1029968380                      
-system.physmem.bw_inst_read::total         1029968380                      
-system.physmem.bw_total::cpu.inst          1029968380                      
-system.physmem.bw_total::cpu.data           308084383                      
-system.physmem.bw_total::total             1338052763                      
-system.physmem.readReqs                           444                      
-system.physmem.writeReqs                            0                      
-system.physmem.readBursts                         444                      
-system.physmem.writeBursts                          0                      
-system.physmem.bytesReadDRAM                    28416                      
-system.physmem.bytesReadWrQ                         0                      
-system.physmem.bytesWritten                         0                      
-system.physmem.bytesReadSys                     28416                      
-system.physmem.bytesWrittenSys                      0                      
-system.physmem.servicedByWrQ                        0                      
-system.physmem.mergedWrBursts                       0                      
-system.physmem.neitherReadNorWriteReqs              0                      
-system.physmem.perBankRdBursts::0                  71                      
-system.physmem.perBankRdBursts::1                  42                      
-system.physmem.perBankRdBursts::2                  55                      
-system.physmem.perBankRdBursts::3                  58                      
-system.physmem.perBankRdBursts::4                  53                      
-system.physmem.perBankRdBursts::5                  61                      
-system.physmem.perBankRdBursts::6                  52                      
-system.physmem.perBankRdBursts::7                  10                      
-system.physmem.perBankRdBursts::8                   9                      
-system.physmem.perBankRdBursts::9                  28                      
-system.physmem.perBankRdBursts::10                  1                      
-system.physmem.perBankRdBursts::11                  0                      
-system.physmem.perBankRdBursts::12                  0                      
-system.physmem.perBankRdBursts::13                  0                      
-system.physmem.perBankRdBursts::14                  4                      
-system.physmem.perBankRdBursts::15                  0                      
-system.physmem.perBankWrBursts::0                   0                      
-system.physmem.perBankWrBursts::1                   0                      
-system.physmem.perBankWrBursts::2                   0                      
-system.physmem.perBankWrBursts::3                   0                      
-system.physmem.perBankWrBursts::4                   0                      
-system.physmem.perBankWrBursts::5                   0                      
-system.physmem.perBankWrBursts::6                   0                      
-system.physmem.perBankWrBursts::7                   0                      
-system.physmem.perBankWrBursts::8                   0                      
-system.physmem.perBankWrBursts::9                   0                      
-system.physmem.perBankWrBursts::10                  0                      
-system.physmem.perBankWrBursts::11                  0                      
-system.physmem.perBankWrBursts::12                  0                      
-system.physmem.perBankWrBursts::13                  0                      
-system.physmem.perBankWrBursts::14                  0                      
-system.physmem.perBankWrBursts::15                  0                      
-system.physmem.numRdRetry                           0                      
-system.physmem.numWrRetry                           0                      
-system.physmem.totGap                        21128500                      
-system.physmem.readPktSize::0                       0                      
-system.physmem.readPktSize::1                       0                      
-system.physmem.readPktSize::2                       0                      
-system.physmem.readPktSize::3                       0                      
-system.physmem.readPktSize::4                       0                      
-system.physmem.readPktSize::5                       0                      
-system.physmem.readPktSize::6                     444                      
-system.physmem.writePktSize::0                      0                      
-system.physmem.writePktSize::1                      0                      
-system.physmem.writePktSize::2                      0                      
-system.physmem.writePktSize::3                      0                      
-system.physmem.writePktSize::4                      0                      
-system.physmem.writePktSize::5                      0                      
-system.physmem.writePktSize::6                      0                      
-system.physmem.rdQLenPdf::0                       235                      
-system.physmem.rdQLenPdf::1                       144                      
-system.physmem.rdQLenPdf::2                        45                      
-system.physmem.rdQLenPdf::3                        14                      
-system.physmem.rdQLenPdf::4                         5                      
-system.physmem.rdQLenPdf::5                         1                      
-system.physmem.rdQLenPdf::6                         0                      
-system.physmem.rdQLenPdf::7                         0                      
-system.physmem.rdQLenPdf::8                         0                      
-system.physmem.rdQLenPdf::9                         0                      
-system.physmem.rdQLenPdf::10                        0                      
-system.physmem.rdQLenPdf::11                        0                      
-system.physmem.rdQLenPdf::12                        0                      
-system.physmem.rdQLenPdf::13                        0                      
-system.physmem.rdQLenPdf::14                        0                      
-system.physmem.rdQLenPdf::15                        0                      
-system.physmem.rdQLenPdf::16                        0                      
-system.physmem.rdQLenPdf::17                        0                      
-system.physmem.rdQLenPdf::18                        0                      
-system.physmem.rdQLenPdf::19                        0                      
-system.physmem.rdQLenPdf::20                        0                      
-system.physmem.rdQLenPdf::21                        0                      
-system.physmem.rdQLenPdf::22                        0                      
-system.physmem.rdQLenPdf::23                        0                      
-system.physmem.rdQLenPdf::24                        0                      
-system.physmem.rdQLenPdf::25                        0                      
-system.physmem.rdQLenPdf::26                        0                      
-system.physmem.rdQLenPdf::27                        0                      
-system.physmem.rdQLenPdf::28                        0                      
-system.physmem.rdQLenPdf::29                        0                      
-system.physmem.rdQLenPdf::30                        0                      
-system.physmem.rdQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::0                         0                      
-system.physmem.wrQLenPdf::1                         0                      
-system.physmem.wrQLenPdf::2                         0                      
-system.physmem.wrQLenPdf::3                         0                      
-system.physmem.wrQLenPdf::4                         0                      
-system.physmem.wrQLenPdf::5                         0                      
-system.physmem.wrQLenPdf::6                         0                      
-system.physmem.wrQLenPdf::7                         0                      
-system.physmem.wrQLenPdf::8                         0                      
-system.physmem.wrQLenPdf::9                         0                      
-system.physmem.wrQLenPdf::10                        0                      
-system.physmem.wrQLenPdf::11                        0                      
-system.physmem.wrQLenPdf::12                        0                      
-system.physmem.wrQLenPdf::13                        0                      
-system.physmem.wrQLenPdf::14                        0                      
-system.physmem.wrQLenPdf::15                        0                      
-system.physmem.wrQLenPdf::16                        0                      
-system.physmem.wrQLenPdf::17                        0                      
-system.physmem.wrQLenPdf::18                        0                      
-system.physmem.wrQLenPdf::19                        0                      
-system.physmem.wrQLenPdf::20                        0                      
-system.physmem.wrQLenPdf::21                        0                      
-system.physmem.wrQLenPdf::22                        0                      
-system.physmem.wrQLenPdf::23                        0                      
-system.physmem.wrQLenPdf::24                        0                      
-system.physmem.wrQLenPdf::25                        0                      
-system.physmem.wrQLenPdf::26                        0                      
-system.physmem.wrQLenPdf::27                        0                      
-system.physmem.wrQLenPdf::28                        0                      
-system.physmem.wrQLenPdf::29                        0                      
-system.physmem.wrQLenPdf::30                        0                      
-system.physmem.wrQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::32                        0                      
-system.physmem.wrQLenPdf::33                        0                      
-system.physmem.wrQLenPdf::34                        0                      
-system.physmem.wrQLenPdf::35                        0                      
-system.physmem.wrQLenPdf::36                        0                      
-system.physmem.wrQLenPdf::37                        0                      
-system.physmem.wrQLenPdf::38                        0                      
-system.physmem.wrQLenPdf::39                        0                      
-system.physmem.wrQLenPdf::40                        0                      
-system.physmem.wrQLenPdf::41                        0                      
-system.physmem.wrQLenPdf::42                        0                      
-system.physmem.wrQLenPdf::43                        0                      
-system.physmem.wrQLenPdf::44                        0                      
-system.physmem.wrQLenPdf::45                        0                      
-system.physmem.wrQLenPdf::46                        0                      
-system.physmem.wrQLenPdf::47                        0                      
-system.physmem.wrQLenPdf::48                        0                      
-system.physmem.wrQLenPdf::49                        0                      
-system.physmem.wrQLenPdf::50                        0                      
-system.physmem.wrQLenPdf::51                        0                      
-system.physmem.wrQLenPdf::52                        0                      
-system.physmem.wrQLenPdf::53                        0                      
-system.physmem.wrQLenPdf::54                        0                      
-system.physmem.wrQLenPdf::55                        0                      
-system.physmem.wrQLenPdf::56                        0                      
-system.physmem.wrQLenPdf::57                        0                      
-system.physmem.wrQLenPdf::58                        0                      
-system.physmem.wrQLenPdf::59                        0                      
-system.physmem.wrQLenPdf::60                        0                      
-system.physmem.wrQLenPdf::61                        0                      
-system.physmem.wrQLenPdf::62                        0                      
-system.physmem.wrQLenPdf::63                        0                      
-system.physmem.bytesPerActivate::samples           76                      
-system.physmem.bytesPerActivate::mean      348.631579                      
-system.physmem.bytesPerActivate::gmean     212.894378                      
-system.physmem.bytesPerActivate::stdev     337.912685                      
-system.physmem.bytesPerActivate::0-127             24     31.58%     31.58%
-system.physmem.bytesPerActivate::128-255           17     22.37%     53.95%
-system.physmem.bytesPerActivate::256-383           12     15.79%     69.74%
-system.physmem.bytesPerActivate::384-511            2      2.63%     72.37%
-system.physmem.bytesPerActivate::512-639            3      3.95%     76.32%
-system.physmem.bytesPerActivate::640-767            4      5.26%     81.58%
-system.physmem.bytesPerActivate::768-895            2      2.63%     84.21%
-system.physmem.bytesPerActivate::896-1023            3      3.95%     88.16%
-system.physmem.bytesPerActivate::1024-1151            9     11.84%    100.00%
-system.physmem.bytesPerActivate::total             76                      
-system.physmem.totQLat                        5920000                      
-system.physmem.totMemAccLat                  14245000                      
-system.physmem.totBusLat                      2220000                      
-system.physmem.avgQLat                       13333.33                      
-system.physmem.avgBusLat                      5000.00                      
-system.physmem.avgMemAccLat                  32083.33                      
-system.physmem.avgRdBW                        1341.07                      
-system.physmem.avgWrBW                           0.00                      
-system.physmem.avgRdBWSys                     1341.07                      
-system.physmem.avgWrBWSys                        0.00                      
-system.physmem.peakBW                        12800.00                      
-system.physmem.busUtil                          10.48                      
-system.physmem.busUtilRead                      10.48                      
-system.physmem.busUtilWrite                      0.00                      
-system.physmem.avgRdQLen                         1.82                      
-system.physmem.avgWrQLen                         0.00                      
-system.physmem.readRowHits                        358                      
-system.physmem.writeRowHits                         0                      
-system.physmem.readRowHitRate                   80.63                      
-system.physmem.writeRowHitRate                    nan                      
-system.physmem.avgGap                        47586.71                      
-system.physmem.pageHitRate                      80.63                      
-system.physmem_0.actEnergy                     528360                      
-system.physmem_0.preEnergy                     254265                      
-system.physmem_0.readEnergy                   2870280                      
-system.physmem_0.writeEnergy                        0                      
-system.physmem_0.refreshEnergy           1229280.000000                      
-system.physmem_0.actBackEnergy                3925590                      
-system.physmem_0.preBackEnergy                  28320                      
-system.physmem_0.actPowerDownEnergy           5657820                      
-system.physmem_0.prePowerDownEnergy             38400                      
-system.physmem_0.selfRefreshEnergy                  0                      
-system.physmem_0.totalEnergy                 14532315                      
-system.physmem_0.averagePower              685.810052                      
-system.physmem_0.totalIdleTime               12505250                      
-system.physmem_0.memoryStateTime::IDLE          17500                      
-system.physmem_0.memoryStateTime::REF          520000                      
-system.physmem_0.memoryStateTime::SREF              0                      
-system.physmem_0.memoryStateTime::PRE_PDN       100250                      
-system.physmem_0.memoryStateTime::ACT         8146250                      
-system.physmem_0.memoryStateTime::ACT_PDN     12405000                      
-system.physmem_1.actEnergy                      85680                      
-system.physmem_1.preEnergy                      34155                      
-system.physmem_1.readEnergy                    299880                      
-system.physmem_1.writeEnergy                        0                      
-system.physmem_1.refreshEnergy           1229280.000000                      
-system.physmem_1.actBackEnergy                 759810                      
-system.physmem_1.preBackEnergy                1412160                      
-system.physmem_1.actPowerDownEnergy           6380010                      
-system.physmem_1.prePowerDownEnergy            712320                      
-system.physmem_1.selfRefreshEnergy                  0                      
-system.physmem_1.totalEnergy                 10913295                      
-system.physmem_1.averagePower              515.021000                      
-system.physmem_1.totalIdleTime               13660000                      
-system.physmem_1.memoryStateTime::IDLE        3594000                      
-system.physmem_1.memoryStateTime::REF          520000                      
-system.physmem_1.memoryStateTime::SREF              0                      
-system.physmem_1.memoryStateTime::PRE_PDN      1854750                      
-system.physmem_1.memoryStateTime::ACT         1229000                      
-system.physmem_1.memoryStateTime::ACT_PDN     13991250                      
-system.pwrStateResidencyTicks::UNDEFINED     21189000                      
-system.cpu.branchPred.lookups                    2458                      
-system.cpu.branchPred.condPredicted              2033                      
-system.cpu.branchPred.condIncorrect               409                      
-system.cpu.branchPred.BTBLookups                 2104                      
-system.cpu.branchPred.BTBHits                     724                      
-system.cpu.branchPred.BTBCorrect                    0                      
-system.cpu.branchPred.BTBHitPct             34.410646                      
-system.cpu.branchPred.usedRAS                     228                      
-system.cpu.branchPred.RASInCorrect                 36                      
-system.cpu.branchPred.indirectLookups             135                      
-system.cpu.branchPred.indirectHits                 18                      
-system.cpu.branchPred.indirectMisses              117                      
-system.cpu.branchPredindirectMispredicted           37                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.workload.numSyscalls                     9                      
-system.cpu.pwrStateResidencyTicks::ON        21189000                      
-system.cpu.numCycles                            42379                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.fetch.icacheStallCycles               7639                      
-system.cpu.fetch.Insts                          13455                      
-system.cpu.fetch.Branches                        2458                      
-system.cpu.fetch.predictedBranches                970                      
-system.cpu.fetch.Cycles                          4277                      
-system.cpu.fetch.SquashCycles                     846                      
-system.cpu.fetch.MiscStallCycles                    5                      
-system.cpu.fetch.PendingTrapStallCycles           146                      
-system.cpu.fetch.IcacheWaitRetryStallCycles           22                      
-system.cpu.fetch.CacheLines                      1865                      
-system.cpu.fetch.IcacheSquashes                   287                      
-system.cpu.fetch.rateDist::samples              12512                      
-system.cpu.fetch.rateDist::mean              1.075368                      
-system.cpu.fetch.rateDist::stdev             2.471061                      
-system.cpu.fetch.rateDist::underflows               0      0.00%      0.00%
-system.cpu.fetch.rateDist::0                    10164     81.23%     81.23%
-system.cpu.fetch.rateDist::1                      163      1.30%     82.54%
-system.cpu.fetch.rateDist::2                      210      1.68%     84.22%
-system.cpu.fetch.rateDist::3                      146      1.17%     85.38%
-system.cpu.fetch.rateDist::4                      247      1.97%     87.36%
-system.cpu.fetch.rateDist::5                      148      1.18%     88.54%
-system.cpu.fetch.rateDist::6                      304      2.43%     90.97%
-system.cpu.fetch.rateDist::7                      158      1.26%     92.23%
-system.cpu.fetch.rateDist::8                      972      7.77%    100.00%
-system.cpu.fetch.rateDist::overflows                0      0.00%    100.00%
-system.cpu.fetch.rateDist::min_value                0                      
-system.cpu.fetch.rateDist::max_value                8                      
-system.cpu.fetch.rateDist::total                12512                      
-system.cpu.fetch.branchRate                  0.058000                      
-system.cpu.fetch.rate                        0.317492                      
-system.cpu.decode.IdleCycles                     7217                      
-system.cpu.decode.BlockedCycles                  2933                      
-system.cpu.decode.RunCycles                      1957                      
-system.cpu.decode.UnblockCycles                   130                      
-system.cpu.decode.SquashCycles                    275                      
-system.cpu.decode.BranchResolved                  791                      
-system.cpu.decode.BranchMispred                   149                      
-system.cpu.decode.DecodedInsts                  11520                      
-system.cpu.decode.SquashedInsts                   456                      
-system.cpu.rename.SquashCycles                    275                      
-system.cpu.rename.IdleCycles                     7386                      
-system.cpu.rename.BlockCycles                     930                      
-system.cpu.rename.serializeStallCycles            461                      
-system.cpu.rename.RunCycles                      1904                      
-system.cpu.rename.UnblockCycles                  1556                      
-system.cpu.rename.RenamedInsts                  11074                      
-system.cpu.rename.IQFullEvents                     22                      
-system.cpu.rename.LQFullEvents                      2                      
-system.cpu.rename.SQFullEvents                   1496                      
-system.cpu.rename.RenamedOperands                9775                      
-system.cpu.rename.RenameLookups                 17991                      
-system.cpu.rename.int_rename_lookups            17965                      
-system.cpu.rename.fp_rename_lookups                26                      
-system.cpu.rename.CommittedMaps                  4998                      
-system.cpu.rename.UndoneMaps                     4777                      
-system.cpu.rename.serializingInsts                 27                      
-system.cpu.rename.tempSerializingInsts             27                      
-system.cpu.rename.skidInsts                       402                      
-system.cpu.memDep0.insertedLoads                 1923                      
-system.cpu.memDep0.insertedStores                1570                      
-system.cpu.memDep0.conflictingLoads                55                      
-system.cpu.memDep0.conflictingStores               32                      
-system.cpu.iq.iqInstsAdded                      10204                      
-system.cpu.iq.iqNonSpecInstsAdded                  65                      
-system.cpu.iq.iqInstsIssued                      8807                      
-system.cpu.iq.iqSquashedInstsIssued                41                      
-system.cpu.iq.iqSquashedInstsExamined            4476                      
-system.cpu.iq.iqSquashedOperandsExamined         3567                      
-system.cpu.iq.iqSquashedNonSpecRemoved             49                      
-system.cpu.iq.issued_per_cycle::samples         12512                      
-system.cpu.iq.issued_per_cycle::mean         0.703884                      
-system.cpu.iq.issued_per_cycle::stdev        1.500750                      
-system.cpu.iq.issued_per_cycle::underflows            0      0.00%      0.00%
-system.cpu.iq.issued_per_cycle::0                9387     75.02%     75.02%
-system.cpu.iq.issued_per_cycle::1                 964      7.70%     82.73%
-system.cpu.iq.issued_per_cycle::2                 667      5.33%     88.06%
-system.cpu.iq.issued_per_cycle::3                 467      3.73%     91.79%
-system.cpu.iq.issued_per_cycle::4                 439      3.51%     95.30%
-system.cpu.iq.issued_per_cycle::5                 290      2.32%     97.62%
-system.cpu.iq.issued_per_cycle::6                 213      1.70%     99.32%
-system.cpu.iq.issued_per_cycle::7                  56      0.45%     99.77%
-system.cpu.iq.issued_per_cycle::8                  29      0.23%    100.00%
-system.cpu.iq.issued_per_cycle::overflows            0      0.00%    100.00%
-system.cpu.iq.issued_per_cycle::min_value            0                      
-system.cpu.iq.issued_per_cycle::max_value            8                      
-system.cpu.iq.issued_per_cycle::total           12512                      
-system.cpu.iq.fu_full::No_OpClass                   0      0.00%      0.00%
-system.cpu.iq.fu_full::IntAlu                      12      6.22%      6.22%
-system.cpu.iq.fu_full::IntMult                      0      0.00%      6.22%
-system.cpu.iq.fu_full::IntDiv                       0      0.00%      6.22%
-system.cpu.iq.fu_full::FloatAdd                     0      0.00%      6.22%
-system.cpu.iq.fu_full::FloatCmp                     0      0.00%      6.22%
-system.cpu.iq.fu_full::FloatCvt                     0      0.00%      6.22%
-system.cpu.iq.fu_full::FloatMult                    0      0.00%      6.22%
-system.cpu.iq.fu_full::FloatMultAcc                 0      0.00%      6.22%
-system.cpu.iq.fu_full::FloatDiv                     0      0.00%      6.22%
-system.cpu.iq.fu_full::FloatMisc                    0      0.00%      6.22%
-system.cpu.iq.fu_full::FloatSqrt                    0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdAdd                      0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdAddAcc                   0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdAlu                      0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdCmp                      0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdCvt                      0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdMisc                     0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdMult                     0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdMultAcc                  0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdShift                    0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdShiftAcc                 0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdSqrt                     0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdFloatAdd                 0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdFloatAlu                 0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdFloatCmp                 0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdFloatCvt                 0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdFloatDiv                 0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdFloatMisc                0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdFloatMult                0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdFloatMultAcc             0      0.00%      6.22%
-system.cpu.iq.fu_full::SimdFloatSqrt                0      0.00%      6.22%
-system.cpu.iq.fu_full::MemRead                     87     45.08%     51.30%
-system.cpu.iq.fu_full::MemWrite                    83     43.01%     94.30%
-system.cpu.iq.fu_full::FloatMemRead                 0      0.00%     94.30%
-system.cpu.iq.fu_full::FloatMemWrite               11      5.70%    100.00%
-system.cpu.iq.fu_full::IprAccess                    0      0.00%    100.00%
-system.cpu.iq.fu_full::InstPrefetch                 0      0.00%    100.00%
-system.cpu.iq.FU_type_0::No_OpClass                 0      0.00%      0.00%
-system.cpu.iq.FU_type_0::IntAlu                  5542     62.93%     62.93%
-system.cpu.iq.FU_type_0::IntMult                    0      0.00%     62.93%
-system.cpu.iq.FU_type_0::IntDiv                     0      0.00%     62.93%
-system.cpu.iq.FU_type_0::FloatAdd                   2      0.02%     62.95%
-system.cpu.iq.FU_type_0::FloatCmp                   0      0.00%     62.95%
-system.cpu.iq.FU_type_0::FloatCvt                   0      0.00%     62.95%
-system.cpu.iq.FU_type_0::FloatMult                  0      0.00%     62.95%
-system.cpu.iq.FU_type_0::FloatMultAcc               0      0.00%     62.95%
-system.cpu.iq.FU_type_0::FloatDiv                   0      0.00%     62.95%
-system.cpu.iq.FU_type_0::FloatMisc                  0      0.00%     62.95%
-system.cpu.iq.FU_type_0::FloatSqrt                  0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdAdd                    0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdAddAcc                 0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdAlu                    0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdCmp                    0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdCvt                    0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdMisc                   0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdMult                   0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdMultAcc                0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdShift                  0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdShiftAcc               0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdSqrt                   0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdFloatAdd               0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdFloatAlu               0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdFloatCmp               0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdFloatCvt               0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdFloatDiv               0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdFloatMisc              0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdFloatMult              0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdFloatMultAcc            0      0.00%     62.95%
-system.cpu.iq.FU_type_0::SimdFloatSqrt              0      0.00%     62.95%
-system.cpu.iq.FU_type_0::MemRead                 1815     20.61%     83.56%
-system.cpu.iq.FU_type_0::MemWrite                1422     16.15%     99.70%
-system.cpu.iq.FU_type_0::FloatMemRead               2      0.02%     99.73%
-system.cpu.iq.FU_type_0::FloatMemWrite             24      0.27%    100.00%
-system.cpu.iq.FU_type_0::IprAccess                  0      0.00%    100.00%
-system.cpu.iq.FU_type_0::InstPrefetch               0      0.00%    100.00%
-system.cpu.iq.FU_type_0::total                   8807                      
-system.cpu.iq.rate                           0.207815                      
-system.cpu.iq.fu_busy_cnt                         193                      
-system.cpu.iq.fu_busy_rate                   0.021914                      
-system.cpu.iq.int_inst_queue_reads              30293                      
-system.cpu.iq.int_inst_queue_writes             14715                      
-system.cpu.iq.int_inst_queue_wakeup_accesses         8133                      
-system.cpu.iq.fp_inst_queue_reads                  67                      
-system.cpu.iq.fp_inst_queue_writes                 36                      
-system.cpu.iq.fp_inst_queue_wakeup_accesses           27                      
-system.cpu.iq.int_alu_accesses                   8961                      
-system.cpu.iq.fp_alu_accesses                      39                      
-system.cpu.iew.lsq.thread0.forwLoads               84                      
-system.cpu.iew.lsq.thread0.invAddrLoads             0                      
-system.cpu.iew.lsq.thread0.squashedLoads          962                      
-system.cpu.iew.lsq.thread0.ignoredResponses            3                      
-system.cpu.iew.lsq.thread0.memOrderViolation            6                      
-system.cpu.iew.lsq.thread0.squashedStores          524                      
-system.cpu.iew.lsq.thread0.invAddrSwpfs             0                      
-system.cpu.iew.lsq.thread0.blockedLoads             0                      
-system.cpu.iew.lsq.thread0.rescheduledLoads            1                      
-system.cpu.iew.lsq.thread0.cacheBlocked            21                      
-system.cpu.iew.iewIdleCycles                        0                      
-system.cpu.iew.iewSquashCycles                    275                      
-system.cpu.iew.iewBlockCycles                     818                      
-system.cpu.iew.iewUnblockCycles                    73                      
-system.cpu.iew.iewDispatchedInsts               10269                      
-system.cpu.iew.iewDispSquashedInsts                43                      
-system.cpu.iew.iewDispLoadInsts                  1923                      
-system.cpu.iew.iewDispStoreInsts                 1570                      
-system.cpu.iew.iewDispNonSpecInsts                 53                      
-system.cpu.iew.iewIQFullEvents                     12                      
-system.cpu.iew.iewLSQFullEvents                    60                      
-system.cpu.iew.memOrderViolationEvents              6                      
-system.cpu.iew.predictedTakenIncorrect             71                      
-system.cpu.iew.predictedNotTakenIncorrect          256                      
-system.cpu.iew.branchMispredicts                  327                      
-system.cpu.iew.iewExecutedInsts                  8488                      
-system.cpu.iew.iewExecLoadInsts                  1719                      
-system.cpu.iew.iewExecSquashedInsts               319                      
-system.cpu.iew.exec_swp                             0                      
-system.cpu.iew.exec_nop                             0                      
-system.cpu.iew.exec_refs                         3083                      
-system.cpu.iew.exec_branches                     1364                      
-system.cpu.iew.exec_stores                       1364                      
-system.cpu.iew.exec_rate                     0.200288                      
-system.cpu.iew.wb_sent                           8262                      
-system.cpu.iew.wb_count                          8160                      
-system.cpu.iew.wb_producers                      4466                      
-system.cpu.iew.wb_consumers                      7207                      
-system.cpu.iew.wb_rate                       0.192548                      
-system.cpu.iew.wb_fanout                     0.619675                      
-system.cpu.commit.commitSquashedInsts            4479                      
-system.cpu.commit.commitNonSpecStalls              16                      
-system.cpu.commit.branchMispredicts               270                      
-system.cpu.commit.committed_per_cycle::samples        11809                      
-system.cpu.commit.committed_per_cycle::mean     0.490473                      
-system.cpu.commit.committed_per_cycle::stdev     1.351476                      
-system.cpu.commit.committed_per_cycle::underflows            0      0.00%      0.00%
-system.cpu.commit.committed_per_cycle::0         9644     81.67%     81.67%
-system.cpu.commit.committed_per_cycle::1          845      7.16%     88.82%
-system.cpu.commit.committed_per_cycle::2          531      4.50%     93.32%
-system.cpu.commit.committed_per_cycle::3          215      1.82%     95.14%
-system.cpu.commit.committed_per_cycle::4          177      1.50%     96.64%
-system.cpu.commit.committed_per_cycle::5          110      0.93%     97.57%
-system.cpu.commit.committed_per_cycle::6          132      1.12%     98.69%
-system.cpu.commit.committed_per_cycle::7           50      0.42%     99.11%
-system.cpu.commit.committed_per_cycle::8          105      0.89%    100.00%
-system.cpu.commit.committed_per_cycle::overflows            0      0.00%    100.00%
-system.cpu.commit.committed_per_cycle::min_value            0                      
-system.cpu.commit.committed_per_cycle::max_value            8                      
-system.cpu.commit.committed_per_cycle::total        11809                      
-system.cpu.commit.committedInsts                 5792                      
-system.cpu.commit.committedOps                   5792                      
-system.cpu.commit.swp_count                         0                      
-system.cpu.commit.refs                           2007                      
-system.cpu.commit.loads                           961                      
-system.cpu.commit.membars                           7                      
-system.cpu.commit.branches                       1037                      
-system.cpu.commit.fp_insts                         22                      
-system.cpu.commit.int_insts                      5698                      
-system.cpu.commit.function_calls                  103                      
-system.cpu.commit.op_class_0::No_OpClass            0      0.00%      0.00%
-system.cpu.commit.op_class_0::IntAlu             3783     65.31%     65.31%
-system.cpu.commit.op_class_0::IntMult               0      0.00%     65.31%
-system.cpu.commit.op_class_0::IntDiv                0      0.00%     65.31%
-system.cpu.commit.op_class_0::FloatAdd              2      0.03%     65.35%
-system.cpu.commit.op_class_0::FloatCmp              0      0.00%     65.35%
-system.cpu.commit.op_class_0::FloatCvt              0      0.00%     65.35%
-system.cpu.commit.op_class_0::FloatMult             0      0.00%     65.35%
-system.cpu.commit.op_class_0::FloatMultAcc            0      0.00%     65.35%
-system.cpu.commit.op_class_0::FloatDiv              0      0.00%     65.35%
-system.cpu.commit.op_class_0::FloatMisc             0      0.00%     65.35%
-system.cpu.commit.op_class_0::FloatSqrt             0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdAdd               0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdAddAcc            0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdAlu               0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdCmp               0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdCvt               0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdMisc              0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdMult              0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdMultAcc            0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdShift             0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdShiftAcc            0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdSqrt              0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdFloatAdd            0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdFloatAlu            0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdFloatCmp            0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdFloatCvt            0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdFloatDiv            0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdFloatMisc            0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdFloatMult            0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdFloatMultAcc            0      0.00%     65.35%
-system.cpu.commit.op_class_0::SimdFloatSqrt            0      0.00%     65.35%
-system.cpu.commit.op_class_0::MemRead             960     16.57%     81.92%
-system.cpu.commit.op_class_0::MemWrite           1027     17.73%     99.65%
-system.cpu.commit.op_class_0::FloatMemRead            1      0.02%     99.67%
-system.cpu.commit.op_class_0::FloatMemWrite           19      0.33%    100.00%
-system.cpu.commit.op_class_0::IprAccess             0      0.00%    100.00%
-system.cpu.commit.op_class_0::InstPrefetch            0      0.00%    100.00%
-system.cpu.commit.op_class_0::total              5792                      
-system.cpu.commit.bw_lim_events                   105                      
-system.cpu.rob.rob_reads                        21975                      
-system.cpu.rob.rob_writes                       21246                      
-system.cpu.timesIdled                             227                      
-system.cpu.idleCycles                           29867                      
-system.cpu.committedInsts                        5792                      
-system.cpu.committedOps                          5792                      
-system.cpu.cpi                               7.316816                      
-system.cpu.cpi_total                         7.316816                      
-system.cpu.ipc                               0.136671                      
-system.cpu.ipc_total                         0.136671                      
-system.cpu.int_regfile_reads                    13468                      
-system.cpu.int_regfile_writes                    7187                      
-system.cpu.fp_regfile_reads                        25                      
-system.cpu.fp_regfile_writes                        2                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     21189000                      
-system.cpu.dcache.tags.replacements                 0                      
-system.cpu.dcache.tags.tagsinuse            66.953799                      
-system.cpu.dcache.tags.total_refs                2204                      
-system.cpu.dcache.tags.sampled_refs               104                      
-system.cpu.dcache.tags.avg_refs             21.192308                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data    66.953799                      
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-system.cpu.dcache.tags.occ_percent::total     0.016346                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024          104                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           24                      
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-system.cpu.dcache.tags.occ_task_id_percent::1024     0.025391                      
-system.cpu.dcache.tags.tag_accesses              5386                      
-system.cpu.dcache.tags.data_accesses             5386                      
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     21189000                      
-system.cpu.dcache.ReadReq_hits::cpu.data         1483                      
-system.cpu.dcache.ReadReq_hits::total            1483                      
-system.cpu.dcache.WriteReq_hits::cpu.data          721                      
-system.cpu.dcache.WriteReq_hits::total            721                      
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-system.cpu.dcache.ReadReq_misses::total           112                      
-system.cpu.dcache.WriteReq_misses::cpu.data          325                      
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-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 99993.833846                      
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-system.cpu.dcache.blocked_cycles::no_mshrs          749                      
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-system.cpu.dcache.avg_blocked_cycles::no_mshrs    83.222222                      
-system.cpu.dcache.avg_blocked_cycles::no_targets          nan                      
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-system.cpu.icache.pwrStateResidencyTicks::UNDEFINED     21189000                      
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-system.cpu.l2cache.ReadExReq_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.977143                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.977143                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data     0.965517                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::total     0.965517                      
-system.cpu.l2cache.demand_miss_rate::cpu.inst     0.977143                      
-system.cpu.l2cache.demand_miss_rate::cpu.data     0.980952                      
-system.cpu.l2cache.demand_miss_rate::total     0.978022                      
-system.cpu.l2cache.overall_miss_rate::cpu.inst     0.977143                      
-system.cpu.l2cache.overall_miss_rate::cpu.data     0.980952                      
-system.cpu.l2cache.overall_miss_rate::total     0.978022                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 98308.510638                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::total 98308.510638                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 80520.467836                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 80520.467836                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 84089.285714                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 84089.285714                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 80520.467836                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.data 90577.669903                      
-system.cpu.l2cache.demand_avg_miss_latency::total 82848.314607                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 80520.467836                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data 90577.669903                      
-system.cpu.l2cache.overall_avg_miss_latency::total 82848.314607                      
-system.cpu.l2cache.blocked_cycles::no_mshrs            0                      
-system.cpu.l2cache.blocked_cycles::no_targets            0                      
-system.cpu.l2cache.blocked::no_mshrs                0                      
-system.cpu.l2cache.blocked::no_targets              0                      
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data           47                      
-system.cpu.l2cache.ReadExReq_mshr_misses::total           47                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst          342                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::total          342                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data           56                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::total           56                      
-system.cpu.l2cache.demand_mshr_misses::cpu.inst          342                      
-system.cpu.l2cache.demand_mshr_misses::cpu.data          103                      
-system.cpu.l2cache.demand_mshr_misses::total          445                      
-system.cpu.l2cache.overall_mshr_misses::cpu.inst          342                      
-system.cpu.l2cache.overall_mshr_misses::cpu.data          103                      
-system.cpu.l2cache.overall_mshr_misses::total          445                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data      4150500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total      4150500                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst     24128000                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total     24128000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data      4159000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      4159000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     24128000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data      8309500                      
-system.cpu.l2cache.demand_mshr_miss_latency::total     32437500                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     24128000                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data      8309500                      
-system.cpu.l2cache.overall_mshr_miss_latency::total     32437500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.977143                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.977143                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data     0.965517                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total     0.965517                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.977143                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data     0.980952                      
-system.cpu.l2cache.demand_mshr_miss_rate::total     0.978022                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.977143                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data     0.980952                      
-system.cpu.l2cache.overall_mshr_miss_rate::total     0.978022                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 88308.510638                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 88308.510638                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 70549.707602                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 70549.707602                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 74267.857143                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 74267.857143                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 70549.707602                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 80674.757282                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 72893.258427                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 70549.707602                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 80674.757282                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 72893.258427                      
-system.cpu.toL2Bus.snoop_filter.tot_requests          455                      
-system.cpu.toL2Bus.snoop_filter.hit_single_requests           10                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0                      
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     21189000                      
-system.cpu.toL2Bus.trans_dist::ReadResp           406                      
-system.cpu.toL2Bus.trans_dist::ReadExReq           47                      
-system.cpu.toL2Bus.trans_dist::ReadExResp           47                      
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          350                      
-system.cpu.toL2Bus.trans_dist::ReadSharedReq           58                      
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          699                      
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          209                      
-system.cpu.toL2Bus.pkt_count::total               908                      
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        22336                      
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         6656                      
-system.cpu.toL2Bus.pkt_size::total              28992                      
-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples          455                      
-system.cpu.toL2Bus.snoop_fanout::mean        0.021978                      
-system.cpu.toL2Bus.snoop_fanout::stdev       0.146773                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0                445     97.80%     97.80%
-system.cpu.toL2Bus.snoop_fanout::1                 10      2.20%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            1                      
-system.cpu.toL2Bus.snoop_fanout::total            455                      
-system.cpu.toL2Bus.reqLayer0.occupancy         227500                      
-system.cpu.toL2Bus.reqLayer0.utilization          1.1                      
-system.cpu.toL2Bus.respLayer0.occupancy        523500                      
-system.cpu.toL2Bus.respLayer0.utilization          2.5                      
-system.cpu.toL2Bus.respLayer1.occupancy        156000                      
-system.cpu.toL2Bus.respLayer1.utilization          0.7                      
-system.membus.snoop_filter.tot_requests           444                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED     21189000                      
-system.membus.trans_dist::ReadResp                396                      
-system.membus.trans_dist::ReadExReq                47                      
-system.membus.trans_dist::ReadExResp               47                      
-system.membus.trans_dist::ReadSharedReq           397                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          887                      
-system.membus.pkt_count::total                    887                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        28352                      
-system.membus.pkt_size::total                   28352                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples               444                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                     444    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                 444                      
-system.membus.reqLayer0.occupancy              553000                      
-system.membus.reqLayer0.utilization               2.6                      
-system.membus.respLayer1.occupancy            2325750                      
-system.membus.respLayer1.utilization             11.0                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini
deleted file mode 100644 (file)
index a94f4dc..0000000
+++ /dev/null
@@ -1,214 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=AtomicSimpleCPU
-children=dtb interrupts isa itb tracer workload
-UnifiedTLB=true
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-width=1
-workload=system.cpu.workload
-dcache_port=system.membus.slave[2]
-icache_port=system.membus.slave[1]
-
-[system.cpu.dtb]
-type=PowerTLB
-eventq_index=0
-size=64
-
-[system.cpu.interrupts]
-type=PowerInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=PowerISA
-eventq_index=0
-
-[system.cpu.itb]
-type=PowerTLB
-eventq_index=0
-size=64
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/power/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simerr b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simerr
deleted file mode 100755 (executable)
index c0b55d1..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout
deleted file mode 100755 (executable)
index e1a395f..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic/simout
-Redirecting stderr to build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 19:22:30
-gem5 started Apr  3 2017 19:22:48
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 103795
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/POWER/gem5.opt -d build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/power/linux/simple-atomic
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 2896000 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt
deleted file mode 100644 (file)
index ecd255c..0000000
+++ /dev/null
@@ -1,153 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000003                      
-sim_ticks                                     2896000                      
-final_tick                                    2896000                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 591136                      
-host_op_rate                                   589882                      
-host_tick_rate                              294306849                      
-host_mem_usage                                 250080                      
-host_seconds                                     0.01                      
-sim_insts                                        5793                      
-sim_ops                                          5793                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED      2896000                      
-system.physmem.bytes_read::cpu.inst             23172                      
-system.physmem.bytes_read::cpu.data              3720                      
-system.physmem.bytes_read::total                26892                      
-system.physmem.bytes_inst_read::cpu.inst        23172                      
-system.physmem.bytes_inst_read::total           23172                      
-system.physmem.bytes_written::cpu.data           4209                      
-system.physmem.bytes_written::total              4209                      
-system.physmem.num_reads::cpu.inst               5793                      
-system.physmem.num_reads::cpu.data                961                      
-system.physmem.num_reads::total                  6754                      
-system.physmem.num_writes::cpu.data              1046                      
-system.physmem.num_writes::total                 1046                      
-system.physmem.bw_read::cpu.inst           8001381215                      
-system.physmem.bw_read::cpu.data           1284530387                      
-system.physmem.bw_read::total              9285911602                      
-system.physmem.bw_inst_read::cpu.inst      8001381215                      
-system.physmem.bw_inst_read::total         8001381215                      
-system.physmem.bw_write::cpu.data          1453383978                      
-system.physmem.bw_write::total             1453383978                      
-system.physmem.bw_total::cpu.inst          8001381215                      
-system.physmem.bw_total::cpu.data          2737914365                      
-system.physmem.bw_total::total            10739295580                      
-system.pwrStateResidencyTicks::UNDEFINED      2896000                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.workload.numSyscalls                     9                      
-system.cpu.pwrStateResidencyTicks::ON         2896000                      
-system.cpu.numCycles                             5793                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        5793                      
-system.cpu.committedOps                          5793                      
-system.cpu.num_int_alu_accesses                  5698                      
-system.cpu.num_fp_alu_accesses                     22                      
-system.cpu.num_func_calls                         200                      
-system.cpu.num_conditional_control_insts          895                      
-system.cpu.num_int_insts                         5698                      
-system.cpu.num_fp_insts                            22                      
-system.cpu.num_int_register_reads                9529                      
-system.cpu.num_int_register_writes               4996                      
-system.cpu.num_fp_register_reads                   20                      
-system.cpu.num_fp_register_writes                   2                      
-system.cpu.num_mem_refs                          2007                      
-system.cpu.num_load_insts                         961                      
-system.cpu.num_store_insts                       1046                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                       5793                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1037                      
-system.cpu.op_class::No_OpClass                     0      0.00%      0.00%
-system.cpu.op_class::IntAlu                      3784     65.32%     65.32%
-system.cpu.op_class::IntMult                        0      0.00%     65.32%
-system.cpu.op_class::IntDiv                         0      0.00%     65.32%
-system.cpu.op_class::FloatAdd                       2      0.03%     65.35%
-system.cpu.op_class::FloatCmp                       0      0.00%     65.35%
-system.cpu.op_class::FloatCvt                       0      0.00%     65.35%
-system.cpu.op_class::FloatMult                      0      0.00%     65.35%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     65.35%
-system.cpu.op_class::FloatDiv                       0      0.00%     65.35%
-system.cpu.op_class::FloatMisc                      0      0.00%     65.35%
-system.cpu.op_class::FloatSqrt                      0      0.00%     65.35%
-system.cpu.op_class::SimdAdd                        0      0.00%     65.35%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     65.35%
-system.cpu.op_class::SimdAlu                        0      0.00%     65.35%
-system.cpu.op_class::SimdCmp                        0      0.00%     65.35%
-system.cpu.op_class::SimdCvt                        0      0.00%     65.35%
-system.cpu.op_class::SimdMisc                       0      0.00%     65.35%
-system.cpu.op_class::SimdMult                       0      0.00%     65.35%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     65.35%
-system.cpu.op_class::SimdShift                      0      0.00%     65.35%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     65.35%
-system.cpu.op_class::SimdSqrt                       0      0.00%     65.35%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     65.35%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     65.35%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     65.35%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     65.35%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     65.35%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     65.35%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     65.35%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     65.35%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     65.35%
-system.cpu.op_class::MemRead                      960     16.57%     81.93%
-system.cpu.op_class::MemWrite                    1027     17.73%     99.65%
-system.cpu.op_class::FloatMemRead                   1      0.02%     99.67%
-system.cpu.op_class::FloatMemWrite                 19      0.33%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       5793                      
-system.membus.snoop_filter.tot_requests             0                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED      2896000                      
-system.membus.trans_dist::ReadReq                6754                      
-system.membus.trans_dist::ReadResp               6754                      
-system.membus.trans_dist::WriteReq               1046                      
-system.membus.trans_dist::WriteResp              1046                      
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port        11586                      
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port         4014                      
-system.membus.pkt_count::total                  15600                      
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port        23172                      
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port         7929                      
-system.membus.pkt_size::total                   31101                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples              7800                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                    7800    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                7800                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.ini b/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.ini
deleted file mode 100644 (file)
index 6a3662c..0000000
+++ /dev/null
@@ -1,905 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=MinorCPU
-children=branchPred dcache dtb executeFuncUnits icache interrupts isa itb l2cache toL2Bus tracer workload
-branchPred=system.cpu.branchPred
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-decodeCycleInput=true
-decodeInputBufferSize=3
-decodeInputWidth=2
-decodeToExecuteForwardDelay=1
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-enableIdling=true
-eventq_index=0
-executeAllowEarlyMemoryIssue=true
-executeBranchDelay=1
-executeCommitLimit=2
-executeCycleInput=true
-executeFuncUnits=system.cpu.executeFuncUnits
-executeInputBufferSize=7
-executeInputWidth=2
-executeIssueLimit=2
-executeLSQMaxStoreBufferStoresPerCycle=2
-executeLSQRequestsQueueSize=1
-executeLSQStoreBufferSize=5
-executeLSQTransfersQueueSize=2
-executeMaxAccessesInMemory=2
-executeMemoryCommitLimit=1
-executeMemoryIssueLimit=1
-executeMemoryWidth=0
-executeSetTraceTimeOnCommit=true
-executeSetTraceTimeOnIssue=false
-fetch1FetchLimit=1
-fetch1LineSnapWidth=0
-fetch1LineWidth=0
-fetch1ToFetch2BackwardDelay=1
-fetch1ToFetch2ForwardDelay=1
-fetch2CycleInput=true
-fetch2InputBufferSize=2
-fetch2ToDecodeForwardDelay=1
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-threadPolicy=RoundRobin
-tracer=system.cpu.tracer
-wait_for_remote_gdb=false
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.executeFuncUnits]
-type=MinorFUPool
-children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
-eventq_index=0
-funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
-
-[system.cpu.executeFuncUnits.funcUnits0]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses
-opLat=3
-timings=system.cpu.executeFuncUnits.funcUnits0.timings
-
-[system.cpu.executeFuncUnits.funcUnits0.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntAlu
-
-[system.cpu.executeFuncUnits.funcUnits0.timings]
-type=MinorFUTiming
-children=opClasses
-description=Int
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses
-srcRegsRelativeLats=2
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits1]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses
-opLat=3
-timings=system.cpu.executeFuncUnits.funcUnits1.timings
-
-[system.cpu.executeFuncUnits.funcUnits1.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntAlu
-
-[system.cpu.executeFuncUnits.funcUnits1.timings]
-type=MinorFUTiming
-children=opClasses
-description=Int
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses
-srcRegsRelativeLats=2
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits2]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses
-opLat=3
-timings=system.cpu.executeFuncUnits.funcUnits2.timings
-
-[system.cpu.executeFuncUnits.funcUnits2.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntMult
-
-[system.cpu.executeFuncUnits.funcUnits2.timings]
-type=MinorFUTiming
-children=opClasses
-description=Mul
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses
-srcRegsRelativeLats=0
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits3]
-type=MinorFU
-children=opClasses
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=9
-opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses
-opLat=9
-timings=
-
-[system.cpu.executeFuncUnits.funcUnits3.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntDiv
-
-[system.cpu.executeFuncUnits.funcUnits4]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
-opLat=6
-timings=system.cpu.executeFuncUnits.funcUnits4.timings
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses]
-type=MinorOpClassSet
-children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 opClasses26 opClasses27
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses26 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses27
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatAdd
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatCmp
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatCvt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMisc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMult
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMultAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatDiv
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatSqrt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdAdd
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdAddAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdAlu
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdCmp
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdCvt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdMisc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdMult
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdMultAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdShift
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdShiftAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdSqrt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatAdd
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatAlu
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatCmp
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatCvt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatDiv
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatMisc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatMult
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses26]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatMultAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses27]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatSqrt
-
-[system.cpu.executeFuncUnits.funcUnits4.timings]
-type=MinorFUTiming
-children=opClasses
-description=FloatSimd
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses
-srcRegsRelativeLats=2
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits5]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
-opLat=1
-timings=system.cpu.executeFuncUnits.funcUnits5.timings
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses]
-type=MinorOpClassSet
-children=opClasses0 opClasses1 opClasses2 opClasses3
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses2 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses3
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
-type=MinorOpClass
-eventq_index=0
-opClass=MemRead
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
-type=MinorOpClass
-eventq_index=0
-opClass=MemWrite
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses2]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMemRead
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses3]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMemWrite
-
-[system.cpu.executeFuncUnits.funcUnits5.timings]
-type=MinorFUTiming
-children=opClasses
-description=Mem
-eventq_index=0
-extraAssumedLat=2
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses
-srcRegsRelativeLats=1
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits6]
-type=MinorFU
-children=opClasses
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses
-opLat=1
-timings=
-
-[system.cpu.executeFuncUnits.funcUnits6.opClasses]
-type=MinorOpClassSet
-children=opClasses0 opClasses1
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1
-
-[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0]
-type=MinorOpClass
-eventq_index=0
-opClass=IprAccess
-
-[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1]
-type=MinorOpClass
-eventq_index=0
-opClass=InstPrefetch
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=RiscvInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=RiscvISA
-eventq_index=0
-
-[system.cpu.itb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-page_policy=open_adaptive
-power_model=Null
-range=0:134217727:0:0:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10000
-static_frontend_latency=10000
-tBURST=5000
-tCCD_L=0
-tCK=1250
-tCL=13750
-tCS=2500
-tRAS=35000
-tRCD=13750
-tREFI=7800000
-tRFC=260000
-tRP=13750
-tRRD=6000
-tRRD_L=0
-tRTP=7500
-tRTW=2500
-tWR=15000
-tWTR=7500
-tXAW=30000
-tXP=6000
-tXPDLL=0
-tXS=270000
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.json b/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.json
deleted file mode 100644 (file)
index 3c00470..0000000
+++ /dev/null
@@ -1,1214 +0,0 @@
-{
-    "name": null, 
-    "sim_quantum": 0, 
-    "system": {
-        "kernel": "", 
-        "mmap_using_noreserve": false, 
-        "kernel_addr_check": true, 
-        "membus": {
-            "point_of_coherency": true, 
-            "system": "system", 
-            "response_latency": 2, 
-            "cxx_class": "CoherentXBar", 
-            "forward_latency": 4, 
-            "clk_domain": "system.clk_domain", 
-            "width": 16, 
-            "eventq_index": 0, 
-            "default_p_state": "UNDEFINED", 
-            "p_state_clk_gate_max": 1000000000000, 
-            "master": {
-                "peer": [
-                    "system.physmem.port"
-                ], 
-                "role": "MASTER"
-            }, 
-            "type": "CoherentXBar", 
-            "frontend_latency": 3, 
-            "slave": {
-                "peer": [
-                    "system.system_port", 
-                    "system.cpu.l2cache.mem_side"
-                ], 
-                "role": "SLAVE"
-            }, 
-            "p_state_clk_gate_min": 1000, 
-            "snoop_filter": {
-                "name": "snoop_filter", 
-                "system": "system", 
-                "max_capacity": 8388608, 
-                "eventq_index": 0, 
-                "cxx_class": "SnoopFilter", 
-                "path": "system.membus.snoop_filter", 
-                "type": "SnoopFilter", 
-                "lookup_latency": 1
-            }, 
-            "power_model": null, 
-            "path": "system.membus", 
-            "snoop_response_latency": 4, 
-            "name": "membus", 
-            "p_state_clk_gate_bins": 20, 
-            "use_default_range": false
-        }, 
-        "symbolfile": "", 
-        "readfile": "", 
-        "thermal_model": null, 
-        "cxx_class": "System", 
-        "work_begin_cpu_id_exit": -1, 
-        "load_offset": 0, 
-        "work_begin_exit_count": 0, 
-        "p_state_clk_gate_min": 1000, 
-        "memories": [
-            "system.physmem"
-        ], 
-        "work_begin_ckpt_count": 0, 
-        "clk_domain": {
-            "name": "clk_domain", 
-            "clock": [
-                1000
-            ], 
-            "init_perf_level": 0, 
-            "voltage_domain": "system.voltage_domain", 
-            "eventq_index": 0, 
-            "cxx_class": "SrcClockDomain", 
-            "path": "system.clk_domain", 
-            "type": "SrcClockDomain", 
-            "domain_id": -1
-        }, 
-        "mem_ranges": [], 
-        "eventq_index": 0, 
-        "default_p_state": "UNDEFINED", 
-        "p_state_clk_gate_max": 1000000000000, 
-        "dvfs_handler": {
-            "enable": false, 
-            "name": "dvfs_handler", 
-            "sys_clk_domain": "system.clk_domain", 
-            "transition_latency": 100000000, 
-            "eventq_index": 0, 
-            "cxx_class": "DVFSHandler", 
-            "domains": [], 
-            "path": "system.dvfs_handler", 
-            "type": "DVFSHandler"
-        }, 
-        "work_end_exit_count": 0, 
-        "type": "System", 
-        "voltage_domain": {
-            "name": "voltage_domain", 
-            "eventq_index": 0, 
-            "voltage": [
-                "1.0"
-            ], 
-            "cxx_class": "VoltageDomain", 
-            "path": "system.voltage_domain", 
-            "type": "VoltageDomain"
-        }, 
-        "cache_line_size": 64, 
-        "boot_osflags": "a", 
-        "system_port": {
-            "peer": "system.membus.slave[0]", 
-            "role": "MASTER"
-        }, 
-        "physmem": {
-            "static_frontend_latency": 10000, 
-            "tRFC": 260000, 
-            "activation_limit": 4, 
-            "in_addr_map": true, 
-            "IDD3N2": "0.0", 
-            "tWTR": 7500, 
-            "IDD52": "0.0", 
-            "clk_domain": "system.clk_domain", 
-            "channels": 1, 
-            "write_buffer_size": 64, 
-            "device_bus_width": 8, 
-            "VDD": "1.5", 
-            "write_high_thresh_perc": 85, 
-            "cxx_class": "DRAMCtrl", 
-            "bank_groups_per_rank": 0, 
-            "IDD2N2": "0.0", 
-            "port": {
-                "peer": "system.membus.master[0]", 
-                "role": "SLAVE"
-            }, 
-            "tCCD_L": 0, 
-            "IDD2N": "0.032", 
-            "p_state_clk_gate_min": 1000, 
-            "null": false, 
-            "IDD2P1": "0.032", 
-            "eventq_index": 0, 
-            "tRRD": 6000, 
-            "tRTW": 2500, 
-            "IDD4R": "0.157", 
-            "burst_length": 8, 
-            "tRTP": 7500, 
-            "IDD4W": "0.125", 
-            "tWR": 15000, 
-            "banks_per_rank": 8, 
-            "devices_per_rank": 8, 
-            "IDD2P02": "0.0", 
-            "default_p_state": "UNDEFINED", 
-            "p_state_clk_gate_max": 1000000000000, 
-            "IDD6": "0.02", 
-            "IDD5": "0.235", 
-            "tRCD": 13750, 
-            "type": "DRAMCtrl", 
-            "IDD3P02": "0.0", 
-            "tRRD_L": 0, 
-            "IDD0": "0.055", 
-            "IDD62": "0.0", 
-            "min_writes_per_switch": 16, 
-            "mem_sched_policy": "frfcfs", 
-            "IDD02": "0.0", 
-            "IDD2P0": "0.0", 
-            "ranks_per_channel": 2, 
-            "page_policy": "open_adaptive", 
-            "IDD4W2": "0.0", 
-            "tCS": 2500, 
-            "power_model": null, 
-            "tCL": 13750, 
-            "read_buffer_size": 32, 
-            "conf_table_reported": true, 
-            "tCK": 1250, 
-            "tRAS": 35000, 
-            "tRP": 13750, 
-            "tBURST": 5000, 
-            "path": "system.physmem", 
-            "tXP": 6000, 
-            "tXS": 270000, 
-            "addr_mapping": "RoRaBaCoCh", 
-            "IDD3P0": "0.0", 
-            "IDD3P1": "0.038", 
-            "IDD3N": "0.038", 
-            "name": "physmem", 
-            "tXSDLL": 0, 
-            "device_size": 536870912, 
-            "kvm_map": true, 
-            "dll": true, 
-            "tXAW": 30000, 
-            "write_low_thresh_perc": 50, 
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-                        "simpoint": 0, 
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-                        "input": "cin", 
-                        "path": "system.cpu.workload", 
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-                        "cmd": [
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-                        "useArchPT": false, 
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-                        "output": "cout"
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-                }, 
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-                    "path": "system.cpu.tracer", 
-                    "type": "ExeTracer", 
-                    "name": "tracer", 
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-                    "type": "TournamentBP", 
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-                    "choiceCtrBits": 2, 
-                    "useIndirect": true, 
-                    "localCtrBits": 2, 
-                    "path": "system.cpu.branchPred", 
-                    "localPredictorSize": 2048, 
-                    "RASSize": 16, 
-                    "globalPredictorSize": 8192, 
-                    "name": "branchPred", 
-                    "indirectHashTargets": true, 
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-                    "indirectTagSize": 16, 
-                    "BTBTagSize": 16
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-                        "role": "SLAVE"
-                    }, 
-                    "clusivity": "mostly_incl", 
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-                    "system": "system", 
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-                    "size": 262144, 
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-                    "eventq_index": 0, 
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-                    "mem_side": {
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-                        "role": "MASTER"
-                    }, 
-                    "mshrs": 4, 
-                    "writeback_clean": false, 
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-                    "tags": {
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-                        "name": "tags", 
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-                        "eventq_index": 0, 
-                        "p_state_clk_gate_bins": 20, 
-                        "default_p_state": "UNDEFINED", 
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-                        "power_model": null, 
-                        "sequential_access": false, 
-                        "assoc": 2, 
-                        "cxx_class": "LRU", 
-                        "p_state_clk_gate_max": 1000000000000, 
-                        "path": "system.cpu.dcache.tags", 
-                        "block_size": 64, 
-                        "type": "LRU", 
-                        "data_latency": 2
-                    }, 
-                    "tgts_per_mshr": 20, 
-                    "demand_mshr_reserve": 1, 
-                    "power_model": null, 
-                    "addr_ranges": [
-                        "0:18446744073709551615:0:0:0:0"
-                    ], 
-                    "is_read_only": false, 
-                    "prefetch_on_access": false, 
-                    "path": "system.cpu.dcache", 
-                    "data_latency": 2, 
-                    "tag_latency": 2, 
-                    "name": "dcache", 
-                    "p_state_clk_gate_bins": 20, 
-                    "sequential_access": false, 
-                    "assoc": 2
-                }, 
-                "path": "system.cpu", 
-                "fetch1ToFetch2ForwardDelay": 1, 
-                "decodeInputBufferSize": 3
-            }
-        ], 
-        "multi_thread": false, 
-        "exit_on_work_items": false, 
-        "work_item_id": -1, 
-        "num_work_ids": 16
-    }, 
-    "time_sync_period": 100000000000, 
-    "eventq_index": 0, 
-    "time_sync_spin_threshold": 100000000, 
-    "cxx_class": "Root", 
-    "path": "root", 
-    "time_sync_enable": false, 
-    "type": "Root", 
-    "full_system": false
-}
\ No newline at end of file
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simerr b/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simerr
deleted file mode 100755 (executable)
index 418a5c3..0000000
+++ /dev/null
@@ -1,6 +0,0 @@
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-info: Entering event queue @ 0.  Starting simulation...
-warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings.
-      Returning '/home/ar4jc/gem5/tests/test-progs/hello/bin/riscv/linux/hello'
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simout b/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simout
deleted file mode 100755 (executable)
index 19698a1..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/minor-timing/simout
-Redirecting stderr to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/minor-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Jul 13 2017 17:37:52
-gem5 started Jul 13 2017 18:03:36
-gem5 executing on boldrock, pid 21568
-command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/minor-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/00.hello/riscv/linux/minor-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 37069000 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/stats.txt b/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/stats.txt
deleted file mode 100644 (file)
index 74a4a69..0000000
+++ /dev/null
@@ -1,769 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000037                      
-sim_ticks                                    37069000                      
-final_tick                                   37069000                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                   9833                      
-host_op_rate                                     9849                      
-host_tick_rate                               65547568                      
-host_mem_usage                                 261772                      
-host_seconds                                     0.57                      
-sim_insts                                        5561                      
-sim_ops                                          5570                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED     37069000                      
-system.physmem.bytes_read::cpu.inst             20864                      
-system.physmem.bytes_read::cpu.data              9344                      
-system.physmem.bytes_read::total                30208                      
-system.physmem.bytes_inst_read::cpu.inst        20864                      
-system.physmem.bytes_inst_read::total           20864                      
-system.physmem.num_reads::cpu.inst                326                      
-system.physmem.num_reads::cpu.data                146                      
-system.physmem.num_reads::total                   472                      
-system.physmem.bw_read::cpu.inst            562842267                      
-system.physmem.bw_read::cpu.data            252070463                      
-system.physmem.bw_read::total               814912730                      
-system.physmem.bw_inst_read::cpu.inst       562842267                      
-system.physmem.bw_inst_read::total          562842267                      
-system.physmem.bw_total::cpu.inst           562842267                      
-system.physmem.bw_total::cpu.data           252070463                      
-system.physmem.bw_total::total              814912730                      
-system.physmem.readReqs                           472                      
-system.physmem.writeReqs                            0                      
-system.physmem.readBursts                         472                      
-system.physmem.writeBursts                          0                      
-system.physmem.bytesReadDRAM                    30208                      
-system.physmem.bytesReadWrQ                         0                      
-system.physmem.bytesWritten                         0                      
-system.physmem.bytesReadSys                     30208                      
-system.physmem.bytesWrittenSys                      0                      
-system.physmem.servicedByWrQ                        0                      
-system.physmem.mergedWrBursts                       0                      
-system.physmem.neitherReadNorWriteReqs              0                      
-system.physmem.perBankRdBursts::0                  31                      
-system.physmem.perBankRdBursts::1                   0                      
-system.physmem.perBankRdBursts::2                  34                      
-system.physmem.perBankRdBursts::3                  21                      
-system.physmem.perBankRdBursts::4                  68                      
-system.physmem.perBankRdBursts::5                  91                      
-system.physmem.perBankRdBursts::6                  70                      
-system.physmem.perBankRdBursts::7                  58                      
-system.physmem.perBankRdBursts::8                  57                      
-system.physmem.perBankRdBursts::9                  33                      
-system.physmem.perBankRdBursts::10                  0                      
-system.physmem.perBankRdBursts::11                  3                      
-system.physmem.perBankRdBursts::12                  4                      
-system.physmem.perBankRdBursts::13                  1                      
-system.physmem.perBankRdBursts::14                  1                      
-system.physmem.perBankRdBursts::15                  0                      
-system.physmem.perBankWrBursts::0                   0                      
-system.physmem.perBankWrBursts::1                   0                      
-system.physmem.perBankWrBursts::2                   0                      
-system.physmem.perBankWrBursts::3                   0                      
-system.physmem.perBankWrBursts::4                   0                      
-system.physmem.perBankWrBursts::5                   0                      
-system.physmem.perBankWrBursts::6                   0                      
-system.physmem.perBankWrBursts::7                   0                      
-system.physmem.perBankWrBursts::8                   0                      
-system.physmem.perBankWrBursts::9                   0                      
-system.physmem.perBankWrBursts::10                  0                      
-system.physmem.perBankWrBursts::11                  0                      
-system.physmem.perBankWrBursts::12                  0                      
-system.physmem.perBankWrBursts::13                  0                      
-system.physmem.perBankWrBursts::14                  0                      
-system.physmem.perBankWrBursts::15                  0                      
-system.physmem.numRdRetry                           0                      
-system.physmem.numWrRetry                           0                      
-system.physmem.totGap                        36987000                      
-system.physmem.readPktSize::0                       0                      
-system.physmem.readPktSize::1                       0                      
-system.physmem.readPktSize::2                       0                      
-system.physmem.readPktSize::3                       0                      
-system.physmem.readPktSize::4                       0                      
-system.physmem.readPktSize::5                       0                      
-system.physmem.readPktSize::6                     472                      
-system.physmem.writePktSize::0                      0                      
-system.physmem.writePktSize::1                      0                      
-system.physmem.writePktSize::2                      0                      
-system.physmem.writePktSize::3                      0                      
-system.physmem.writePktSize::4                      0                      
-system.physmem.writePktSize::5                      0                      
-system.physmem.writePktSize::6                      0                      
-system.physmem.rdQLenPdf::0                       391                      
-system.physmem.rdQLenPdf::1                        74                      
-system.physmem.rdQLenPdf::2                         7                      
-system.physmem.rdQLenPdf::3                         0                      
-system.physmem.rdQLenPdf::4                         0                      
-system.physmem.rdQLenPdf::5                         0                      
-system.physmem.rdQLenPdf::6                         0                      
-system.physmem.rdQLenPdf::7                         0                      
-system.physmem.rdQLenPdf::8                         0                      
-system.physmem.rdQLenPdf::9                         0                      
-system.physmem.rdQLenPdf::10                        0                      
-system.physmem.rdQLenPdf::11                        0                      
-system.physmem.rdQLenPdf::12                        0                      
-system.physmem.rdQLenPdf::13                        0                      
-system.physmem.rdQLenPdf::14                        0                      
-system.physmem.rdQLenPdf::15                        0                      
-system.physmem.rdQLenPdf::16                        0                      
-system.physmem.rdQLenPdf::17                        0                      
-system.physmem.rdQLenPdf::18                        0                      
-system.physmem.rdQLenPdf::19                        0                      
-system.physmem.rdQLenPdf::20                        0                      
-system.physmem.rdQLenPdf::21                        0                      
-system.physmem.rdQLenPdf::22                        0                      
-system.physmem.rdQLenPdf::23                        0                      
-system.physmem.rdQLenPdf::24                        0                      
-system.physmem.rdQLenPdf::25                        0                      
-system.physmem.rdQLenPdf::26                        0                      
-system.physmem.rdQLenPdf::27                        0                      
-system.physmem.rdQLenPdf::28                        0                      
-system.physmem.rdQLenPdf::29                        0                      
-system.physmem.rdQLenPdf::30                        0                      
-system.physmem.rdQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::0                         0                      
-system.physmem.wrQLenPdf::1                         0                      
-system.physmem.wrQLenPdf::2                         0                      
-system.physmem.wrQLenPdf::3                         0                      
-system.physmem.wrQLenPdf::4                         0                      
-system.physmem.wrQLenPdf::5                         0                      
-system.physmem.wrQLenPdf::6                         0                      
-system.physmem.wrQLenPdf::7                         0                      
-system.physmem.wrQLenPdf::8                         0                      
-system.physmem.wrQLenPdf::9                         0                      
-system.physmem.wrQLenPdf::10                        0                      
-system.physmem.wrQLenPdf::11                        0                      
-system.physmem.wrQLenPdf::12                        0                      
-system.physmem.wrQLenPdf::13                        0                      
-system.physmem.wrQLenPdf::14                        0                      
-system.physmem.wrQLenPdf::15                        0                      
-system.physmem.wrQLenPdf::16                        0                      
-system.physmem.wrQLenPdf::17                        0                      
-system.physmem.wrQLenPdf::18                        0                      
-system.physmem.wrQLenPdf::19                        0                      
-system.physmem.wrQLenPdf::20                        0                      
-system.physmem.wrQLenPdf::21                        0                      
-system.physmem.wrQLenPdf::22                        0                      
-system.physmem.wrQLenPdf::23                        0                      
-system.physmem.wrQLenPdf::24                        0                      
-system.physmem.wrQLenPdf::25                        0                      
-system.physmem.wrQLenPdf::26                        0                      
-system.physmem.wrQLenPdf::27                        0                      
-system.physmem.wrQLenPdf::28                        0                      
-system.physmem.wrQLenPdf::29                        0                      
-system.physmem.wrQLenPdf::30                        0                      
-system.physmem.wrQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::32                        0                      
-system.physmem.wrQLenPdf::33                        0                      
-system.physmem.wrQLenPdf::34                        0                      
-system.physmem.wrQLenPdf::35                        0                      
-system.physmem.wrQLenPdf::36                        0                      
-system.physmem.wrQLenPdf::37                        0                      
-system.physmem.wrQLenPdf::38                        0                      
-system.physmem.wrQLenPdf::39                        0                      
-system.physmem.wrQLenPdf::40                        0                      
-system.physmem.wrQLenPdf::41                        0                      
-system.physmem.wrQLenPdf::42                        0                      
-system.physmem.wrQLenPdf::43                        0                      
-system.physmem.wrQLenPdf::44                        0                      
-system.physmem.wrQLenPdf::45                        0                      
-system.physmem.wrQLenPdf::46                        0                      
-system.physmem.wrQLenPdf::47                        0                      
-system.physmem.wrQLenPdf::48                        0                      
-system.physmem.wrQLenPdf::49                        0                      
-system.physmem.wrQLenPdf::50                        0                      
-system.physmem.wrQLenPdf::51                        0                      
-system.physmem.wrQLenPdf::52                        0                      
-system.physmem.wrQLenPdf::53                        0                      
-system.physmem.wrQLenPdf::54                        0                      
-system.physmem.wrQLenPdf::55                        0                      
-system.physmem.wrQLenPdf::56                        0                      
-system.physmem.wrQLenPdf::57                        0                      
-system.physmem.wrQLenPdf::58                        0                      
-system.physmem.wrQLenPdf::59                        0                      
-system.physmem.wrQLenPdf::60                        0                      
-system.physmem.wrQLenPdf::61                        0                      
-system.physmem.wrQLenPdf::62                        0                      
-system.physmem.wrQLenPdf::63                        0                      
-system.physmem.bytesPerActivate::samples           88                      
-system.physmem.bytesPerActivate::mean      316.363636                      
-system.physmem.bytesPerActivate::gmean     211.085787                      
-system.physmem.bytesPerActivate::stdev     287.751896                      
-system.physmem.bytesPerActivate::0-127             24     27.27%     27.27%
-system.physmem.bytesPerActivate::128-255           19     21.59%     48.86%
-system.physmem.bytesPerActivate::256-383           18     20.45%     69.32%
-system.physmem.bytesPerActivate::384-511            8      9.09%     78.41%
-system.physmem.bytesPerActivate::512-639            5      5.68%     84.09%
-system.physmem.bytesPerActivate::640-767            4      4.55%     88.64%
-system.physmem.bytesPerActivate::768-895            2      2.27%     90.91%
-system.physmem.bytesPerActivate::896-1023            2      2.27%     93.18%
-system.physmem.bytesPerActivate::1024-1151            6      6.82%    100.00%
-system.physmem.bytesPerActivate::total             88                      
-system.physmem.totQLat                        6564750                      
-system.physmem.totMemAccLat                  15414750                      
-system.physmem.totBusLat                      2360000                      
-system.physmem.avgQLat                       13908.37                      
-system.physmem.avgBusLat                      5000.00                      
-system.physmem.avgMemAccLat                  32658.37                      
-system.physmem.avgRdBW                         814.91                      
-system.physmem.avgWrBW                           0.00                      
-system.physmem.avgRdBWSys                      814.91                      
-system.physmem.avgWrBWSys                        0.00                      
-system.physmem.peakBW                        12800.00                      
-system.physmem.busUtil                           6.37                      
-system.physmem.busUtilRead                       6.37                      
-system.physmem.busUtilWrite                      0.00                      
-system.physmem.avgRdQLen                         1.21                      
-system.physmem.avgWrQLen                         0.00                      
-system.physmem.readRowHits                        375                      
-system.physmem.writeRowHits                         0                      
-system.physmem.readRowHitRate                   79.45                      
-system.physmem.writeRowHitRate                    nan                      
-system.physmem.avgGap                        78362.29                      
-system.physmem.pageHitRate                      79.45                      
-system.physmem_0.actEnergy                     564060                      
-system.physmem_0.preEnergy                     273240                      
-system.physmem_0.readEnergy                   2663220                      
-system.physmem_0.writeEnergy                        0                      
-system.physmem_0.refreshEnergy           2458560.000000                      
-system.physmem_0.actBackEnergy                5082120                      
-system.physmem_0.preBackEnergy                  54240                      
-system.physmem_0.actPowerDownEnergy          11755680                      
-system.physmem_0.prePowerDownEnergy              1440                      
-system.physmem_0.selfRefreshEnergy                  0                      
-system.physmem_0.totalEnergy                 22852560                      
-system.physmem_0.averagePower              616.470461                      
-system.physmem_0.totalIdleTime               25554000                      
-system.physmem_0.memoryStateTime::IDLE          30000                      
-system.physmem_0.memoryStateTime::REF         1040000                      
-system.physmem_0.memoryStateTime::SREF              0                      
-system.physmem_0.memoryStateTime::PRE_PDN         3750                      
-system.physmem_0.memoryStateTime::ACT        10211750                      
-system.physmem_0.memoryStateTime::ACT_PDN     25783500                      
-system.physmem_1.actEnergy                     128520                      
-system.physmem_1.preEnergy                      60720                      
-system.physmem_1.readEnergy                    706860                      
-system.physmem_1.writeEnergy                        0                      
-system.physmem_1.refreshEnergy           2458560.000000                      
-system.physmem_1.actBackEnergy                1843380                      
-system.physmem_1.preBackEnergy                 313920                      
-system.physmem_1.actPowerDownEnergy          13836180                      
-system.physmem_1.prePowerDownEnergy            717120                      
-system.physmem_1.selfRefreshEnergy                  0                      
-system.physmem_1.totalEnergy                 20065260                      
-system.physmem_1.averagePower              541.280281                      
-system.physmem_1.totalIdleTime               32167250                      
-system.physmem_1.memoryStateTime::IDLE         693000                      
-system.physmem_1.memoryStateTime::REF         1040000                      
-system.physmem_1.memoryStateTime::SREF              0                      
-system.physmem_1.memoryStateTime::PRE_PDN      1867000                      
-system.physmem_1.memoryStateTime::ACT         3123500                      
-system.physmem_1.memoryStateTime::ACT_PDN     30345500                      
-system.pwrStateResidencyTicks::UNDEFINED     37069000                      
-system.cpu.branchPred.lookups                    2799                      
-system.cpu.branchPred.condPredicted              1837                      
-system.cpu.branchPred.condIncorrect               468                      
-system.cpu.branchPred.BTBLookups                 2579                      
-system.cpu.branchPred.BTBHits                     315                      
-system.cpu.branchPred.BTBCorrect                    0                      
-system.cpu.branchPred.BTBHitPct             12.214036                      
-system.cpu.branchPred.usedRAS                       0                      
-system.cpu.branchPred.RASInCorrect                  0                      
-system.cpu.branchPred.indirectLookups             669                      
-system.cpu.branchPred.indirectHits                 36                      
-system.cpu.branchPred.indirectMisses              633                      
-system.cpu.branchPredindirectMispredicted          173                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.workload.numSyscalls                     9                      
-system.cpu.pwrStateResidencyTicks::ON        37069000                      
-system.cpu.numCycles                            74138                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        5561                      
-system.cpu.committedOps                          5570                      
-system.cpu.discardedOps                          1479                      
-system.cpu.numFetchSuspends                         0                      
-system.cpu.cpi                              13.331775                      
-system.cpu.ipc                               0.075009                      
-system.cpu.op_class_0::No_OpClass                  10      0.18%      0.18%
-system.cpu.op_class_0::IntAlu                    3392     60.90%     61.08%
-system.cpu.op_class_0::IntMult                      2      0.04%     61.11%
-system.cpu.op_class_0::IntDiv                       4      0.07%     61.18%
-system.cpu.op_class_0::FloatAdd                     0      0.00%     61.18%
-system.cpu.op_class_0::FloatCmp                     0      0.00%     61.18%
-system.cpu.op_class_0::FloatCvt                     0      0.00%     61.18%
-system.cpu.op_class_0::FloatMult                    0      0.00%     61.18%
-system.cpu.op_class_0::FloatMultAcc                 0      0.00%     61.18%
-system.cpu.op_class_0::FloatDiv                     0      0.00%     61.18%
-system.cpu.op_class_0::FloatMisc                    0      0.00%     61.18%
-system.cpu.op_class_0::FloatSqrt                    0      0.00%     61.18%
-system.cpu.op_class_0::SimdAdd                      0      0.00%     61.18%
-system.cpu.op_class_0::SimdAddAcc                   0      0.00%     61.18%
-system.cpu.op_class_0::SimdAlu                      0      0.00%     61.18%
-system.cpu.op_class_0::SimdCmp                      0      0.00%     61.18%
-system.cpu.op_class_0::SimdCvt                      0      0.00%     61.18%
-system.cpu.op_class_0::SimdMisc                     0      0.00%     61.18%
-system.cpu.op_class_0::SimdMult                     0      0.00%     61.18%
-system.cpu.op_class_0::SimdMultAcc                  0      0.00%     61.18%
-system.cpu.op_class_0::SimdShift                    0      0.00%     61.18%
-system.cpu.op_class_0::SimdShiftAcc                 0      0.00%     61.18%
-system.cpu.op_class_0::SimdSqrt                     0      0.00%     61.18%
-system.cpu.op_class_0::SimdFloatAdd                 0      0.00%     61.18%
-system.cpu.op_class_0::SimdFloatAlu                 0      0.00%     61.18%
-system.cpu.op_class_0::SimdFloatCmp                 0      0.00%     61.18%
-system.cpu.op_class_0::SimdFloatCvt                 0      0.00%     61.18%
-system.cpu.op_class_0::SimdFloatDiv                 0      0.00%     61.18%
-system.cpu.op_class_0::SimdFloatMisc                0      0.00%     61.18%
-system.cpu.op_class_0::SimdFloatMult                0      0.00%     61.18%
-system.cpu.op_class_0::SimdFloatMultAcc             0      0.00%     61.18%
-system.cpu.op_class_0::SimdFloatSqrt                0      0.00%     61.18%
-system.cpu.op_class_0::MemRead                   1082     19.43%     80.61%
-system.cpu.op_class_0::MemWrite                  1068     19.17%     99.78%
-system.cpu.op_class_0::FloatMemRead                 0      0.00%     99.78%
-system.cpu.op_class_0::FloatMemWrite               12      0.22%    100.00%
-system.cpu.op_class_0::IprAccess                    0      0.00%    100.00%
-system.cpu.op_class_0::InstPrefetch                 0      0.00%    100.00%
-system.cpu.op_class_0::total                     5570                      
-system.cpu.tickCycles                           11297                      
-system.cpu.idleCycles                           62841                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     37069000                      
-system.cpu.dcache.tags.replacements                 0                      
-system.cpu.dcache.tags.tagsinuse            87.218675                      
-system.cpu.dcache.tags.total_refs                2153                      
-system.cpu.dcache.tags.sampled_refs               146                      
-system.cpu.dcache.tags.avg_refs             14.746575                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data    87.218675                      
-system.cpu.dcache.tags.occ_percent::cpu.data     0.021294                      
-system.cpu.dcache.tags.occ_percent::total     0.021294                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024          146                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           21                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::1          125                      
-system.cpu.dcache.tags.occ_task_id_percent::1024     0.035645                      
-system.cpu.dcache.tags.tag_accesses              4860                      
-system.cpu.dcache.tags.data_accesses             4860                      
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     37069000                      
-system.cpu.dcache.ReadReq_hits::cpu.data         1203                      
-system.cpu.dcache.ReadReq_hits::total            1203                      
-system.cpu.dcache.WriteReq_hits::cpu.data          935                      
-system.cpu.dcache.WriteReq_hits::total            935                      
-system.cpu.dcache.LoadLockedReq_hits::cpu.data            7                      
-system.cpu.dcache.LoadLockedReq_hits::total            7                      
-system.cpu.dcache.StoreCondReq_hits::cpu.data            8                      
-system.cpu.dcache.StoreCondReq_hits::total            8                      
-system.cpu.dcache.demand_hits::cpu.data          2138                      
-system.cpu.dcache.demand_hits::total             2138                      
-system.cpu.dcache.overall_hits::cpu.data         2138                      
-system.cpu.dcache.overall_hits::total            2138                      
-system.cpu.dcache.ReadReq_misses::cpu.data           66                      
-system.cpu.dcache.ReadReq_misses::total            66                      
-system.cpu.dcache.WriteReq_misses::cpu.data          137                      
-system.cpu.dcache.WriteReq_misses::total          137                      
-system.cpu.dcache.LoadLockedReq_misses::cpu.data            1                      
-system.cpu.dcache.LoadLockedReq_misses::total            1                      
-system.cpu.dcache.demand_misses::cpu.data          203                      
-system.cpu.dcache.demand_misses::total            203                      
-system.cpu.dcache.overall_misses::cpu.data          203                      
-system.cpu.dcache.overall_misses::total           203                      
-system.cpu.dcache.ReadReq_miss_latency::cpu.data      6029500                      
-system.cpu.dcache.ReadReq_miss_latency::total      6029500                      
-system.cpu.dcache.WriteReq_miss_latency::cpu.data     11079500                      
-system.cpu.dcache.WriteReq_miss_latency::total     11079500                      
-system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data        77000                      
-system.cpu.dcache.LoadLockedReq_miss_latency::total        77000                      
-system.cpu.dcache.demand_miss_latency::cpu.data     17109000                      
-system.cpu.dcache.demand_miss_latency::total     17109000                      
-system.cpu.dcache.overall_miss_latency::cpu.data     17109000                      
-system.cpu.dcache.overall_miss_latency::total     17109000                      
-system.cpu.dcache.ReadReq_accesses::cpu.data         1269                      
-system.cpu.dcache.ReadReq_accesses::total         1269                      
-system.cpu.dcache.WriteReq_accesses::cpu.data         1072                      
-system.cpu.dcache.WriteReq_accesses::total         1072                      
-system.cpu.dcache.LoadLockedReq_accesses::cpu.data            8                      
-system.cpu.dcache.LoadLockedReq_accesses::total            8                      
-system.cpu.dcache.StoreCondReq_accesses::cpu.data            8                      
-system.cpu.dcache.StoreCondReq_accesses::total            8                      
-system.cpu.dcache.demand_accesses::cpu.data         2341                      
-system.cpu.dcache.demand_accesses::total         2341                      
-system.cpu.dcache.overall_accesses::cpu.data         2341                      
-system.cpu.dcache.overall_accesses::total         2341                      
-system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.052009                      
-system.cpu.dcache.ReadReq_miss_rate::total     0.052009                      
-system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.127799                      
-system.cpu.dcache.WriteReq_miss_rate::total     0.127799                      
-system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data     0.125000                      
-system.cpu.dcache.LoadLockedReq_miss_rate::total     0.125000                      
-system.cpu.dcache.demand_miss_rate::cpu.data     0.086715                      
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-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 91356.060606                      
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-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 80872.262774                      
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-system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data        77000                      
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::total        77000                      
-system.cpu.dcache.demand_avg_miss_latency::cpu.data 84280.788177                      
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-system.cpu.dcache.overall_avg_miss_latency::total 84280.788177                      
-system.cpu.dcache.blocked_cycles::no_mshrs            0                      
-system.cpu.dcache.blocked_cycles::no_targets            0                      
-system.cpu.dcache.blocked::no_mshrs                 0                      
-system.cpu.dcache.blocked::no_targets               0                      
-system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.dcache.avg_blocked_cycles::no_targets          nan                      
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-system.cpu.dcache.overall_mshr_hits::total           58                      
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-system.cpu.dcache.ReadReq_mshr_miss_latency::total      5699500                      
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-system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED     37069000                      
-system.cpu.icache.tags.replacements                 0                      
-system.cpu.icache.tags.tagsinuse           161.452863                      
-system.cpu.icache.tags.total_refs                1852                      
-system.cpu.icache.tags.sampled_refs               326                      
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-system.cpu.icache.tags.occ_task_id_blocks::1024          326                      
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-system.cpu.icache.pwrStateResidencyTicks::UNDEFINED     37069000                      
-system.cpu.icache.ReadReq_hits::cpu.inst         1852                      
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-system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                      
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-system.cpu.icache.ReadReq_mshr_misses::total          327                      
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-system.cpu.l2cache.demand_miss_latency::cpu.inst     27038000                      
-system.cpu.l2cache.demand_miss_latency::cpu.data     12451000                      
-system.cpu.l2cache.demand_miss_latency::total     39489000                      
-system.cpu.l2cache.overall_miss_latency::cpu.inst     27038000                      
-system.cpu.l2cache.overall_miss_latency::cpu.data     12451000                      
-system.cpu.l2cache.overall_miss_latency::total     39489000                      
-system.cpu.l2cache.ReadExReq_accesses::cpu.data           82                      
-system.cpu.l2cache.ReadExReq_accesses::total           82                      
-system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst          327                      
-system.cpu.l2cache.ReadCleanReq_accesses::total          327                      
-system.cpu.l2cache.ReadSharedReq_accesses::cpu.data           64                      
-system.cpu.l2cache.ReadSharedReq_accesses::total           64                      
-system.cpu.l2cache.demand_accesses::cpu.inst          327                      
-system.cpu.l2cache.demand_accesses::cpu.data          146                      
-system.cpu.l2cache.demand_accesses::total          473                      
-system.cpu.l2cache.overall_accesses::cpu.inst          327                      
-system.cpu.l2cache.overall_accesses::cpu.data          146                      
-system.cpu.l2cache.overall_accesses::total          473                      
-system.cpu.l2cache.ReadExReq_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::total            1                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::total            1                      
-system.cpu.l2cache.demand_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.demand_miss_rate::cpu.data            1                      
-system.cpu.l2cache.demand_miss_rate::total            1                      
-system.cpu.l2cache.overall_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.overall_miss_rate::cpu.data            1                      
-system.cpu.l2cache.overall_miss_rate::total            1                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 82585.365854                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::total 82585.365854                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 82685.015291                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 82685.015291                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 88734.375000                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 88734.375000                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 82685.015291                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.data 85280.821918                      
-system.cpu.l2cache.demand_avg_miss_latency::total 83486.257928                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 82685.015291                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data 85280.821918                      
-system.cpu.l2cache.overall_avg_miss_latency::total 83486.257928                      
-system.cpu.l2cache.blocked_cycles::no_mshrs            0                      
-system.cpu.l2cache.blocked_cycles::no_targets            0                      
-system.cpu.l2cache.blocked::no_mshrs                0                      
-system.cpu.l2cache.blocked::no_targets              0                      
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data           82                      
-system.cpu.l2cache.ReadExReq_mshr_misses::total           82                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst          327                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::total          327                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data           64                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::total           64                      
-system.cpu.l2cache.demand_mshr_misses::cpu.inst          327                      
-system.cpu.l2cache.demand_mshr_misses::cpu.data          146                      
-system.cpu.l2cache.demand_mshr_misses::total          473                      
-system.cpu.l2cache.overall_mshr_misses::cpu.inst          327                      
-system.cpu.l2cache.overall_mshr_misses::cpu.data          146                      
-system.cpu.l2cache.overall_mshr_misses::total          473                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data      5952000                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total      5952000                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst     23778000                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total     23778000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data      5039000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      5039000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     23778000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data     10991000                      
-system.cpu.l2cache.demand_mshr_miss_latency::total     34769000                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     23778000                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data     10991000                      
-system.cpu.l2cache.overall_mshr_miss_latency::total     34769000                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.demand_mshr_miss_rate::total            1                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.overall_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 72585.365854                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 72585.365854                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 72715.596330                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 72715.596330                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 78734.375000                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 78734.375000                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 72715.596330                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 75280.821918                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 73507.399577                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 72715.596330                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 75280.821918                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 73507.399577                      
-system.cpu.toL2Bus.snoop_filter.tot_requests          473                      
-system.cpu.toL2Bus.snoop_filter.hit_single_requests            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0                      
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     37069000                      
-system.cpu.toL2Bus.trans_dist::ReadResp           390                      
-system.cpu.toL2Bus.trans_dist::ReadExReq           82                      
-system.cpu.toL2Bus.trans_dist::ReadExResp           82                      
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          327                      
-system.cpu.toL2Bus.trans_dist::ReadSharedReq           64                      
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          653                      
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          292                      
-system.cpu.toL2Bus.pkt_count::total               945                      
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        20864                      
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         9344                      
-system.cpu.toL2Bus.pkt_size::total              30208                      
-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples          473                      
-system.cpu.toL2Bus.snoop_fanout::mean               0                      
-system.cpu.toL2Bus.snoop_fanout::stdev              0                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0                473    100.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::1                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            0                      
-system.cpu.toL2Bus.snoop_fanout::total            473                      
-system.cpu.toL2Bus.reqLayer0.occupancy         236500                      
-system.cpu.toL2Bus.reqLayer0.utilization          0.6                      
-system.cpu.toL2Bus.respLayer0.occupancy        489000                      
-system.cpu.toL2Bus.respLayer0.utilization          1.3                      
-system.cpu.toL2Bus.respLayer1.occupancy        219000                      
-system.cpu.toL2Bus.respLayer1.utilization          0.6                      
-system.membus.snoop_filter.tot_requests           472                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED     37069000                      
-system.membus.trans_dist::ReadResp                390                      
-system.membus.trans_dist::ReadExReq                82                      
-system.membus.trans_dist::ReadExResp               82                      
-system.membus.trans_dist::ReadSharedReq           390                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          944                      
-system.membus.pkt_count::total                    944                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        30208                      
-system.membus.pkt_size::total                   30208                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples               472                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                     472    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                 472                      
-system.membus.reqLayer0.occupancy              530000                      
-system.membus.reqLayer0.utilization               1.4                      
-system.membus.respLayer1.occupancy            2511750                      
-system.membus.respLayer1.utilization              6.8                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/riscv/linux/o3-timing/config.ini
deleted file mode 100644 (file)
index 9a92d19..0000000
+++ /dev/null
@@ -1,876 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=DerivO3CPU
-children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload
-LFSTSize=1024
-LQEntries=32
-LSQCheckLoads=true
-LSQDepCheckShift=4
-SQEntries=32
-SSITSize=1024
-activity=0
-backComSize=5
-branchPred=system.cpu.branchPred
-cacheStorePorts=200
-checker=Null
-clk_domain=system.cpu_clk_domain
-commitToDecodeDelay=1
-commitToFetchDelay=1
-commitToIEWDelay=1
-commitToRenameDelay=1
-commitWidth=8
-cpu_id=0
-decodeToFetchDelay=1
-decodeToRenameDelay=1
-decodeWidth=8
-default_p_state=UNDEFINED
-dispatchWidth=8
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fetchBufferSize=64
-fetchQueueSize=32
-fetchToDecodeDelay=1
-fetchTrapLatency=1
-fetchWidth=8
-forwardComSize=5
-fuPool=system.cpu.fuPool
-function_trace=false
-function_trace_start=0
-iewToCommitDelay=1
-iewToDecodeDelay=1
-iewToFetchDelay=1
-iewToRenameDelay=1
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-issueToExecuteDelay=1
-issueWidth=8
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-needsTSO=false
-numIQEntries=64
-numPhysCCRegs=0
-numPhysFloatRegs=256
-numPhysIntRegs=256
-numPhysVecRegs=256
-numROBEntries=192
-numRobs=1
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-renameToDecodeDelay=1
-renameToFetchDelay=1
-renameToIEWDelay=2
-renameToROBDelay=1
-renameWidth=8
-simpoint_start_insts=
-smtCommitPolicy=RoundRobin
-smtFetchPolicy=SingleThread
-smtIQPolicy=Partitioned
-smtIQThreshold=100
-smtLSQPolicy=Partitioned
-smtLSQThreshold=100
-smtNumFetchingThreads=1
-smtROBPolicy=Partitioned
-smtROBThreshold=100
-socket_id=0
-squashWidth=8
-store_set_clear_period=250000
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-trapLatency=13
-wait_for_remote_gdb=false
-wbWidth=8
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.fuPool]
-type=FUPool
-children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
-FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
-eventq_index=0
-
-[system.cpu.fuPool.FUList0]
-type=FUDesc
-children=opList
-count=6
-eventq_index=0
-opList=system.cpu.fuPool.FUList0.opList
-
-[system.cpu.fuPool.FUList0.opList]
-type=OpDesc
-eventq_index=0
-opClass=IntAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList1]
-type=FUDesc
-children=opList0 opList1
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
-
-[system.cpu.fuPool.FUList1.opList0]
-type=OpDesc
-eventq_index=0
-opClass=IntMult
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList1.opList1]
-type=OpDesc
-eventq_index=0
-opClass=IntDiv
-opLat=20
-pipelined=false
-
-[system.cpu.fuPool.FUList2]
-type=FUDesc
-children=opList0 opList1 opList2
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
-
-[system.cpu.fuPool.FUList2.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatAdd
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatCmp
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatCvt
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList3]
-type=FUDesc
-children=opList0 opList1 opList2 opList3 opList4
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 system.cpu.fuPool.FUList3.opList3 system.cpu.fuPool.FUList3.opList4
-
-[system.cpu.fuPool.FUList3.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatMult
-opLat=4
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMultAcc
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMisc
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatDiv
-opLat=12
-pipelined=false
-
-[system.cpu.fuPool.FUList3.opList4]
-type=OpDesc
-eventq_index=0
-opClass=FloatSqrt
-opLat=24
-pipelined=false
-
-[system.cpu.fuPool.FUList4]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList4.opList0 system.cpu.fuPool.FUList4.opList1
-
-[system.cpu.fuPool.FUList4.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5]
-type=FUDesc
-children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
-
-[system.cpu.fuPool.FUList5.opList00]
-type=OpDesc
-eventq_index=0
-opClass=SimdAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList01]
-type=OpDesc
-eventq_index=0
-opClass=SimdAddAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList02]
-type=OpDesc
-eventq_index=0
-opClass=SimdAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList03]
-type=OpDesc
-eventq_index=0
-opClass=SimdCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList04]
-type=OpDesc
-eventq_index=0
-opClass=SimdCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList05]
-type=OpDesc
-eventq_index=0
-opClass=SimdMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList06]
-type=OpDesc
-eventq_index=0
-opClass=SimdMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList07]
-type=OpDesc
-eventq_index=0
-opClass=SimdMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList08]
-type=OpDesc
-eventq_index=0
-opClass=SimdShift
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList09]
-type=OpDesc
-eventq_index=0
-opClass=SimdShiftAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList10]
-type=OpDesc
-eventq_index=0
-opClass=SimdSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList11]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList12]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList13]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList14]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList15]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatDiv
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList16]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList17]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList18]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList19]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1
-
-[system.cpu.fuPool.FUList6.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7]
-type=FUDesc
-children=opList0 opList1 opList2 opList3
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 system.cpu.fuPool.FUList7.opList2 system.cpu.fuPool.FUList7.opList3
-
-[system.cpu.fuPool.FUList7.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList1]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList8]
-type=FUDesc
-children=opList
-count=1
-eventq_index=0
-opList=system.cpu.fuPool.FUList8.opList
-
-[system.cpu.fuPool.FUList8.opList]
-type=OpDesc
-eventq_index=0
-opClass=IprAccess
-opLat=3
-pipelined=false
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=RiscvInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=RiscvISA
-eventq_index=0
-
-[system.cpu.itb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-page_policy=open_adaptive
-power_model=Null
-range=0:134217727:0:0:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10000
-static_frontend_latency=10000
-tBURST=5000
-tCCD_L=0
-tCK=1250
-tCL=13750
-tCS=2500
-tRAS=35000
-tRCD=13750
-tREFI=7800000
-tRFC=260000
-tRP=13750
-tRRD=6000
-tRRD_L=0
-tRTP=7500
-tRTW=2500
-tWR=15000
-tWTR=7500
-tXAW=30000
-tXP=6000
-tXPDLL=0
-tXS=270000
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/o3-timing/config.json b/tests/quick/se/00.hello/ref/riscv/linux/o3-timing/config.json
deleted file mode 100644 (file)
index 9d2385f..0000000
+++ /dev/null
@@ -1,1155 +0,0 @@
-{
-    "name": null, 
-    "sim_quantum": 0, 
-    "system": {
-        "kernel": "", 
-        "mmap_using_noreserve": false, 
-        "kernel_addr_check": true, 
-        "membus": {
-            "point_of_coherency": true, 
-            "system": "system", 
-            "response_latency": 2, 
-            "cxx_class": "CoherentXBar", 
-            "forward_latency": 4, 
-            "clk_domain": "system.clk_domain", 
-            "width": 16, 
-            "eventq_index": 0, 
-            "default_p_state": "UNDEFINED", 
-            "p_state_clk_gate_max": 1000000000000, 
-            "master": {
-                "peer": [
-                    "system.physmem.port"
-                ], 
-                "role": "MASTER"
-            }, 
-            "type": "CoherentXBar", 
-            "frontend_latency": 3, 
-            "slave": {
-                "peer": [
-                    "system.system_port", 
-                    "system.cpu.l2cache.mem_side"
-                ], 
-                "role": "SLAVE"
-            }, 
-            "p_state_clk_gate_min": 1000, 
-            "snoop_filter": {
-                "name": "snoop_filter", 
-                "system": "system", 
-                "max_capacity": 8388608, 
-                "eventq_index": 0, 
-                "cxx_class": "SnoopFilter", 
-                "path": "system.membus.snoop_filter", 
-                "type": "SnoopFilter", 
-                "lookup_latency": 1
-            }, 
-            "power_model": null, 
-            "path": "system.membus", 
-            "snoop_response_latency": 4, 
-            "name": "membus", 
-            "p_state_clk_gate_bins": 20, 
-            "use_default_range": false
-        }, 
-        "symbolfile": "", 
-        "readfile": "", 
-        "thermal_model": null, 
-        "cxx_class": "System", 
-        "work_begin_cpu_id_exit": -1, 
-        "load_offset": 0, 
-        "work_begin_exit_count": 0, 
-        "p_state_clk_gate_min": 1000, 
-        "memories": [
-            "system.physmem"
-        ], 
-        "work_begin_ckpt_count": 0, 
-        "clk_domain": {
-            "name": "clk_domain", 
-            "clock": [
-                1000
-            ], 
-            "init_perf_level": 0, 
-            "voltage_domain": "system.voltage_domain", 
-            "eventq_index": 0, 
-            "cxx_class": "SrcClockDomain", 
-            "path": "system.clk_domain", 
-            "type": "SrcClockDomain", 
-            "domain_id": -1
-        }, 
-        "mem_ranges": [], 
-        "eventq_index": 0, 
-        "default_p_state": "UNDEFINED", 
-        "p_state_clk_gate_max": 1000000000000, 
-        "dvfs_handler": {
-            "enable": false, 
-            "name": "dvfs_handler", 
-            "sys_clk_domain": "system.clk_domain", 
-            "transition_latency": 100000000, 
-            "eventq_index": 0, 
-            "cxx_class": "DVFSHandler", 
-            "domains": [], 
-            "path": "system.dvfs_handler", 
-            "type": "DVFSHandler"
-        }, 
-        "work_end_exit_count": 0, 
-        "type": "System", 
-        "voltage_domain": {
-            "name": "voltage_domain", 
-            "eventq_index": 0, 
-            "voltage": [
-                "1.0"
-            ], 
-            "cxx_class": "VoltageDomain", 
-            "path": "system.voltage_domain", 
-            "type": "VoltageDomain"
-        }, 
-        "cache_line_size": 64, 
-        "boot_osflags": "a", 
-        "system_port": {
-            "peer": "system.membus.slave[0]", 
-            "role": "MASTER"
-        }, 
-        "physmem": {
-            "static_frontend_latency": 10000, 
-            "tRFC": 260000, 
-            "activation_limit": 4, 
-            "in_addr_map": true, 
-            "IDD3N2": "0.0", 
-            "tWTR": 7500, 
-            "IDD52": "0.0", 
-            "clk_domain": "system.clk_domain", 
-            "channels": 1, 
-            "write_buffer_size": 64, 
-            "device_bus_width": 8, 
-            "VDD": "1.5", 
-            "write_high_thresh_perc": 85, 
-            "cxx_class": "DRAMCtrl", 
-            "bank_groups_per_rank": 0, 
-            "IDD2N2": "0.0", 
-            "port": {
-                "peer": "system.membus.master[0]", 
-                "role": "SLAVE"
-            }, 
-            "tCCD_L": 0, 
-            "IDD2N": "0.032", 
-            "p_state_clk_gate_min": 1000, 
-            "null": false, 
-            "IDD2P1": "0.032", 
-            "eventq_index": 0, 
-            "tRRD": 6000, 
-            "tRTW": 2500, 
-            "IDD4R": "0.157", 
-            "burst_length": 8, 
-            "tRTP": 7500, 
-            "IDD4W": "0.125", 
-            "tWR": 15000, 
-            "banks_per_rank": 8, 
-            "devices_per_rank": 8, 
-            "IDD2P02": "0.0", 
-            "default_p_state": "UNDEFINED", 
-            "p_state_clk_gate_max": 1000000000000, 
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-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList5.opList09", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "SimdSqrt", 
-                                    "opLat": 1, 
-                                    "name": "opList10", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList5.opList10", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "SimdFloatAdd", 
-                                    "opLat": 1, 
-                                    "name": "opList11", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList5.opList11", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "SimdFloatAlu", 
-                                    "opLat": 1, 
-                                    "name": "opList12", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList5.opList12", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "SimdFloatCmp", 
-                                    "opLat": 1, 
-                                    "name": "opList13", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList5.opList13", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "SimdFloatCvt", 
-                                    "opLat": 1, 
-                                    "name": "opList14", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList5.opList14", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "SimdFloatDiv", 
-                                    "opLat": 1, 
-                                    "name": "opList15", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList5.opList15", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "SimdFloatMisc", 
-                                    "opLat": 1, 
-                                    "name": "opList16", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList5.opList16", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "SimdFloatMult", 
-                                    "opLat": 1, 
-                                    "name": "opList17", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList5.opList17", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "SimdFloatMultAcc", 
-                                    "opLat": 1, 
-                                    "name": "opList18", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList5.opList18", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "SimdFloatSqrt", 
-                                    "opLat": 1, 
-                                    "name": "opList19", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList5.opList19", 
-                                    "type": "OpDesc"
-                                }
-                            ], 
-                            "name": "FUList5", 
-                            "eventq_index": 0, 
-                            "cxx_class": "FUDesc", 
-                            "path": "system.cpu.fuPool.FUList5", 
-                            "type": "FUDesc"
-                        }, 
-                        {
-                            "count": 0, 
-                            "opList": [
-                                {
-                                    "opClass": "MemWrite", 
-                                    "opLat": 1, 
-                                    "name": "opList0", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList6.opList0", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "FloatMemWrite", 
-                                    "opLat": 1, 
-                                    "name": "opList1", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList6.opList1", 
-                                    "type": "OpDesc"
-                                }
-                            ], 
-                            "name": "FUList6", 
-                            "eventq_index": 0, 
-                            "cxx_class": "FUDesc", 
-                            "path": "system.cpu.fuPool.FUList6", 
-                            "type": "FUDesc"
-                        }, 
-                        {
-                            "count": 4, 
-                            "opList": [
-                                {
-                                    "opClass": "MemRead", 
-                                    "opLat": 1, 
-                                    "name": "opList0", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList7.opList0", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "MemWrite", 
-                                    "opLat": 1, 
-                                    "name": "opList1", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList7.opList1", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "FloatMemRead", 
-                                    "opLat": 1, 
-                                    "name": "opList2", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList7.opList2", 
-                                    "type": "OpDesc"
-                                }, 
-                                {
-                                    "opClass": "FloatMemWrite", 
-                                    "opLat": 1, 
-                                    "name": "opList3", 
-                                    "pipelined": true, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList7.opList3", 
-                                    "type": "OpDesc"
-                                }
-                            ], 
-                            "name": "FUList7", 
-                            "eventq_index": 0, 
-                            "cxx_class": "FUDesc", 
-                            "path": "system.cpu.fuPool.FUList7", 
-                            "type": "FUDesc"
-                        }, 
-                        {
-                            "count": 1, 
-                            "opList": [
-                                {
-                                    "opClass": "IprAccess", 
-                                    "opLat": 3, 
-                                    "name": "opList", 
-                                    "pipelined": false, 
-                                    "eventq_index": 0, 
-                                    "cxx_class": "OpDesc", 
-                                    "path": "system.cpu.fuPool.FUList8.opList", 
-                                    "type": "OpDesc"
-                                }
-                            ], 
-                            "name": "FUList8", 
-                            "eventq_index": 0, 
-                            "cxx_class": "FUDesc", 
-                            "path": "system.cpu.fuPool.FUList8", 
-                            "type": "FUDesc"
-                        }
-                    ], 
-                    "eventq_index": 0, 
-                    "cxx_class": "FUPool", 
-                    "path": "system.cpu.fuPool", 
-                    "type": "FUPool"
-                }, 
-                "socket_id": 0, 
-                "renameToFetchDelay": 1, 
-                "icache": {
-                    "cpu_side": {
-                        "peer": "system.cpu.icache_port", 
-                        "role": "SLAVE"
-                    }, 
-                    "clusivity": "mostly_incl", 
-                    "prefetcher": null, 
-                    "system": "system", 
-                    "write_buffers": 8, 
-                    "response_latency": 2, 
-                    "cxx_class": "Cache", 
-                    "size": 131072, 
-                    "type": "Cache", 
-                    "clk_domain": "system.cpu_clk_domain", 
-                    "max_miss_count": 0, 
-                    "eventq_index": 0, 
-                    "default_p_state": "UNDEFINED", 
-                    "p_state_clk_gate_max": 1000000000000, 
-                    "mem_side": {
-                        "peer": "system.cpu.toL2Bus.slave[0]", 
-                        "role": "MASTER"
-                    }, 
-                    "mshrs": 4, 
-                    "writeback_clean": true, 
-                    "p_state_clk_gate_min": 1000, 
-                    "tags": {
-                        "size": 131072, 
-                        "tag_latency": 2, 
-                        "name": "tags", 
-                        "p_state_clk_gate_min": 1000, 
-                        "eventq_index": 0, 
-                        "p_state_clk_gate_bins": 20, 
-                        "default_p_state": "UNDEFINED", 
-                        "clk_domain": "system.cpu_clk_domain", 
-                        "power_model": null, 
-                        "sequential_access": false, 
-                        "assoc": 2, 
-                        "cxx_class": "LRU", 
-                        "p_state_clk_gate_max": 1000000000000, 
-                        "path": "system.cpu.icache.tags", 
-                        "block_size": 64, 
-                        "type": "LRU", 
-                        "data_latency": 2
-                    }, 
-                    "tgts_per_mshr": 20, 
-                    "demand_mshr_reserve": 1, 
-                    "power_model": null, 
-                    "addr_ranges": [
-                        "0:18446744073709551615:0:0:0:0"
-                    ], 
-                    "is_read_only": true, 
-                    "prefetch_on_access": false, 
-                    "path": "system.cpu.icache", 
-                    "data_latency": 2, 
-                    "tag_latency": 2, 
-                    "name": "icache", 
-                    "p_state_clk_gate_bins": 20, 
-                    "sequential_access": false, 
-                    "assoc": 2
-                }, 
-                "path": "system.cpu", 
-                "numRobs": 1, 
-                "switched_out": false, 
-                "smtLSQPolicy": "Partitioned", 
-                "fetchBufferSize": 64, 
-                "wait_for_remote_gdb": false, 
-                "cacheStorePorts": 200, 
-                "simpoint_start_insts": [], 
-                "max_insts_any_thread": 0, 
-                "smtROBThreshold": 100, 
-                "numIQEntries": 64, 
-                "branchPred": {
-                    "numThreads": 1, 
-                    "BTBEntries": 4096, 
-                    "cxx_class": "TournamentBP", 
-                    "indirectPathLength": 3, 
-                    "globalCtrBits": 2, 
-                    "choicePredictorSize": 8192, 
-                    "indirectHashGHR": true, 
-                    "eventq_index": 0, 
-                    "localHistoryTableSize": 2048, 
-                    "type": "TournamentBP", 
-                    "indirectSets": 256, 
-                    "indirectWays": 2, 
-                    "choiceCtrBits": 2, 
-                    "useIndirect": true, 
-                    "localCtrBits": 2, 
-                    "path": "system.cpu.branchPred", 
-                    "localPredictorSize": 2048, 
-                    "RASSize": 16, 
-                    "globalPredictorSize": 8192, 
-                    "name": "branchPred", 
-                    "indirectHashTargets": true, 
-                    "instShiftAmt": 2, 
-                    "indirectTagSize": 16, 
-                    "BTBTagSize": 16
-                }, 
-                "LFSTSize": 1024, 
-                "isa": [
-                    {
-                        "eventq_index": 0, 
-                        "path": "system.cpu.isa", 
-                        "type": "RiscvISA", 
-                        "name": "isa", 
-                        "cxx_class": "RiscvISA::ISA"
-                    }
-                ], 
-                "smtROBPolicy": "Partitioned", 
-                "iewToFetchDelay": 1, 
-                "do_statistics_insts": true, 
-                "dispatchWidth": 8, 
-                "dcache": {
-                    "cpu_side": {
-                        "peer": "system.cpu.dcache_port", 
-                        "role": "SLAVE"
-                    }, 
-                    "clusivity": "mostly_incl", 
-                    "prefetcher": null, 
-                    "system": "system", 
-                    "write_buffers": 8, 
-                    "response_latency": 2, 
-                    "cxx_class": "Cache", 
-                    "size": 262144, 
-                    "type": "Cache", 
-                    "clk_domain": "system.cpu_clk_domain", 
-                    "max_miss_count": 0, 
-                    "eventq_index": 0, 
-                    "default_p_state": "UNDEFINED", 
-                    "p_state_clk_gate_max": 1000000000000, 
-                    "mem_side": {
-                        "peer": "system.cpu.toL2Bus.slave[1]", 
-                        "role": "MASTER"
-                    }, 
-                    "mshrs": 4, 
-                    "writeback_clean": false, 
-                    "p_state_clk_gate_min": 1000, 
-                    "tags": {
-                        "size": 262144, 
-                        "tag_latency": 2, 
-                        "name": "tags", 
-                        "p_state_clk_gate_min": 1000, 
-                        "eventq_index": 0, 
-                        "p_state_clk_gate_bins": 20, 
-                        "default_p_state": "UNDEFINED", 
-                        "clk_domain": "system.cpu_clk_domain", 
-                        "power_model": null, 
-                        "sequential_access": false, 
-                        "assoc": 2, 
-                        "cxx_class": "LRU", 
-                        "p_state_clk_gate_max": 1000000000000, 
-                        "path": "system.cpu.dcache.tags", 
-                        "block_size": 64, 
-                        "type": "LRU", 
-                        "data_latency": 2
-                    }, 
-                    "tgts_per_mshr": 20, 
-                    "demand_mshr_reserve": 1, 
-                    "power_model": null, 
-                    "addr_ranges": [
-                        "0:18446744073709551615:0:0:0:0"
-                    ], 
-                    "is_read_only": false, 
-                    "prefetch_on_access": false, 
-                    "path": "system.cpu.dcache", 
-                    "data_latency": 2, 
-                    "tag_latency": 2, 
-                    "name": "dcache", 
-                    "p_state_clk_gate_bins": 20, 
-                    "sequential_access": false, 
-                    "assoc": 2
-                }, 
-                "commitToDecodeDelay": 1, 
-                "smtIQPolicy": "Partitioned", 
-                "issueWidth": 8, 
-                "LSQCheckLoads": true, 
-                "commitToRenameDelay": 1, 
-                "system": "system", 
-                "checker": null, 
-                "numPhysFloatRegs": 256, 
-                "eventq_index": 0, 
-                "default_p_state": "UNDEFINED", 
-                "type": "DerivO3CPU", 
-                "wbWidth": 8, 
-                "numPhysVecRegs": 256, 
-                "interrupts": [
-                    {
-                        "eventq_index": 0, 
-                        "path": "system.cpu.interrupts", 
-                        "type": "RiscvInterrupts", 
-                        "name": "interrupts", 
-                        "cxx_class": "RiscvISA::Interrupts"
-                    }
-                ], 
-                "smtCommitPolicy": "RoundRobin", 
-                "issueToExecuteDelay": 1, 
-                "dtb": {
-                    "name": "dtb", 
-                    "eventq_index": 0, 
-                    "cxx_class": "RiscvISA::TLB", 
-                    "path": "system.cpu.dtb", 
-                    "type": "RiscvTLB", 
-                    "size": 64
-                }, 
-                "numROBEntries": 192, 
-                "fetchQueueSize": 32, 
-                "iewToCommitDelay": 1, 
-                "smtNumFetchingThreads": 1, 
-                "forwardComSize": 5, 
-                "do_checkpoint_insts": true, 
-                "cxx_class": "DerivO3CPU", 
-                "commitToIEWDelay": 1, 
-                "commitWidth": 8, 
-                "clk_domain": "system.cpu_clk_domain", 
-                "function_trace_start": 0, 
-                "smtFetchPolicy": "SingleThread", 
-                "profile": 0, 
-                "icache_port": {
-                    "peer": "system.cpu.icache.cpu_side", 
-                    "role": "MASTER"
-                }, 
-                "dcache_port": {
-                    "peer": "system.cpu.dcache.cpu_side", 
-                    "role": "MASTER"
-                }, 
-                "LSQDepCheckShift": 4, 
-                "trapLatency": 13, 
-                "iewToDecodeDelay": 1, 
-                "numPhysCCRegs": 0, 
-                "renameToIEWDelay": 2, 
-                "p_state_clk_gate_bins": 20, 
-                "progress_interval": 0, 
-                "LQEntries": 32
-            }
-        ], 
-        "multi_thread": false, 
-        "exit_on_work_items": false, 
-        "work_item_id": -1, 
-        "num_work_ids": 16
-    }, 
-    "time_sync_period": 100000000000, 
-    "eventq_index": 0, 
-    "time_sync_spin_threshold": 100000000, 
-    "cxx_class": "Root", 
-    "path": "root", 
-    "time_sync_enable": false, 
-    "type": "Root", 
-    "full_system": false
-}
\ No newline at end of file
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/o3-timing/simerr b/tests/quick/se/00.hello/ref/riscv/linux/o3-timing/simerr
deleted file mode 100755 (executable)
index 418a5c3..0000000
+++ /dev/null
@@ -1,6 +0,0 @@
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-info: Entering event queue @ 0.  Starting simulation...
-warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings.
-      Returning '/home/ar4jc/gem5/tests/test-progs/hello/bin/riscv/linux/hello'
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/riscv/linux/o3-timing/simout
deleted file mode 100755 (executable)
index 5f5e69f..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/o3-timing/simout
-Redirecting stderr to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/o3-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Jul 13 2017 17:37:52
-gem5 started Jul 13 2017 18:03:36
-gem5 executing on boldrock, pid 21571
-command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/o3-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/00.hello/riscv/linux/o3-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 22347000 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/riscv/linux/o3-timing/stats.txt
deleted file mode 100644 (file)
index 7913f04..0000000
+++ /dev/null
@@ -1,1026 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000022                      
-sim_ticks                                    22347000                      
-final_tick                                   22347000                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                  10860                      
-host_op_rate                                    10877                      
-host_tick_rate                               43710468                      
-host_mem_usage                                 261260                      
-host_seconds                                     0.51                      
-sim_insts                                        5552                      
-sim_ops                                          5561                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED     22347000                      
-system.physmem.bytes_read::cpu.inst             19776                      
-system.physmem.bytes_read::cpu.data              9344                      
-system.physmem.bytes_read::total                29120                      
-system.physmem.bytes_inst_read::cpu.inst        19776                      
-system.physmem.bytes_inst_read::total           19776                      
-system.physmem.num_reads::cpu.inst                309                      
-system.physmem.num_reads::cpu.data                146                      
-system.physmem.num_reads::total                   455                      
-system.physmem.bw_read::cpu.inst            884951000                      
-system.physmem.bw_read::cpu.data            418132188                      
-system.physmem.bw_read::total              1303083188                      
-system.physmem.bw_inst_read::cpu.inst       884951000                      
-system.physmem.bw_inst_read::total          884951000                      
-system.physmem.bw_total::cpu.inst           884951000                      
-system.physmem.bw_total::cpu.data           418132188                      
-system.physmem.bw_total::total             1303083188                      
-system.physmem.readReqs                           455                      
-system.physmem.writeReqs                            0                      
-system.physmem.readBursts                         455                      
-system.physmem.writeBursts                          0                      
-system.physmem.bytesReadDRAM                    29120                      
-system.physmem.bytesReadWrQ                         0                      
-system.physmem.bytesWritten                         0                      
-system.physmem.bytesReadSys                     29120                      
-system.physmem.bytesWrittenSys                      0                      
-system.physmem.servicedByWrQ                        0                      
-system.physmem.mergedWrBursts                       0                      
-system.physmem.neitherReadNorWriteReqs              0                      
-system.physmem.perBankRdBursts::0                  32                      
-system.physmem.perBankRdBursts::1                   0                      
-system.physmem.perBankRdBursts::2                  32                      
-system.physmem.perBankRdBursts::3                  19                      
-system.physmem.perBankRdBursts::4                  64                      
-system.physmem.perBankRdBursts::5                  93                      
-system.physmem.perBankRdBursts::6                  68                      
-system.physmem.perBankRdBursts::7                  54                      
-system.physmem.perBankRdBursts::8                  56                      
-system.physmem.perBankRdBursts::9                  30                      
-system.physmem.perBankRdBursts::10                  0                      
-system.physmem.perBankRdBursts::11                  2                      
-system.physmem.perBankRdBursts::12                  2                      
-system.physmem.perBankRdBursts::13                  2                      
-system.physmem.perBankRdBursts::14                  1                      
-system.physmem.perBankRdBursts::15                  0                      
-system.physmem.perBankWrBursts::0                   0                      
-system.physmem.perBankWrBursts::1                   0                      
-system.physmem.perBankWrBursts::2                   0                      
-system.physmem.perBankWrBursts::3                   0                      
-system.physmem.perBankWrBursts::4                   0                      
-system.physmem.perBankWrBursts::5                   0                      
-system.physmem.perBankWrBursts::6                   0                      
-system.physmem.perBankWrBursts::7                   0                      
-system.physmem.perBankWrBursts::8                   0                      
-system.physmem.perBankWrBursts::9                   0                      
-system.physmem.perBankWrBursts::10                  0                      
-system.physmem.perBankWrBursts::11                  0                      
-system.physmem.perBankWrBursts::12                  0                      
-system.physmem.perBankWrBursts::13                  0                      
-system.physmem.perBankWrBursts::14                  0                      
-system.physmem.perBankWrBursts::15                  0                      
-system.physmem.numRdRetry                           0                      
-system.physmem.numWrRetry                           0                      
-system.physmem.totGap                        22262000                      
-system.physmem.readPktSize::0                       0                      
-system.physmem.readPktSize::1                       0                      
-system.physmem.readPktSize::2                       0                      
-system.physmem.readPktSize::3                       0                      
-system.physmem.readPktSize::4                       0                      
-system.physmem.readPktSize::5                       0                      
-system.physmem.readPktSize::6                     455                      
-system.physmem.writePktSize::0                      0                      
-system.physmem.writePktSize::1                      0                      
-system.physmem.writePktSize::2                      0                      
-system.physmem.writePktSize::3                      0                      
-system.physmem.writePktSize::4                      0                      
-system.physmem.writePktSize::5                      0                      
-system.physmem.writePktSize::6                      0                      
-system.physmem.rdQLenPdf::0                       236                      
-system.physmem.rdQLenPdf::1                       133                      
-system.physmem.rdQLenPdf::2                        60                      
-system.physmem.rdQLenPdf::3                        17                      
-system.physmem.rdQLenPdf::4                         6                      
-system.physmem.rdQLenPdf::5                         3                      
-system.physmem.rdQLenPdf::6                         0                      
-system.physmem.rdQLenPdf::7                         0                      
-system.physmem.rdQLenPdf::8                         0                      
-system.physmem.rdQLenPdf::9                         0                      
-system.physmem.rdQLenPdf::10                        0                      
-system.physmem.rdQLenPdf::11                        0                      
-system.physmem.rdQLenPdf::12                        0                      
-system.physmem.rdQLenPdf::13                        0                      
-system.physmem.rdQLenPdf::14                        0                      
-system.physmem.rdQLenPdf::15                        0                      
-system.physmem.rdQLenPdf::16                        0                      
-system.physmem.rdQLenPdf::17                        0                      
-system.physmem.rdQLenPdf::18                        0                      
-system.physmem.rdQLenPdf::19                        0                      
-system.physmem.rdQLenPdf::20                        0                      
-system.physmem.rdQLenPdf::21                        0                      
-system.physmem.rdQLenPdf::22                        0                      
-system.physmem.rdQLenPdf::23                        0                      
-system.physmem.rdQLenPdf::24                        0                      
-system.physmem.rdQLenPdf::25                        0                      
-system.physmem.rdQLenPdf::26                        0                      
-system.physmem.rdQLenPdf::27                        0                      
-system.physmem.rdQLenPdf::28                        0                      
-system.physmem.rdQLenPdf::29                        0                      
-system.physmem.rdQLenPdf::30                        0                      
-system.physmem.rdQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::0                         0                      
-system.physmem.wrQLenPdf::1                         0                      
-system.physmem.wrQLenPdf::2                         0                      
-system.physmem.wrQLenPdf::3                         0                      
-system.physmem.wrQLenPdf::4                         0                      
-system.physmem.wrQLenPdf::5                         0                      
-system.physmem.wrQLenPdf::6                         0                      
-system.physmem.wrQLenPdf::7                         0                      
-system.physmem.wrQLenPdf::8                         0                      
-system.physmem.wrQLenPdf::9                         0                      
-system.physmem.wrQLenPdf::10                        0                      
-system.physmem.wrQLenPdf::11                        0                      
-system.physmem.wrQLenPdf::12                        0                      
-system.physmem.wrQLenPdf::13                        0                      
-system.physmem.wrQLenPdf::14                        0                      
-system.physmem.wrQLenPdf::15                        0                      
-system.physmem.wrQLenPdf::16                        0                      
-system.physmem.wrQLenPdf::17                        0                      
-system.physmem.wrQLenPdf::18                        0                      
-system.physmem.wrQLenPdf::19                        0                      
-system.physmem.wrQLenPdf::20                        0                      
-system.physmem.wrQLenPdf::21                        0                      
-system.physmem.wrQLenPdf::22                        0                      
-system.physmem.wrQLenPdf::23                        0                      
-system.physmem.wrQLenPdf::24                        0                      
-system.physmem.wrQLenPdf::25                        0                      
-system.physmem.wrQLenPdf::26                        0                      
-system.physmem.wrQLenPdf::27                        0                      
-system.physmem.wrQLenPdf::28                        0                      
-system.physmem.wrQLenPdf::29                        0                      
-system.physmem.wrQLenPdf::30                        0                      
-system.physmem.wrQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::32                        0                      
-system.physmem.wrQLenPdf::33                        0                      
-system.physmem.wrQLenPdf::34                        0                      
-system.physmem.wrQLenPdf::35                        0                      
-system.physmem.wrQLenPdf::36                        0                      
-system.physmem.wrQLenPdf::37                        0                      
-system.physmem.wrQLenPdf::38                        0                      
-system.physmem.wrQLenPdf::39                        0                      
-system.physmem.wrQLenPdf::40                        0                      
-system.physmem.wrQLenPdf::41                        0                      
-system.physmem.wrQLenPdf::42                        0                      
-system.physmem.wrQLenPdf::43                        0                      
-system.physmem.wrQLenPdf::44                        0                      
-system.physmem.wrQLenPdf::45                        0                      
-system.physmem.wrQLenPdf::46                        0                      
-system.physmem.wrQLenPdf::47                        0                      
-system.physmem.wrQLenPdf::48                        0                      
-system.physmem.wrQLenPdf::49                        0                      
-system.physmem.wrQLenPdf::50                        0                      
-system.physmem.wrQLenPdf::51                        0                      
-system.physmem.wrQLenPdf::52                        0                      
-system.physmem.wrQLenPdf::53                        0                      
-system.physmem.wrQLenPdf::54                        0                      
-system.physmem.wrQLenPdf::55                        0                      
-system.physmem.wrQLenPdf::56                        0                      
-system.physmem.wrQLenPdf::57                        0                      
-system.physmem.wrQLenPdf::58                        0                      
-system.physmem.wrQLenPdf::59                        0                      
-system.physmem.wrQLenPdf::60                        0                      
-system.physmem.wrQLenPdf::61                        0                      
-system.physmem.wrQLenPdf::62                        0                      
-system.physmem.wrQLenPdf::63                        0                      
-system.physmem.bytesPerActivate::samples          100                      
-system.physmem.bytesPerActivate::mean      271.360000                      
-system.physmem.bytesPerActivate::gmean     169.923942                      
-system.physmem.bytesPerActivate::stdev     289.967867                      
-system.physmem.bytesPerActivate::0-127             35     35.00%     35.00%
-system.physmem.bytesPerActivate::128-255           30     30.00%     65.00%
-system.physmem.bytesPerActivate::256-383           11     11.00%     76.00%
-system.physmem.bytesPerActivate::384-511            6      6.00%     82.00%
-system.physmem.bytesPerActivate::512-639            4      4.00%     86.00%
-system.physmem.bytesPerActivate::640-767            3      3.00%     89.00%
-system.physmem.bytesPerActivate::768-895            2      2.00%     91.00%
-system.physmem.bytesPerActivate::896-1023            2      2.00%     93.00%
-system.physmem.bytesPerActivate::1024-1151            7      7.00%    100.00%
-system.physmem.bytesPerActivate::total            100                      
-system.physmem.totQLat                        7985750                      
-system.physmem.totMemAccLat                  16517000                      
-system.physmem.totBusLat                      2275000                      
-system.physmem.avgQLat                       17551.10                      
-system.physmem.avgBusLat                      5000.00                      
-system.physmem.avgMemAccLat                  36301.10                      
-system.physmem.avgRdBW                        1303.08                      
-system.physmem.avgWrBW                           0.00                      
-system.physmem.avgRdBWSys                     1303.08                      
-system.physmem.avgWrBWSys                        0.00                      
-system.physmem.peakBW                        12800.00                      
-system.physmem.busUtil                          10.18                      
-system.physmem.busUtilRead                      10.18                      
-system.physmem.busUtilWrite                      0.00                      
-system.physmem.avgRdQLen                         1.85                      
-system.physmem.avgWrQLen                         0.00                      
-system.physmem.readRowHits                        345                      
-system.physmem.writeRowHits                         0                      
-system.physmem.readRowHitRate                   75.82                      
-system.physmem.writeRowHitRate                    nan                      
-system.physmem.avgGap                        48927.47                      
-system.physmem.pageHitRate                      75.82                      
-system.physmem_0.actEnergy                     628320                      
-system.physmem_0.preEnergy                     307395                      
-system.physmem_0.readEnergy                   2584680                      
-system.physmem_0.writeEnergy                        0                      
-system.physmem_0.refreshEnergy           1229280.000000                      
-system.physmem_0.actBackEnergy                4082340                      
-system.physmem_0.preBackEnergy                  28320                      
-system.physmem_0.actPowerDownEnergy           6073920                      
-system.physmem_0.prePowerDownEnergy               480                      
-system.physmem_0.selfRefreshEnergy                  0                      
-system.physmem_0.totalEnergy                 14934735                      
-system.physmem_0.averagePower              668.295559                      
-system.physmem_0.totalIdleTime               13169250                      
-system.physmem_0.memoryStateTime::IDLE          17500                      
-system.physmem_0.memoryStateTime::REF          520000                      
-system.physmem_0.memoryStateTime::SREF              0                      
-system.physmem_0.memoryStateTime::PRE_PDN         1250                      
-system.physmem_0.memoryStateTime::ACT         8498250                      
-system.physmem_0.memoryStateTime::ACT_PDN     13310000                      
-system.physmem_1.actEnergy                     157080                      
-system.physmem_1.preEnergy                      72105                      
-system.physmem_1.readEnergy                    664020                      
-system.physmem_1.writeEnergy                        0                      
-system.physmem_1.refreshEnergy           1229280.000000                      
-system.physmem_1.actBackEnergy                1349190                      
-system.physmem_1.preBackEnergy                 207840                      
-system.physmem_1.actPowerDownEnergy           8004510                      
-system.physmem_1.prePowerDownEnergy            496800                      
-system.physmem_1.selfRefreshEnergy                  0                      
-system.physmem_1.totalEnergy                 12180825                      
-system.physmem_1.averagePower              545.064325                      
-system.physmem_1.totalIdleTime               18795500                      
-system.physmem_1.memoryStateTime::IDLE         472250                      
-system.physmem_1.memoryStateTime::REF          520000                      
-system.physmem_1.memoryStateTime::SREF              0                      
-system.physmem_1.memoryStateTime::PRE_PDN      1293000                      
-system.physmem_1.memoryStateTime::ACT         2510500                      
-system.physmem_1.memoryStateTime::ACT_PDN     17551250                      
-system.pwrStateResidencyTicks::UNDEFINED     22347000                      
-system.cpu.branchPred.lookups                    2633                      
-system.cpu.branchPred.condPredicted              1922                      
-system.cpu.branchPred.condIncorrect               704                      
-system.cpu.branchPred.BTBLookups                 2323                      
-system.cpu.branchPred.BTBHits                     541                      
-system.cpu.branchPred.BTBCorrect                    0                      
-system.cpu.branchPred.BTBHitPct             23.288851                      
-system.cpu.branchPred.usedRAS                       0                      
-system.cpu.branchPred.RASInCorrect                  0                      
-system.cpu.branchPred.indirectLookups             470                      
-system.cpu.branchPred.indirectHits                 45                      
-system.cpu.branchPred.indirectMisses              425                      
-system.cpu.branchPredindirectMispredicted          203                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.workload.numSyscalls                     9                      
-system.cpu.pwrStateResidencyTicks::ON        22347000                      
-system.cpu.numCycles                            44695                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.fetch.icacheStallCycles               7412                      
-system.cpu.fetch.Insts                          11116                      
-system.cpu.fetch.Branches                        2633                      
-system.cpu.fetch.predictedBranches                586                      
-system.cpu.fetch.Cycles                          8264                      
-system.cpu.fetch.SquashCycles                    1434                      
-system.cpu.fetch.MiscStallCycles                    3                      
-system.cpu.fetch.IcacheWaitRetryStallCycles           53                      
-system.cpu.fetch.CacheLines                      1371                      
-system.cpu.fetch.IcacheSquashes                   238                      
-system.cpu.fetch.rateDist::samples              16449                      
-system.cpu.fetch.rateDist::mean              0.677062                      
-system.cpu.fetch.rateDist::stdev             1.083698                      
-system.cpu.fetch.rateDist::underflows               0      0.00%      0.00%
-system.cpu.fetch.rateDist::0                     9314     56.62%     56.62%
-system.cpu.fetch.rateDist::1                     5053     30.72%     87.34%
-system.cpu.fetch.rateDist::2                     1133      6.89%     94.23%
-system.cpu.fetch.rateDist::3                      492      2.99%     97.22%
-system.cpu.fetch.rateDist::4                      212      1.29%     98.51%
-system.cpu.fetch.rateDist::5                      105      0.64%     99.15%
-system.cpu.fetch.rateDist::6                       66      0.40%     99.55%
-system.cpu.fetch.rateDist::7                       19      0.12%     99.67%
-system.cpu.fetch.rateDist::8                       55      0.33%    100.00%
-system.cpu.fetch.rateDist::overflows                0      0.00%    100.00%
-system.cpu.fetch.rateDist::min_value                0                      
-system.cpu.fetch.rateDist::max_value                8                      
-system.cpu.fetch.rateDist::total                16449                      
-system.cpu.fetch.branchRate                  0.058910                      
-system.cpu.fetch.rate                        0.248708                      
-system.cpu.decode.IdleCycles                     6659                      
-system.cpu.decode.BlockedCycles                  3259                      
-system.cpu.decode.RunCycles                      5898                      
-system.cpu.decode.UnblockCycles                    97                      
-system.cpu.decode.SquashCycles                    536                      
-system.cpu.decode.BranchResolved                  583                      
-system.cpu.decode.BranchMispred                   193                      
-system.cpu.decode.DecodedInsts                   9866                      
-system.cpu.decode.SquashedInsts                   251                      
-system.cpu.rename.SquashCycles                    536                      
-system.cpu.rename.IdleCycles                     7139                      
-system.cpu.rename.BlockCycles                     517                      
-system.cpu.rename.serializeStallCycles           1672                      
-system.cpu.rename.RunCycles                      5505                      
-system.cpu.rename.UnblockCycles                  1080                      
-system.cpu.rename.RenamedInsts                   9269                      
-system.cpu.rename.IQFullEvents                      3                      
-system.cpu.rename.SQFullEvents                   1060                      
-system.cpu.rename.RenamedOperands                5973                      
-system.cpu.rename.RenameLookups                 11207                      
-system.cpu.rename.int_rename_lookups            11195                      
-system.cpu.rename.fp_rename_lookups                12                      
-system.cpu.rename.CommittedMaps                  3414                      
-system.cpu.rename.UndoneMaps                     2559                      
-system.cpu.rename.serializingInsts                 30                      
-system.cpu.rename.tempSerializingInsts             30                      
-system.cpu.rename.skidInsts                       310                      
-system.cpu.memDep0.insertedLoads                 1637                      
-system.cpu.memDep0.insertedStores                1317                      
-system.cpu.memDep0.conflictingLoads                 6                      
-system.cpu.memDep0.conflictingStores                1                      
-system.cpu.iq.iqInstsAdded                       8273                      
-system.cpu.iq.iqNonSpecInstsAdded                  44                      
-system.cpu.iq.iqInstsIssued                      7695                      
-system.cpu.iq.iqSquashedInstsIssued                46                      
-system.cpu.iq.iqSquashedInstsExamined            2754                      
-system.cpu.iq.iqSquashedOperandsExamined         1297                      
-system.cpu.iq.iqSquashedNonSpecRemoved             16                      
-system.cpu.iq.issued_per_cycle::samples         16449                      
-system.cpu.iq.issued_per_cycle::mean         0.467810                      
-system.cpu.iq.issued_per_cycle::stdev        0.872432                      
-system.cpu.iq.issued_per_cycle::underflows            0      0.00%      0.00%
-system.cpu.iq.issued_per_cycle::0               11408     69.35%     69.35%
-system.cpu.iq.issued_per_cycle::1                3326     20.22%     89.57%
-system.cpu.iq.issued_per_cycle::2                1145      6.96%     96.53%
-system.cpu.iq.issued_per_cycle::3                 340      2.07%     98.60%
-system.cpu.iq.issued_per_cycle::4                 157      0.95%     99.56%
-system.cpu.iq.issued_per_cycle::5                  38      0.23%     99.79%
-system.cpu.iq.issued_per_cycle::6                  18      0.11%     99.90%
-system.cpu.iq.issued_per_cycle::7                   3      0.02%     99.91%
-system.cpu.iq.issued_per_cycle::8                  14      0.09%    100.00%
-system.cpu.iq.issued_per_cycle::overflows            0      0.00%    100.00%
-system.cpu.iq.issued_per_cycle::min_value            0                      
-system.cpu.iq.issued_per_cycle::max_value            8                      
-system.cpu.iq.issued_per_cycle::total           16449                      
-system.cpu.iq.fu_full::No_OpClass                   0      0.00%      0.00%
-system.cpu.iq.fu_full::IntAlu                       6     27.27%     27.27%
-system.cpu.iq.fu_full::IntMult                      0      0.00%     27.27%
-system.cpu.iq.fu_full::IntDiv                       0      0.00%     27.27%
-system.cpu.iq.fu_full::FloatAdd                     0      0.00%     27.27%
-system.cpu.iq.fu_full::FloatCmp                     0      0.00%     27.27%
-system.cpu.iq.fu_full::FloatCvt                     0      0.00%     27.27%
-system.cpu.iq.fu_full::FloatMult                    0      0.00%     27.27%
-system.cpu.iq.fu_full::FloatMultAcc                 0      0.00%     27.27%
-system.cpu.iq.fu_full::FloatDiv                     0      0.00%     27.27%
-system.cpu.iq.fu_full::FloatMisc                    0      0.00%     27.27%
-system.cpu.iq.fu_full::FloatSqrt                    0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdAdd                      0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdAddAcc                   0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdAlu                      0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdCmp                      0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdCvt                      0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdMisc                     0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdMult                     0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdMultAcc                  0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdShift                    0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdShiftAcc                 0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdSqrt                     0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdFloatAdd                 0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdFloatAlu                 0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdFloatCmp                 0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdFloatCvt                 0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdFloatDiv                 0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdFloatMisc                0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdFloatMult                0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdFloatMultAcc             0      0.00%     27.27%
-system.cpu.iq.fu_full::SimdFloatSqrt                0      0.00%     27.27%
-system.cpu.iq.fu_full::MemRead                      6     27.27%     54.55%
-system.cpu.iq.fu_full::MemWrite                     8     36.36%     90.91%
-system.cpu.iq.fu_full::FloatMemRead                 0      0.00%     90.91%
-system.cpu.iq.fu_full::FloatMemWrite                2      9.09%    100.00%
-system.cpu.iq.fu_full::IprAccess                    0      0.00%    100.00%
-system.cpu.iq.fu_full::InstPrefetch                 0      0.00%    100.00%
-system.cpu.iq.FU_type_0::No_OpClass                10      0.13%      0.13%
-system.cpu.iq.FU_type_0::IntAlu                  4809     62.50%     62.63%
-system.cpu.iq.FU_type_0::IntMult                    3      0.04%     62.66%
-system.cpu.iq.FU_type_0::IntDiv                     6      0.08%     62.74%
-system.cpu.iq.FU_type_0::FloatAdd                   0      0.00%     62.74%
-system.cpu.iq.FU_type_0::FloatCmp                   0      0.00%     62.74%
-system.cpu.iq.FU_type_0::FloatCvt                   0      0.00%     62.74%
-system.cpu.iq.FU_type_0::FloatMult                  0      0.00%     62.74%
-system.cpu.iq.FU_type_0::FloatMultAcc               0      0.00%     62.74%
-system.cpu.iq.FU_type_0::FloatDiv                   0      0.00%     62.74%
-system.cpu.iq.FU_type_0::FloatMisc                  0      0.00%     62.74%
-system.cpu.iq.FU_type_0::FloatSqrt                  0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdAdd                    0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdAddAcc                 0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdAlu                    0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdCmp                    0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdCvt                    0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdMisc                   0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdMult                   0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdMultAcc                0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdShift                  0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdShiftAcc               0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdSqrt                   0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdFloatAdd               0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdFloatAlu               0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdFloatCmp               0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdFloatCvt               0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdFloatDiv               0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdFloatMisc              0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdFloatMult              0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdFloatMultAcc            0      0.00%     62.74%
-system.cpu.iq.FU_type_0::SimdFloatSqrt              0      0.00%     62.74%
-system.cpu.iq.FU_type_0::MemRead                 1600     20.79%     83.53%
-system.cpu.iq.FU_type_0::MemWrite                1255     16.31%     99.84%
-system.cpu.iq.FU_type_0::FloatMemRead               0      0.00%     99.84%
-system.cpu.iq.FU_type_0::FloatMemWrite             12      0.16%    100.00%
-system.cpu.iq.FU_type_0::IprAccess                  0      0.00%    100.00%
-system.cpu.iq.FU_type_0::InstPrefetch               0      0.00%    100.00%
-system.cpu.iq.FU_type_0::total                   7695                      
-system.cpu.iq.rate                           0.172167                      
-system.cpu.iq.fu_busy_cnt                          22                      
-system.cpu.iq.fu_busy_rate                   0.002859                      
-system.cpu.iq.int_inst_queue_reads              31881                      
-system.cpu.iq.int_inst_queue_writes             11063                      
-system.cpu.iq.int_inst_queue_wakeup_accesses         6953                      
-system.cpu.iq.fp_inst_queue_reads                  26                      
-system.cpu.iq.fp_inst_queue_writes                 12                      
-system.cpu.iq.fp_inst_queue_wakeup_accesses           12                      
-system.cpu.iq.int_alu_accesses                   7693                      
-system.cpu.iq.fp_alu_accesses                      14                      
-system.cpu.iew.lsq.thread0.forwLoads               12                      
-system.cpu.iew.lsq.thread0.invAddrLoads             0                      
-system.cpu.iew.lsq.thread0.squashedLoads          555                      
-system.cpu.iew.lsq.thread0.ignoredResponses            3                      
-system.cpu.iew.lsq.thread0.memOrderViolation            4                      
-system.cpu.iew.lsq.thread0.squashedStores          237                      
-system.cpu.iew.lsq.thread0.invAddrSwpfs             0                      
-system.cpu.iew.lsq.thread0.blockedLoads             0                      
-system.cpu.iew.lsq.thread0.rescheduledLoads            0                      
-system.cpu.iew.lsq.thread0.cacheBlocked            44                      
-system.cpu.iew.iewIdleCycles                        0                      
-system.cpu.iew.iewSquashCycles                    536                      
-system.cpu.iew.iewBlockCycles                     495                      
-system.cpu.iew.iewUnblockCycles                    23                      
-system.cpu.iew.iewDispatchedInsts                8316                      
-system.cpu.iew.iewDispSquashedInsts               371                      
-system.cpu.iew.iewDispLoadInsts                  1637                      
-system.cpu.iew.iewDispStoreInsts                 1317                      
-system.cpu.iew.iewDispNonSpecInsts                 43                      
-system.cpu.iew.iewIQFullEvents                      1                      
-system.cpu.iew.iewLSQFullEvents                    18                      
-system.cpu.iew.memOrderViolationEvents              4                      
-system.cpu.iew.predictedTakenIncorrect             84                      
-system.cpu.iew.predictedNotTakenIncorrect          500                      
-system.cpu.iew.branchMispredicts                  584                      
-system.cpu.iew.iewExecutedInsts                  7197                      
-system.cpu.iew.iewExecLoadInsts                  1495                      
-system.cpu.iew.iewExecSquashedInsts               498                      
-system.cpu.iew.exec_swp                             0                      
-system.cpu.iew.exec_nop                             0                      
-system.cpu.iew.exec_refs                         2700                      
-system.cpu.iew.exec_branches                     1576                      
-system.cpu.iew.exec_stores                       1205                      
-system.cpu.iew.exec_rate                     0.161025                      
-system.cpu.iew.wb_sent                           7014                      
-system.cpu.iew.wb_count                          6965                      
-system.cpu.iew.wb_producers                      2327                      
-system.cpu.iew.wb_consumers                      3059                      
-system.cpu.iew.wb_rate                       0.155834                      
-system.cpu.iew.wb_fanout                     0.760706                      
-system.cpu.commit.commitSquashedInsts            2754                      
-system.cpu.commit.commitNonSpecStalls              27                      
-system.cpu.commit.branchMispredicts               523                      
-system.cpu.commit.committed_per_cycle::samples        15734                      
-system.cpu.commit.committed_per_cycle::mean     0.353438                      
-system.cpu.commit.committed_per_cycle::stdev     0.944985                      
-system.cpu.commit.committed_per_cycle::underflows            0      0.00%      0.00%
-system.cpu.commit.committed_per_cycle::0        12701     80.72%     80.72%
-system.cpu.commit.committed_per_cycle::1         1816     11.54%     92.27%
-system.cpu.commit.committed_per_cycle::2          611      3.88%     96.15%
-system.cpu.commit.committed_per_cycle::3          243      1.54%     97.69%
-system.cpu.commit.committed_per_cycle::4          211      1.34%     99.03%
-system.cpu.commit.committed_per_cycle::5           68      0.43%     99.47%
-system.cpu.commit.committed_per_cycle::6           23      0.15%     99.61%
-system.cpu.commit.committed_per_cycle::7           16      0.10%     99.71%
-system.cpu.commit.committed_per_cycle::8           45      0.29%    100.00%
-system.cpu.commit.committed_per_cycle::overflows            0      0.00%    100.00%
-system.cpu.commit.committed_per_cycle::min_value            0                      
-system.cpu.commit.committed_per_cycle::max_value            8                      
-system.cpu.commit.committed_per_cycle::total        15734                      
-system.cpu.commit.committedInsts                 5552                      
-system.cpu.commit.committedOps                   5561                      
-system.cpu.commit.swp_count                         0                      
-system.cpu.commit.refs                           2162                      
-system.cpu.commit.loads                          1082                      
-system.cpu.commit.membars                           1                      
-system.cpu.commit.branches                       1196                      
-system.cpu.commit.vec_insts                         0                      
-system.cpu.commit.fp_insts                         12                      
-system.cpu.commit.int_insts                      5498                      
-system.cpu.commit.function_calls                  282                      
-system.cpu.commit.op_class_0::No_OpClass            1      0.02%      0.02%
-system.cpu.commit.op_class_0::IntAlu             3392     61.00%     61.01%
-system.cpu.commit.op_class_0::IntMult               2      0.04%     61.05%
-system.cpu.commit.op_class_0::IntDiv                4      0.07%     61.12%
-system.cpu.commit.op_class_0::FloatAdd              0      0.00%     61.12%
-system.cpu.commit.op_class_0::FloatCmp              0      0.00%     61.12%
-system.cpu.commit.op_class_0::FloatCvt              0      0.00%     61.12%
-system.cpu.commit.op_class_0::FloatMult             0      0.00%     61.12%
-system.cpu.commit.op_class_0::FloatMultAcc            0      0.00%     61.12%
-system.cpu.commit.op_class_0::FloatDiv              0      0.00%     61.12%
-system.cpu.commit.op_class_0::FloatMisc             0      0.00%     61.12%
-system.cpu.commit.op_class_0::FloatSqrt             0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdAdd               0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdAddAcc            0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdAlu               0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdCmp               0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdCvt               0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdMisc              0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdMult              0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdMultAcc            0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdShift             0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdShiftAcc            0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdSqrt              0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdFloatAdd            0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdFloatAlu            0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdFloatCmp            0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdFloatCvt            0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdFloatDiv            0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdFloatMisc            0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdFloatMult            0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdFloatMultAcc            0      0.00%     61.12%
-system.cpu.commit.op_class_0::SimdFloatSqrt            0      0.00%     61.12%
-system.cpu.commit.op_class_0::MemRead            1082     19.46%     80.58%
-system.cpu.commit.op_class_0::MemWrite           1068     19.21%     99.78%
-system.cpu.commit.op_class_0::FloatMemRead            0      0.00%     99.78%
-system.cpu.commit.op_class_0::FloatMemWrite           12      0.22%    100.00%
-system.cpu.commit.op_class_0::IprAccess             0      0.00%    100.00%
-system.cpu.commit.op_class_0::InstPrefetch            0      0.00%    100.00%
-system.cpu.commit.op_class_0::total              5561                      
-system.cpu.commit.bw_lim_events                    45                      
-system.cpu.rob.rob_reads                        23900                      
-system.cpu.rob.rob_writes                       17354                      
-system.cpu.timesIdled                             215                      
-system.cpu.idleCycles                           28246                      
-system.cpu.committedInsts                        5552                      
-system.cpu.committedOps                          5561                      
-system.cpu.cpi                               8.050252                      
-system.cpu.cpi_total                         8.050252                      
-system.cpu.ipc                               0.124220                      
-system.cpu.ipc_total                         0.124220                      
-system.cpu.int_regfile_reads                     8779                      
-system.cpu.int_regfile_writes                    4373                      
-system.cpu.fp_regfile_reads                        12                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     22347000                      
-system.cpu.dcache.tags.replacements                 0                      
-system.cpu.dcache.tags.tagsinuse            89.806285                      
-system.cpu.dcache.tags.total_refs                1992                      
-system.cpu.dcache.tags.sampled_refs               146                      
-system.cpu.dcache.tags.avg_refs             13.643836                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data    89.806285                      
-system.cpu.dcache.tags.occ_percent::cpu.data     0.021925                      
-system.cpu.dcache.tags.occ_percent::total     0.021925                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024          146                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           39                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::1          107                      
-system.cpu.dcache.tags.occ_task_id_percent::1024     0.035645                      
-system.cpu.dcache.tags.tag_accesses              5160                      
-system.cpu.dcache.tags.data_accesses             5160                      
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     22347000                      
-system.cpu.dcache.ReadReq_hits::cpu.data         1284                      
-system.cpu.dcache.ReadReq_hits::total            1284                      
-system.cpu.dcache.WriteReq_hits::cpu.data          692                      
-system.cpu.dcache.WriteReq_hits::total            692                      
-system.cpu.dcache.LoadLockedReq_hits::cpu.data            8                      
-system.cpu.dcache.LoadLockedReq_hits::total            8                      
-system.cpu.dcache.StoreCondReq_hits::cpu.data            8                      
-system.cpu.dcache.StoreCondReq_hits::total            8                      
-system.cpu.dcache.demand_hits::cpu.data          1976                      
-system.cpu.dcache.demand_hits::total             1976                      
-system.cpu.dcache.overall_hits::cpu.data         1976                      
-system.cpu.dcache.overall_hits::total            1976                      
-system.cpu.dcache.ReadReq_misses::cpu.data          132                      
-system.cpu.dcache.ReadReq_misses::total           132                      
-system.cpu.dcache.WriteReq_misses::cpu.data          380                      
-system.cpu.dcache.WriteReq_misses::total          380                      
-system.cpu.dcache.LoadLockedReq_misses::cpu.data            3                      
-system.cpu.dcache.LoadLockedReq_misses::total            3                      
-system.cpu.dcache.demand_misses::cpu.data          512                      
-system.cpu.dcache.demand_misses::total            512                      
-system.cpu.dcache.overall_misses::cpu.data          512                      
-system.cpu.dcache.overall_misses::total           512                      
-system.cpu.dcache.ReadReq_miss_latency::cpu.data      9750500                      
-system.cpu.dcache.ReadReq_miss_latency::total      9750500                      
-system.cpu.dcache.WriteReq_miss_latency::cpu.data     27630483                      
-system.cpu.dcache.WriteReq_miss_latency::total     27630483                      
-system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data       287500                      
-system.cpu.dcache.LoadLockedReq_miss_latency::total       287500                      
-system.cpu.dcache.demand_miss_latency::cpu.data     37380983                      
-system.cpu.dcache.demand_miss_latency::total     37380983                      
-system.cpu.dcache.overall_miss_latency::cpu.data     37380983                      
-system.cpu.dcache.overall_miss_latency::total     37380983                      
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-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      5474500                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     23296000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data     11953500                      
-system.cpu.l2cache.demand_mshr_miss_latency::total     35249500                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     23296000                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data     11953500                      
-system.cpu.l2cache.overall_mshr_miss_latency::total     35249500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.demand_mshr_miss_rate::total            1                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.overall_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 80987.500000                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 80987.500000                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 75391.585761                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 75391.585761                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 82946.969697                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 82946.969697                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 75391.585761                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 81873.287671                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 77471.428571                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 75391.585761                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 81873.287671                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 77471.428571                      
-system.cpu.toL2Bus.snoop_filter.tot_requests          455                      
-system.cpu.toL2Bus.snoop_filter.hit_single_requests            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0                      
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     22347000                      
-system.cpu.toL2Bus.trans_dist::ReadResp           375                      
-system.cpu.toL2Bus.trans_dist::ReadExReq           80                      
-system.cpu.toL2Bus.trans_dist::ReadExResp           80                      
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          309                      
-system.cpu.toL2Bus.trans_dist::ReadSharedReq           66                      
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          618                      
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          292                      
-system.cpu.toL2Bus.pkt_count::total               910                      
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        19776                      
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         9344                      
-system.cpu.toL2Bus.pkt_size::total              29120                      
-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples          455                      
-system.cpu.toL2Bus.snoop_fanout::mean               0                      
-system.cpu.toL2Bus.snoop_fanout::stdev              0                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0                455    100.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::1                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            0                      
-system.cpu.toL2Bus.snoop_fanout::total            455                      
-system.cpu.toL2Bus.reqLayer0.occupancy         227500                      
-system.cpu.toL2Bus.reqLayer0.utilization          1.0                      
-system.cpu.toL2Bus.respLayer0.occupancy        463500                      
-system.cpu.toL2Bus.respLayer0.utilization          2.1                      
-system.cpu.toL2Bus.respLayer1.occupancy        219000                      
-system.cpu.toL2Bus.respLayer1.utilization          1.0                      
-system.membus.snoop_filter.tot_requests           455                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED     22347000                      
-system.membus.trans_dist::ReadResp                375                      
-system.membus.trans_dist::ReadExReq                80                      
-system.membus.trans_dist::ReadExResp               80                      
-system.membus.trans_dist::ReadSharedReq           375                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          910                      
-system.membus.pkt_count::total                    910                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        29120                      
-system.membus.pkt_size::total                   29120                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples               455                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                     455    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                 455                      
-system.membus.reqLayer0.occupancy              545000                      
-system.membus.reqLayer0.utilization               2.4                      
-system.membus.respLayer1.occupancy            2408250                      
-system.membus.respLayer1.utilization             10.8                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/config.ini
deleted file mode 100644 (file)
index 0932dc0..0000000
+++ /dev/null
@@ -1,214 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=AtomicSimpleCPU
-children=dtb interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-wait_for_remote_gdb=false
-width=1
-workload=system.cpu.workload
-dcache_port=system.membus.slave[2]
-icache_port=system.membus.slave[1]
-
-[system.cpu.dtb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.interrupts]
-type=RiscvInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=RiscvISA
-eventq_index=0
-
-[system.cpu.itb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/config.json b/tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/config.json
deleted file mode 100644 (file)
index 66f9a8b..0000000
+++ /dev/null
@@ -1,292 +0,0 @@
-{
-    "name": null, 
-    "sim_quantum": 0, 
-    "system": {
-        "kernel": "", 
-        "mmap_using_noreserve": false, 
-        "kernel_addr_check": true, 
-        "membus": {
-            "point_of_coherency": true, 
-            "system": "system", 
-            "response_latency": 2, 
-            "cxx_class": "CoherentXBar", 
-            "forward_latency": 4, 
-            "clk_domain": "system.clk_domain", 
-            "width": 16, 
-            "eventq_index": 0, 
-            "default_p_state": "UNDEFINED", 
-            "p_state_clk_gate_max": 1000000000000, 
-            "master": {
-                "peer": [
-                    "system.physmem.port"
-                ], 
-                "role": "MASTER"
-            }, 
-            "type": "CoherentXBar", 
-            "frontend_latency": 3, 
-            "slave": {
-                "peer": [
-                    "system.system_port", 
-                    "system.cpu.icache_port", 
-                    "system.cpu.dcache_port"
-                ], 
-                "role": "SLAVE"
-            }, 
-            "p_state_clk_gate_min": 1000, 
-            "snoop_filter": {
-                "name": "snoop_filter", 
-                "system": "system", 
-                "max_capacity": 8388608, 
-                "eventq_index": 0, 
-                "cxx_class": "SnoopFilter", 
-                "path": "system.membus.snoop_filter", 
-                "type": "SnoopFilter", 
-                "lookup_latency": 1
-            }, 
-            "power_model": null, 
-            "path": "system.membus", 
-            "snoop_response_latency": 4, 
-            "name": "membus", 
-            "p_state_clk_gate_bins": 20, 
-            "use_default_range": false
-        }, 
-        "symbolfile": "", 
-        "readfile": "", 
-        "thermal_model": null, 
-        "cxx_class": "System", 
-        "work_begin_cpu_id_exit": -1, 
-        "load_offset": 0, 
-        "work_begin_exit_count": 0, 
-        "p_state_clk_gate_min": 1000, 
-        "memories": [
-            "system.physmem"
-        ], 
-        "work_begin_ckpt_count": 0, 
-        "clk_domain": {
-            "name": "clk_domain", 
-            "clock": [
-                1000
-            ], 
-            "init_perf_level": 0, 
-            "voltage_domain": "system.voltage_domain", 
-            "eventq_index": 0, 
-            "cxx_class": "SrcClockDomain", 
-            "path": "system.clk_domain", 
-            "type": "SrcClockDomain", 
-            "domain_id": -1
-        }, 
-        "mem_ranges": [], 
-        "eventq_index": 0, 
-        "default_p_state": "UNDEFINED", 
-        "p_state_clk_gate_max": 1000000000000, 
-        "dvfs_handler": {
-            "enable": false, 
-            "name": "dvfs_handler", 
-            "sys_clk_domain": "system.clk_domain", 
-            "transition_latency": 100000000, 
-            "eventq_index": 0, 
-            "cxx_class": "DVFSHandler", 
-            "domains": [], 
-            "path": "system.dvfs_handler", 
-            "type": "DVFSHandler"
-        }, 
-        "work_end_exit_count": 0, 
-        "type": "System", 
-        "voltage_domain": {
-            "name": "voltage_domain", 
-            "eventq_index": 0, 
-            "voltage": [
-                "1.0"
-            ], 
-            "cxx_class": "VoltageDomain", 
-            "path": "system.voltage_domain", 
-            "type": "VoltageDomain"
-        }, 
-        "cache_line_size": 64, 
-        "boot_osflags": "a", 
-        "system_port": {
-            "peer": "system.membus.slave[0]", 
-            "role": "MASTER"
-        }, 
-        "physmem": {
-            "range": "0:134217727:0:0:0:0", 
-            "latency": 30000, 
-            "name": "physmem", 
-            "p_state_clk_gate_min": 1000, 
-            "eventq_index": 0, 
-            "p_state_clk_gate_bins": 20, 
-            "default_p_state": "UNDEFINED", 
-            "kvm_map": true, 
-            "clk_domain": "system.clk_domain", 
-            "power_model": null, 
-            "latency_var": 0, 
-            "bandwidth": "73.000000", 
-            "conf_table_reported": true, 
-            "cxx_class": "SimpleMemory", 
-            "p_state_clk_gate_max": 1000000000000, 
-            "path": "system.physmem", 
-            "null": false, 
-            "type": "SimpleMemory", 
-            "port": {
-                "peer": "system.membus.master[0]", 
-                "role": "SLAVE"
-            }, 
-            "in_addr_map": true
-        }, 
-        "power_model": null, 
-        "work_cpus_ckpt_count": 0, 
-        "thermal_components": [], 
-        "path": "system", 
-        "cpu_clk_domain": {
-            "name": "cpu_clk_domain", 
-            "clock": [
-                500
-            ], 
-            "init_perf_level": 0, 
-            "voltage_domain": "system.voltage_domain", 
-            "eventq_index": 0, 
-            "cxx_class": "SrcClockDomain", 
-            "path": "system.cpu_clk_domain", 
-            "type": "SrcClockDomain", 
-            "domain_id": -1
-        }, 
-        "work_end_ckpt_count": 0, 
-        "mem_mode": "atomic", 
-        "name": "system", 
-        "init_param": 0, 
-        "p_state_clk_gate_bins": 20, 
-        "load_addr_mask": 1099511627775, 
-        "cpu": [
-            {
-                "do_statistics_insts": true, 
-                "numThreads": 1, 
-                "itb": {
-                    "name": "itb", 
-                    "eventq_index": 0, 
-                    "cxx_class": "RiscvISA::TLB", 
-                    "path": "system.cpu.itb", 
-                    "type": "RiscvTLB", 
-                    "size": 64
-                }, 
-                "simulate_data_stalls": false, 
-                "function_trace": false, 
-                "do_checkpoint_insts": true, 
-                "cxx_class": "AtomicSimpleCPU", 
-                "max_loads_all_threads": 0, 
-                "system": "system", 
-                "clk_domain": "system.cpu_clk_domain", 
-                "function_trace_start": 0, 
-                "cpu_id": 0, 
-                "width": 1, 
-                "checker": null, 
-                "eventq_index": 0, 
-                "default_p_state": "UNDEFINED", 
-                "p_state_clk_gate_max": 1000000000000, 
-                "do_quiesce": true, 
-                "type": "AtomicSimpleCPU", 
-                "fastmem": false, 
-                "profile": 0, 
-                "icache_port": {
-                    "peer": "system.membus.slave[1]", 
-                    "role": "MASTER"
-                }, 
-                "p_state_clk_gate_bins": 20, 
-                "p_state_clk_gate_min": 1000, 
-                "syscallRetryLatency": 10000, 
-                "interrupts": [
-                    {
-                        "eventq_index": 0, 
-                        "path": "system.cpu.interrupts", 
-                        "type": "RiscvInterrupts", 
-                        "name": "interrupts", 
-                        "cxx_class": "RiscvISA::Interrupts"
-                    }
-                ], 
-                "dcache_port": {
-                    "peer": "system.membus.slave[2]", 
-                    "role": "MASTER"
-                }, 
-                "socket_id": 0, 
-                "power_model": null, 
-                "max_insts_all_threads": 0, 
-                "path": "system.cpu", 
-                "max_loads_any_thread": 0, 
-                "switched_out": false, 
-                "workload": [
-                    {
-                        "uid": 100, 
-                        "pid": 100, 
-                        "kvmInSE": false, 
-                        "cxx_class": "Process", 
-                        "executable": "/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello", 
-                        "drivers": [], 
-                        "system": "system", 
-                        "gid": 100, 
-                        "eventq_index": 0, 
-                        "env": [], 
-                        "maxStackSize": 67108864, 
-                        "ppid": 0, 
-                        "type": "Process", 
-                        "cwd": "", 
-                        "pgid": 100, 
-                        "simpoint": 0, 
-                        "euid": 100, 
-                        "input": "cin", 
-                        "path": "system.cpu.workload", 
-                        "name": "workload", 
-                        "cmd": [
-                            "hello"
-                        ], 
-                        "errout": "cerr", 
-                        "useArchPT": false, 
-                        "egid": 100, 
-                        "output": "cout"
-                    }
-                ], 
-                "name": "cpu", 
-                "wait_for_remote_gdb": false, 
-                "dtb": {
-                    "name": "dtb", 
-                    "eventq_index": 0, 
-                    "cxx_class": "RiscvISA::TLB", 
-                    "path": "system.cpu.dtb", 
-                    "type": "RiscvTLB", 
-                    "size": 64
-                }, 
-                "simpoint_start_insts": [], 
-                "max_insts_any_thread": 0, 
-                "simulate_inst_stalls": false, 
-                "progress_interval": 0, 
-                "branchPred": null, 
-                "isa": [
-                    {
-                        "eventq_index": 0, 
-                        "path": "system.cpu.isa", 
-                        "type": "RiscvISA", 
-                        "name": "isa", 
-                        "cxx_class": "RiscvISA::ISA"
-                    }
-                ], 
-                "tracer": {
-                    "eventq_index": 0, 
-                    "path": "system.cpu.tracer", 
-                    "type": "ExeTracer", 
-                    "name": "tracer", 
-                    "cxx_class": "Trace::ExeTracer"
-                }
-            }
-        ], 
-        "multi_thread": false, 
-        "exit_on_work_items": false, 
-        "work_item_id": -1, 
-        "num_work_ids": 16
-    }, 
-    "time_sync_period": 100000000000, 
-    "eventq_index": 0, 
-    "time_sync_spin_threshold": 100000000, 
-    "cxx_class": "Root", 
-    "path": "root", 
-    "time_sync_enable": false, 
-    "type": "Root", 
-    "full_system": false
-}
\ No newline at end of file
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/simerr b/tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/simerr
deleted file mode 100755 (executable)
index 183f48e..0000000
+++ /dev/null
@@ -1,5 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-info: Entering event queue @ 0.  Starting simulation...
-warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings.
-      Returning '/home/ar4jc/gem5/tests/test-progs/hello/bin/riscv/linux/hello'
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/simout
deleted file mode 100755 (executable)
index 3bfe6fa..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-atomic/simout
-Redirecting stderr to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-atomic/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Jul 13 2017 17:37:52
-gem5 started Jul 13 2017 18:03:36
-gem5 executing on boldrock, pid 21572
-command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/00.hello/riscv/linux/simple-atomic
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 3301500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/riscv/linux/simple-atomic/stats.txt
deleted file mode 100644 (file)
index f46119e..0000000
+++ /dev/null
@@ -1,160 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000003                      
-sim_ticks                                     3301500                      
-final_tick                                    3301500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                  10162                      
-host_op_rate                                    10178                      
-host_tick_rate                                6042080                      
-host_mem_usage                                 248192                      
-host_seconds                                     0.55                      
-sim_insts                                        5552                      
-sim_ops                                          5561                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED      3301500                      
-system.physmem.bytes_read::cpu.inst             26380                      
-system.physmem.bytes_read::cpu.data              7234                      
-system.physmem.bytes_read::total                33614                      
-system.physmem.bytes_inst_read::cpu.inst        26380                      
-system.physmem.bytes_inst_read::total           26380                      
-system.physmem.bytes_written::cpu.data           8248                      
-system.physmem.bytes_written::total              8248                      
-system.physmem.num_reads::cpu.inst               6595                      
-system.physmem.num_reads::cpu.data               1082                      
-system.physmem.num_reads::total                  7677                      
-system.physmem.num_writes::cpu.data              1080                      
-system.physmem.num_writes::total                 1080                      
-system.physmem.bw_read::cpu.inst           7990307436                      
-system.physmem.bw_read::cpu.data           2191125246                      
-system.physmem.bw_read::total             10181432682                      
-system.physmem.bw_inst_read::cpu.inst      7990307436                      
-system.physmem.bw_inst_read::total         7990307436                      
-system.physmem.bw_write::cpu.data          2498258367                      
-system.physmem.bw_write::total             2498258367                      
-system.physmem.bw_total::cpu.inst          7990307436                      
-system.physmem.bw_total::cpu.data          4689383614                      
-system.physmem.bw_total::total            12679691050                      
-system.pwrStateResidencyTicks::UNDEFINED      3301500                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.workload.numSyscalls                     9                      
-system.cpu.pwrStateResidencyTicks::ON         3301500                      
-system.cpu.numCycles                             6604                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        5552                      
-system.cpu.committedOps                          5561                      
-system.cpu.num_int_alu_accesses                  5498                      
-system.cpu.num_fp_alu_accesses                     12                      
-system.cpu.num_vec_alu_accesses                     0                      
-system.cpu.num_func_calls                         282                      
-system.cpu.num_conditional_control_insts          914                      
-system.cpu.num_int_insts                         5498                      
-system.cpu.num_fp_insts                            12                      
-system.cpu.num_vec_insts                            0                      
-system.cpu.num_int_register_reads                7038                      
-system.cpu.num_int_register_writes               3414                      
-system.cpu.num_fp_register_reads                   12                      
-system.cpu.num_fp_register_writes                   0                      
-system.cpu.num_vec_register_reads                   0                      
-system.cpu.num_vec_register_writes                  0                      
-system.cpu.num_mem_refs                          2162                      
-system.cpu.num_load_insts                        1082                      
-system.cpu.num_store_insts                       1080                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                       6604                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1196                      
-system.cpu.op_class::No_OpClass                    10      0.18%      0.18%
-system.cpu.op_class::IntAlu                      3392     60.90%     61.08%
-system.cpu.op_class::IntMult                        2      0.04%     61.11%
-system.cpu.op_class::IntDiv                         4      0.07%     61.18%
-system.cpu.op_class::FloatAdd                       0      0.00%     61.18%
-system.cpu.op_class::FloatCmp                       0      0.00%     61.18%
-system.cpu.op_class::FloatCvt                       0      0.00%     61.18%
-system.cpu.op_class::FloatMult                      0      0.00%     61.18%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     61.18%
-system.cpu.op_class::FloatDiv                       0      0.00%     61.18%
-system.cpu.op_class::FloatMisc                      0      0.00%     61.18%
-system.cpu.op_class::FloatSqrt                      0      0.00%     61.18%
-system.cpu.op_class::SimdAdd                        0      0.00%     61.18%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     61.18%
-system.cpu.op_class::SimdAlu                        0      0.00%     61.18%
-system.cpu.op_class::SimdCmp                        0      0.00%     61.18%
-system.cpu.op_class::SimdCvt                        0      0.00%     61.18%
-system.cpu.op_class::SimdMisc                       0      0.00%     61.18%
-system.cpu.op_class::SimdMult                       0      0.00%     61.18%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     61.18%
-system.cpu.op_class::SimdShift                      0      0.00%     61.18%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     61.18%
-system.cpu.op_class::SimdSqrt                       0      0.00%     61.18%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     61.18%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     61.18%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     61.18%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     61.18%
-system.cpu.op_class::MemRead                     1082     19.43%     80.61%
-system.cpu.op_class::MemWrite                    1068     19.17%     99.78%
-system.cpu.op_class::FloatMemRead                   0      0.00%     99.78%
-system.cpu.op_class::FloatMemWrite                 12      0.22%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       5570                      
-system.membus.snoop_filter.tot_requests             0                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED      3301500                      
-system.membus.trans_dist::ReadReq                7669                      
-system.membus.trans_dist::ReadResp               7677                      
-system.membus.trans_dist::WriteReq               1072                      
-system.membus.trans_dist::WriteResp              1072                      
-system.membus.trans_dist::LoadLockedReq             8                      
-system.membus.trans_dist::StoreCondReq              8                      
-system.membus.trans_dist::StoreCondResp             8                      
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port        13190                      
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port         4324                      
-system.membus.pkt_count::total                  17514                      
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port        26380                      
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port        15482                      
-system.membus.pkt_size::total                   41862                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples              8757                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                    8757    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                8757                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/config.ini
deleted file mode 100644 (file)
index 0280a8e..0000000
+++ /dev/null
@@ -1,1268 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000
-time_sync_spin_threshold=100000
-
-[system]
-type=System
-children=clk_domain cpu dvfs_handler mem_ctrls ruby sys_port_proxy voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=0:268435455:0:0:0:0
-memories=system.mem_ctrls
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.sys_port_proxy.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=clk_domain dtb interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu.clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-wait_for_remote_gdb=false
-workload=system.cpu.workload
-dcache_port=system.ruby.l1_cntrl0.sequencer.slave[1]
-icache_port=system.ruby.l1_cntrl0.sequencer.slave[0]
-
-[system.cpu.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu.dtb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.interrupts]
-type=RiscvInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=RiscvISA
-eventq_index=0
-
-[system.cpu.itb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000
-
-[system.mem_ctrls]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-page_policy=open_adaptive
-power_model=Null
-range=0:268435455:5:19:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10
-static_frontend_latency=10
-tBURST=5
-tCCD_L=0
-tCK=1
-tCL=14
-tCS=3
-tRAS=35
-tRCD=14
-tREFI=7800
-tRFC=260
-tRP=14
-tRRD=6
-tRRD_L=0
-tRTP=8
-tRTW=3
-tWR=15
-tWTR=8
-tXAW=30
-tXP=6
-tXPDLL=0
-tXS=270
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.ruby.dir_cntrl0.memory
-
-[system.ruby]
-type=RubySystem
-children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network
-access_backing_store=false
-all_instructions=false
-block_size_bytes=64
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-hot_lines=false
-memory_size_bits=48
-num_of_sequencers=1
-number_of_virtual_networks=5
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-phys_mem=Null
-power_model=Null
-randomization=false
-
-[system.ruby.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.ruby.dir_cntrl0]
-type=Directory_Controller
-children=directory dmaRequestToDir dmaResponseFromDir forwardFromDir requestToDir responseFromDir responseFromMemory
-addr_ranges=0:268435455:5:0:0:0
-buffer_size=0
-clk_domain=system.ruby.clk_domain
-cluster_id=0
-default_p_state=UNDEFINED
-directory=system.ruby.dir_cntrl0.directory
-directory_latency=12
-dmaRequestToDir=system.ruby.dir_cntrl0.dmaRequestToDir
-dmaResponseFromDir=system.ruby.dir_cntrl0.dmaResponseFromDir
-eventq_index=0
-forwardFromDir=system.ruby.dir_cntrl0.forwardFromDir
-number_of_TBEs=256
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-recycle_latency=10
-requestToDir=system.ruby.dir_cntrl0.requestToDir
-responseFromDir=system.ruby.dir_cntrl0.responseFromDir
-responseFromMemory=system.ruby.dir_cntrl0.responseFromMemory
-ruby_system=system.ruby
-system=system
-to_memory_controller_latency=1
-transitions_per_cycle=32
-version=0
-memory=system.mem_ctrls.port
-
-[system.ruby.dir_cntrl0.directory]
-type=RubyDirectoryMemory
-addr_ranges=0:268435455:5:0:0:0
-eventq_index=0
-
-[system.ruby.dir_cntrl0.dmaRequestToDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[3]
-
-[system.ruby.dir_cntrl0.dmaResponseFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[3]
-
-[system.ruby.dir_cntrl0.forwardFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-master=system.ruby.network.slave[4]
-
-[system.ruby.dir_cntrl0.requestToDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[2]
-
-[system.ruby.dir_cntrl0.responseFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-master=system.ruby.network.slave[2]
-
-[system.ruby.dir_cntrl0.responseFromMemory]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-
-[system.ruby.l1_cntrl0]
-type=L1Cache_Controller
-children=cacheMemory forwardToCache mandatoryQueue requestFromCache responseFromCache responseToCache sequencer
-addr_ranges=0:18446744073709551615:0:0:0:0
-buffer_size=0
-cacheMemory=system.ruby.l1_cntrl0.cacheMemory
-cache_response_latency=12
-clk_domain=system.cpu.clk_domain
-cluster_id=0
-default_p_state=UNDEFINED
-eventq_index=0
-forwardToCache=system.ruby.l1_cntrl0.forwardToCache
-issue_latency=2
-mandatoryQueue=system.ruby.l1_cntrl0.mandatoryQueue
-number_of_TBEs=256
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-recycle_latency=10
-requestFromCache=system.ruby.l1_cntrl0.requestFromCache
-responseFromCache=system.ruby.l1_cntrl0.responseFromCache
-responseToCache=system.ruby.l1_cntrl0.responseToCache
-ruby_system=system.ruby
-send_evictions=false
-sequencer=system.ruby.l1_cntrl0.sequencer
-system=system
-transitions_per_cycle=4
-version=0
-
-[system.ruby.l1_cntrl0.cacheMemory]
-type=RubyCache
-children=replacement_policy
-assoc=2
-block_size=0
-dataAccessLatency=1
-dataArrayBanks=1
-eventq_index=0
-is_icache=false
-replacement_policy=system.ruby.l1_cntrl0.cacheMemory.replacement_policy
-resourceStalls=false
-ruby_system=system.ruby
-size=256
-start_index_bit=6
-tagAccessLatency=1
-tagArrayBanks=1
-
-[system.ruby.l1_cntrl0.cacheMemory.replacement_policy]
-type=PseudoLRUReplacementPolicy
-assoc=2
-block_size=64
-eventq_index=0
-size=256
-
-[system.ruby.l1_cntrl0.forwardToCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[0]
-
-[system.ruby.l1_cntrl0.mandatoryQueue]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-
-[system.ruby.l1_cntrl0.requestFromCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[0]
-
-[system.ruby.l1_cntrl0.responseFromCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[1]
-
-[system.ruby.l1_cntrl0.responseToCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[1]
-
-[system.ruby.l1_cntrl0.sequencer]
-type=RubySequencer
-clk_domain=system.cpu.clk_domain
-coreid=99
-dcache=system.ruby.l1_cntrl0.cacheMemory
-dcache_hit_latency=1
-deadlock_threshold=500000
-default_p_state=UNDEFINED
-eventq_index=0
-garnet_standalone=false
-icache=system.ruby.l1_cntrl0.cacheMemory
-icache_hit_latency=1
-is_cpu_sequencer=true
-max_outstanding_requests=16
-no_retry_on_stall=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-ruby_system=system.ruby
-support_data_reqs=true
-support_inst_reqs=true
-system=system
-using_ruby_tester=false
-version=0
-slave=system.cpu.icache_port system.cpu.dcache_port
-
-[system.ruby.memctrl_clk_domain]
-type=DerivedClockDomain
-clk_divider=3
-clk_domain=system.ruby.clk_domain
-eventq_index=0
-
-[system.ruby.network]
-type=SimpleNetwork
-children=ext_links0 ext_links1 int_link_buffers00 int_link_buffers01 int_link_buffers02 int_link_buffers03 int_link_buffers04 int_link_buffers05 int_link_buffers06 int_link_buffers07 int_link_buffers08 int_link_buffers09 int_link_buffers10 int_link_buffers11 int_link_buffers12 int_link_buffers13 int_link_buffers14 int_link_buffers15 int_link_buffers16 int_link_buffers17 int_link_buffers18 int_link_buffers19 int_link_buffers20 int_link_buffers21 int_link_buffers22 int_link_buffers23 int_link_buffers24 int_link_buffers25 int_link_buffers26 int_link_buffers27 int_link_buffers28 int_link_buffers29 int_link_buffers30 int_link_buffers31 int_link_buffers32 int_link_buffers33 int_link_buffers34 int_link_buffers35 int_link_buffers36 int_link_buffers37 int_link_buffers38 int_link_buffers39 int_links0 int_links1 int_links2 int_links3 routers0 routers1 routers2
-adaptive_routing=false
-buffer_size=0
-clk_domain=system.ruby.clk_domain
-control_msg_size=8
-default_p_state=UNDEFINED
-endpoint_bandwidth=1000
-eventq_index=0
-ext_links=system.ruby.network.ext_links0 system.ruby.network.ext_links1
-int_link_buffers=system.ruby.network.int_link_buffers00 system.ruby.network.int_link_buffers01 system.ruby.network.int_link_buffers02 system.ruby.network.int_link_buffers03 system.ruby.network.int_link_buffers04 system.ruby.network.int_link_buffers05 system.ruby.network.int_link_buffers06 system.ruby.network.int_link_buffers07 system.ruby.network.int_link_buffers08 system.ruby.network.int_link_buffers09 system.ruby.network.int_link_buffers10 system.ruby.network.int_link_buffers11 system.ruby.network.int_link_buffers12 system.ruby.network.int_link_buffers13 system.ruby.network.int_link_buffers14 system.ruby.network.int_link_buffers15 system.ruby.network.int_link_buffers16 system.ruby.network.int_link_buffers17 system.ruby.network.int_link_buffers18 system.ruby.network.int_link_buffers19 system.ruby.network.int_link_buffers20 system.ruby.network.int_link_buffers21 system.ruby.network.int_link_buffers22 system.ruby.network.int_link_buffers23 system.ruby.network.int_link_buffers24 system.ruby.network.int_link_buffers25 system.ruby.network.int_link_buffers26 system.ruby.network.int_link_buffers27 system.ruby.network.int_link_buffers28 system.ruby.network.int_link_buffers29 system.ruby.network.int_link_buffers30 system.ruby.network.int_link_buffers31 system.ruby.network.int_link_buffers32 system.ruby.network.int_link_buffers33 system.ruby.network.int_link_buffers34 system.ruby.network.int_link_buffers35 system.ruby.network.int_link_buffers36 system.ruby.network.int_link_buffers37 system.ruby.network.int_link_buffers38 system.ruby.network.int_link_buffers39
-int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2 system.ruby.network.int_links3
-netifs=
-number_of_virtual_networks=5
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
-ruby_system=system.ruby
-topology=Crossbar
-master=system.ruby.l1_cntrl0.forwardToCache.slave system.ruby.l1_cntrl0.responseToCache.slave system.ruby.dir_cntrl0.requestToDir.slave system.ruby.dir_cntrl0.dmaRequestToDir.slave
-slave=system.ruby.l1_cntrl0.requestFromCache.master system.ruby.l1_cntrl0.responseFromCache.master system.ruby.dir_cntrl0.responseFromDir.master system.ruby.dir_cntrl0.dmaResponseFromDir.master system.ruby.dir_cntrl0.forwardFromDir.master
-
-[system.ruby.network.ext_links0]
-type=SimpleExtLink
-bandwidth_factor=16
-eventq_index=0
-ext_node=system.ruby.l1_cntrl0
-int_node=system.ruby.network.routers0
-latency=1
-link_id=0
-weight=1
-
-[system.ruby.network.ext_links1]
-type=SimpleExtLink
-bandwidth_factor=16
-eventq_index=0
-ext_node=system.ruby.dir_cntrl0
-int_node=system.ruby.network.routers1
-latency=1
-link_id=1
-weight=1
-
-[system.ruby.network.int_link_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers15]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers16]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers17]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers18]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers19]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers20]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers21]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers22]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers23]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers24]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers25]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers26]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers27]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers28]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers29]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers30]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers31]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers32]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers33]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers34]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers35]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers36]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers37]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers38]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers39]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_links0]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers2
-eventq_index=0
-latency=1
-link_id=2
-src_node=system.ruby.network.routers0
-src_outport=
-weight=1
-
-[system.ruby.network.int_links1]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers2
-eventq_index=0
-latency=1
-link_id=3
-src_node=system.ruby.network.routers1
-src_outport=
-weight=1
-
-[system.ruby.network.int_links2]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers0
-eventq_index=0
-latency=1
-link_id=4
-src_node=system.ruby.network.routers2
-src_outport=
-weight=1
-
-[system.ruby.network.int_links3]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers1
-eventq_index=0
-latency=1
-link_id=5
-src_node=system.ruby.network.routers2
-src_outport=
-weight=1
-
-[system.ruby.network.routers0]
-type=Switch
-children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14
-power_model=Null
-router_id=0
-virt_nets=5
-
-[system.ruby.network.routers0.port_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1]
-type=Switch
-children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14
-power_model=Null
-router_id=1
-virt_nets=5
-
-[system.ruby.network.routers1.port_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2]
-type=Switch
-children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14 port_buffers15 port_buffers16 port_buffers17 port_buffers18 port_buffers19
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19
-power_model=Null
-router_id=2
-virt_nets=5
-
-[system.ruby.network.routers2.port_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers15]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers16]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers17]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers18]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers19]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.sys_port_proxy]
-type=RubyPortProxy
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_cpu_sequencer=true
-no_retry_on_stall=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-ruby_system=system.ruby
-support_data_reqs=true
-support_inst_reqs=true
-system=system
-using_ruby_tester=false
-version=0
-slave=system.system_port
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/config.json b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/config.json
deleted file mode 100644 (file)
index 87e5b42..0000000
+++ /dev/null
@@ -1,1743 +0,0 @@
-{
-    "name": null, 
-    "sim_quantum": 0, 
-    "system": {
-        "kernel": "", 
-        "mmap_using_noreserve": false, 
-        "kernel_addr_check": true, 
-        "symbolfile": "", 
-        "readfile": "", 
-        "thermal_model": null, 
-        "cxx_class": "System", 
-        "work_begin_cpu_id_exit": -1, 
-        "load_offset": 0, 
-        "work_begin_exit_count": 0, 
-        "p_state_clk_gate_min": 1, 
-        "memories": [
-            "system.mem_ctrls"
-        ], 
-        "work_begin_ckpt_count": 0, 
-        "clk_domain": {
-            "name": "clk_domain", 
-            "clock": [
-                1
-            ], 
-            "init_perf_level": 0, 
-            "voltage_domain": "system.voltage_domain", 
-            "eventq_index": 0, 
-            "cxx_class": "SrcClockDomain", 
-            "path": "system.clk_domain", 
-            "type": "SrcClockDomain", 
-            "domain_id": -1
-        }, 
-        "mem_ranges": [
-            "0:268435455:0:0:0:0"
-        ], 
-        "eventq_index": 0, 
-        "default_p_state": "UNDEFINED", 
-        "p_state_clk_gate_max": 1000000000, 
-        "dvfs_handler": {
-            "enable": false, 
-            "name": "dvfs_handler", 
-            "sys_clk_domain": "system.clk_domain", 
-            "transition_latency": 100000, 
-            "eventq_index": 0, 
-            "cxx_class": "DVFSHandler", 
-            "domains": [], 
-            "path": "system.dvfs_handler", 
-            "type": "DVFSHandler"
-        }, 
-        "work_end_exit_count": 0, 
-        "type": "System", 
-        "voltage_domain": {
-            "name": "voltage_domain", 
-            "eventq_index": 0, 
-            "voltage": [
-                "1.0"
-            ], 
-            "cxx_class": "VoltageDomain", 
-            "path": "system.voltage_domain", 
-            "type": "VoltageDomain"
-        }, 
-        "cache_line_size": 64, 
-        "boot_osflags": "a", 
-        "system_port": {
-            "peer": "system.sys_port_proxy.slave[0]", 
-            "role": "MASTER"
-        }, 
-        "sys_port_proxy": {
-            "system": "system", 
-            "support_inst_reqs": true, 
-            "slave": {
-                "peer": [
-                    "system.system_port"
-                ], 
-                "role": "SLAVE"
-            }, 
-            "name": "sys_port_proxy", 
-            "p_state_clk_gate_min": 1, 
-            "no_retry_on_stall": false, 
-            "p_state_clk_gate_bins": 20, 
-            "support_data_reqs": true, 
-            "cxx_class": "RubyPortProxy", 
-            "clk_domain": "system.clk_domain", 
-            "power_model": null, 
-            "is_cpu_sequencer": true, 
-            "version": 0, 
-            "eventq_index": 0, 
-            "using_ruby_tester": false, 
-            "default_p_state": "UNDEFINED", 
-            "p_state_clk_gate_max": 1000000000, 
-            "path": "system.sys_port_proxy", 
-            "type": "RubyPortProxy", 
-            "ruby_system": "system.ruby"
-        }, 
-        "power_model": null, 
-        "work_cpus_ckpt_count": 0, 
-        "thermal_components": [], 
-        "path": "system", 
-        "ruby": {
-            "all_instructions": false, 
-            "memory_size_bits": 48, 
-            "cxx_class": "RubySystem", 
-            "l1_cntrl0": {
-                "requestFromCache": {
-                    "ordered": true, 
-                    "name": "requestFromCache", 
-                    "cxx_class": "MessageBuffer", 
-                    "randomization": false, 
-                    "eventq_index": 0, 
-                    "master": {
-                        "peer": "system.ruby.network.slave[0]", 
-                        "role": "MASTER"
-                    }, 
-                    "buffer_size": 0, 
-                    "path": "system.ruby.l1_cntrl0.requestFromCache", 
-                    "type": "MessageBuffer"
-                }, 
-                "forwardToCache": {
-                    "ordered": true, 
-                    "name": "forwardToCache", 
-                    "cxx_class": "MessageBuffer", 
-                    "slave": {
-                        "peer": "system.ruby.network.master[0]", 
-                        "role": "SLAVE"
-                    }, 
-                    "randomization": false, 
-                    "eventq_index": 0, 
-                    "buffer_size": 0, 
-                    "path": "system.ruby.l1_cntrl0.forwardToCache", 
-                    "type": "MessageBuffer"
-                }, 
-                "system": "system", 
-                "cluster_id": 0, 
-                "sequencer": {
-                    "no_retry_on_stall": false, 
-                    "deadlock_threshold": 500000, 
-                    "using_ruby_tester": false, 
-                    "system": "system", 
-                    "dcache": "system.ruby.l1_cntrl0.cacheMemory", 
-                    "cxx_class": "Sequencer", 
-                    "garnet_standalone": false, 
-                    "clk_domain": "system.cpu.clk_domain", 
-                    "icache_hit_latency": 1, 
-                    "version": 0, 
-                    "eventq_index": 0, 
-                    "default_p_state": "UNDEFINED", 
-                    "p_state_clk_gate_max": 1000000000, 
-                    "type": "RubySequencer", 
-                    "icache": "system.ruby.l1_cntrl0.cacheMemory", 
-                    "slave": {
-                        "peer": [
-                            "system.cpu.icache_port", 
-                            "system.cpu.dcache_port"
-                        ], 
-                        "role": "SLAVE"
-                    }, 
-                    "p_state_clk_gate_min": 1, 
-                    "power_model": null, 
-                    "coreid": 99, 
-                    "path": "system.ruby.l1_cntrl0.sequencer", 
-                    "ruby_system": "system.ruby", 
-                    "support_inst_reqs": true, 
-                    "name": "sequencer", 
-                    "max_outstanding_requests": 16, 
-                    "p_state_clk_gate_bins": 20, 
-                    "dcache_hit_latency": 1, 
-                    "support_data_reqs": true, 
-                    "is_cpu_sequencer": true
-                }, 
-                "cxx_class": "L1Cache_Controller", 
-                "issue_latency": 2, 
-                "type": "L1Cache_Controller", 
-                "recycle_latency": 10, 
-                "clk_domain": "system.cpu.clk_domain", 
-                "version": 0, 
-                "eventq_index": 0, 
-                "default_p_state": "UNDEFINED", 
-                "p_state_clk_gate_max": 1000000000, 
-                "number_of_TBEs": 256, 
-                "p_state_clk_gate_min": 1, 
-                "responseToCache": {
-                    "ordered": true, 
-                    "name": "responseToCache", 
-                    "cxx_class": "MessageBuffer", 
-                    "slave": {
-                        "peer": "system.ruby.network.master[1]", 
-                        "role": "SLAVE"
-                    }, 
-                    "randomization": false, 
-                    "eventq_index": 0, 
-                    "buffer_size": 0, 
-                    "path": "system.ruby.l1_cntrl0.responseToCache", 
-                    "type": "MessageBuffer"
-                }, 
-                "transitions_per_cycle": 4, 
-                "responseFromCache": {
-                    "ordered": true, 
-                    "name": "responseFromCache", 
-                    "cxx_class": "MessageBuffer", 
-                    "randomization": false, 
-                    "eventq_index": 0, 
-                    "master": {
-                        "peer": "system.ruby.network.slave[1]", 
-                        "role": "MASTER"
-                    }, 
-                    "buffer_size": 0, 
-                    "path": "system.ruby.l1_cntrl0.responseFromCache", 
-                    "type": "MessageBuffer"
-                }, 
-                "power_model": null, 
-                "cache_response_latency": 12, 
-                "buffer_size": 0, 
-                "send_evictions": false, 
-                "cacheMemory": {
-                    "size": 256, 
-                    "resourceStalls": false, 
-                    "is_icache": false, 
-                    "name": "cacheMemory", 
-                    "eventq_index": 0, 
-                    "dataAccessLatency": 1, 
-                    "tagArrayBanks": 1, 
-                    "tagAccessLatency": 1, 
-                    "replacement_policy": {
-                        "name": "replacement_policy", 
-                        "eventq_index": 0, 
-                        "assoc": 2, 
-                        "cxx_class": "PseudoLRUPolicy", 
-                        "path": "system.ruby.l1_cntrl0.cacheMemory.replacement_policy", 
-                        "block_size": 64, 
-                        "type": "PseudoLRUReplacementPolicy", 
-                        "size": 256
-                    }, 
-                    "assoc": 2, 
-                    "start_index_bit": 6, 
-                    "cxx_class": "CacheMemory", 
-                    "path": "system.ruby.l1_cntrl0.cacheMemory", 
-                    "block_size": 0, 
-                    "type": "RubyCache", 
-                    "dataArrayBanks": 1, 
-                    "ruby_system": "system.ruby"
-                }, 
-                "ruby_system": "system.ruby", 
-                "name": "l1_cntrl0", 
-                "addr_ranges": [
-                    "0:18446744073709551615:0:0:0:0"
-                ], 
-                "p_state_clk_gate_bins": 20, 
-                "mandatoryQueue": {
-                    "ordered": false, 
-                    "name": "mandatoryQueue", 
-                    "cxx_class": "MessageBuffer", 
-                    "randomization": false, 
-                    "eventq_index": 0, 
-                    "buffer_size": 0, 
-                    "path": "system.ruby.l1_cntrl0.mandatoryQueue", 
-                    "type": "MessageBuffer"
-                }, 
-                "path": "system.ruby.l1_cntrl0"
-            }, 
-            "network": {
-                "int_link_buffers": [
-                    {
-                        "ordered": true, 
-                        "name": "int_link_buffers00", 
-                        "cxx_class": "MessageBuffer", 
-                        "randomization": false, 
-                        "eventq_index": 0, 
-                        "buffer_size": 0, 
-                        "path": "system.ruby.network.int_link_buffers00", 
-                        "type": "MessageBuffer"
-                    }, 
-                    {
-                        "ordered": true, 
-                        "name": "int_link_buffers01", 
-                        "cxx_class": "MessageBuffer", 
-                        "randomization": false, 
-                        "eventq_index": 0, 
-                        "buffer_size": 0, 
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-                "ruby_system": "system.ruby", 
-                "name": "network", 
-                "p_state_clk_gate_bins": 20, 
-                "ext_links": [
-                    {
-                        "latency": 1, 
-                        "name": "ext_links0", 
-                        "weight": 1, 
-                        "ext_node": "system.ruby.l1_cntrl0", 
-                        "link_id": 0, 
-                        "eventq_index": 0, 
-                        "cxx_class": "SimpleExtLink", 
-                        "path": "system.ruby.network.ext_links0", 
-                        "int_node": "system.ruby.network.routers0", 
-                        "type": "SimpleExtLink", 
-                        "bandwidth_factor": 16
-                    }, 
-                    {
-                        "latency": 1, 
-                        "name": "ext_links1", 
-                        "weight": 1, 
-                        "ext_node": "system.ruby.dir_cntrl0", 
-                        "link_id": 1, 
-                        "eventq_index": 0, 
-                        "cxx_class": "SimpleExtLink", 
-                        "path": "system.ruby.network.ext_links1", 
-                        "int_node": "system.ruby.network.routers1", 
-                        "type": "SimpleExtLink", 
-                        "bandwidth_factor": 16
-                    }
-                ], 
-                "number_of_virtual_networks": 5, 
-                "path": "system.ruby.network"
-            }, 
-            "clk_domain": {
-                "name": "clk_domain", 
-                "clock": [
-                    1
-                ], 
-                "init_perf_level": 0, 
-                "voltage_domain": "system.voltage_domain", 
-                "eventq_index": 0, 
-                "cxx_class": "SrcClockDomain", 
-                "path": "system.ruby.clk_domain", 
-                "type": "SrcClockDomain", 
-                "domain_id": -1
-            }, 
-            "randomization": false, 
-            "eventq_index": 0, 
-            "default_p_state": "UNDEFINED", 
-            "p_state_clk_gate_max": 1000000000, 
-            "phys_mem": null, 
-            "type": "RubySystem", 
-            "p_state_clk_gate_min": 1, 
-            "hot_lines": false, 
-            "power_model": null, 
-            "path": "system.ruby", 
-            "memctrl_clk_domain": {
-                "name": "memctrl_clk_domain", 
-                "clk_domain": "system.ruby.clk_domain", 
-                "eventq_index": 0, 
-                "cxx_class": "DerivedClockDomain", 
-                "path": "system.ruby.memctrl_clk_domain", 
-                "type": "DerivedClockDomain", 
-                "clk_divider": 3
-            }, 
-            "name": "ruby", 
-            "p_state_clk_gate_bins": 20, 
-            "block_size_bytes": 64, 
-            "access_backing_store": false, 
-            "number_of_virtual_networks": 5, 
-            "num_of_sequencers": 1, 
-            "dir_cntrl0": {
-                "system": "system", 
-                "cluster_id": 0, 
-                "responseFromMemory": {
-                    "ordered": false, 
-                    "name": "responseFromMemory", 
-                    "cxx_class": "MessageBuffer", 
-                    "randomization": false, 
-                    "eventq_index": 0, 
-                    "buffer_size": 0, 
-                    "path": "system.ruby.dir_cntrl0.responseFromMemory", 
-                    "type": "MessageBuffer"
-                }, 
-                "cxx_class": "Directory_Controller", 
-                "forwardFromDir": {
-                    "ordered": false, 
-                    "name": "forwardFromDir", 
-                    "cxx_class": "MessageBuffer", 
-                    "randomization": false, 
-                    "eventq_index": 0, 
-                    "master": {
-                        "peer": "system.ruby.network.slave[4]", 
-                        "role": "MASTER"
-                    }, 
-                    "buffer_size": 0, 
-                    "path": "system.ruby.dir_cntrl0.forwardFromDir", 
-                    "type": "MessageBuffer"
-                }, 
-                "dmaRequestToDir": {
-                    "ordered": true, 
-                    "name": "dmaRequestToDir", 
-                    "cxx_class": "MessageBuffer", 
-                    "slave": {
-                        "peer": "system.ruby.network.master[3]", 
-                        "role": "SLAVE"
-                    }, 
-                    "randomization": false, 
-                    "eventq_index": 0, 
-                    "buffer_size": 0, 
-                    "path": "system.ruby.dir_cntrl0.dmaRequestToDir", 
-                    "type": "MessageBuffer"
-                }, 
-                "type": "Directory_Controller", 
-                "recycle_latency": 10, 
-                "clk_domain": "system.ruby.clk_domain", 
-                "version": 0, 
-                "eventq_index": 0, 
-                "default_p_state": "UNDEFINED", 
-                "p_state_clk_gate_max": 1000000000, 
-                "directory_latency": 12, 
-                "number_of_TBEs": 256, 
-                "to_memory_controller_latency": 1, 
-                "p_state_clk_gate_min": 1, 
-                "responseFromDir": {
-                    "ordered": false, 
-                    "name": "responseFromDir", 
-                    "cxx_class": "MessageBuffer", 
-                    "randomization": false, 
-                    "eventq_index": 0, 
-                    "master": {
-                        "peer": "system.ruby.network.slave[2]", 
-                        "role": "MASTER"
-                    }, 
-                    "buffer_size": 0, 
-                    "path": "system.ruby.dir_cntrl0.responseFromDir", 
-                    "type": "MessageBuffer"
-                }, 
-                "transitions_per_cycle": 32, 
-                "memory": {
-                    "peer": "system.mem_ctrls.port", 
-                    "role": "MASTER"
-                }, 
-                "power_model": null, 
-                "addr_ranges": [
-                    "0:268435455:5:0:0:0"
-                ], 
-                "buffer_size": 0, 
-                "ruby_system": "system.ruby", 
-                "requestToDir": {
-                    "ordered": true, 
-                    "name": "requestToDir", 
-                    "cxx_class": "MessageBuffer", 
-                    "slave": {
-                        "peer": "system.ruby.network.master[2]", 
-                        "role": "SLAVE"
-                    }, 
-                    "randomization": false, 
-                    "eventq_index": 0, 
-                    "buffer_size": 0, 
-                    "path": "system.ruby.dir_cntrl0.requestToDir", 
-                    "type": "MessageBuffer"
-                }, 
-                "dmaResponseFromDir": {
-                    "ordered": true, 
-                    "name": "dmaResponseFromDir", 
-                    "cxx_class": "MessageBuffer", 
-                    "randomization": false, 
-                    "eventq_index": 0, 
-                    "master": {
-                        "peer": "system.ruby.network.slave[3]", 
-                        "role": "MASTER"
-                    }, 
-                    "buffer_size": 0, 
-                    "path": "system.ruby.dir_cntrl0.dmaResponseFromDir", 
-                    "type": "MessageBuffer"
-                }, 
-                "name": "dir_cntrl0", 
-                "p_state_clk_gate_bins": 20, 
-                "directory": {
-                    "name": "directory", 
-                    "addr_ranges": [
-                        "0:268435455:5:0:0:0"
-                    ], 
-                    "eventq_index": 0, 
-                    "cxx_class": "DirectoryMemory", 
-                    "path": "system.ruby.dir_cntrl0.directory", 
-                    "type": "RubyDirectoryMemory"
-                }, 
-                "path": "system.ruby.dir_cntrl0"
-            }
-        }, 
-        "work_end_ckpt_count": 0, 
-        "mem_mode": "timing", 
-        "name": "system", 
-        "init_param": 0, 
-        "p_state_clk_gate_bins": 20, 
-        "load_addr_mask": 1099511627775, 
-        "cpu": {
-            "do_statistics_insts": true, 
-            "numThreads": 1, 
-            "itb": {
-                "name": "itb", 
-                "eventq_index": 0, 
-                "cxx_class": "RiscvISA::TLB", 
-                "path": "system.cpu.itb", 
-                "type": "RiscvTLB", 
-                "size": 64
-            }, 
-            "system": "system", 
-            "function_trace": false, 
-            "do_checkpoint_insts": true, 
-            "cxx_class": "TimingSimpleCPU", 
-            "max_loads_all_threads": 0, 
-            "clk_domain": {
-                "name": "clk_domain", 
-                "clock": [
-                    1
-                ], 
-                "init_perf_level": 0, 
-                "voltage_domain": "system.voltage_domain", 
-                "eventq_index": 0, 
-                "cxx_class": "SrcClockDomain", 
-                "path": "system.cpu.clk_domain", 
-                "type": "SrcClockDomain", 
-                "domain_id": -1
-            }, 
-            "function_trace_start": 0, 
-            "cpu_id": 0, 
-            "checker": null, 
-            "eventq_index": 0, 
-            "default_p_state": "UNDEFINED", 
-            "p_state_clk_gate_max": 1000000000, 
-            "do_quiesce": true, 
-            "type": "TimingSimpleCPU", 
-            "profile": 0, 
-            "icache_port": {
-                "peer": "system.ruby.l1_cntrl0.sequencer.slave[0]", 
-                "role": "MASTER"
-            }, 
-            "p_state_clk_gate_bins": 20, 
-            "p_state_clk_gate_min": 1, 
-            "syscallRetryLatency": 10000, 
-            "interrupts": [
-                {
-                    "eventq_index": 0, 
-                    "path": "system.cpu.interrupts", 
-                    "type": "RiscvInterrupts", 
-                    "name": "interrupts", 
-                    "cxx_class": "RiscvISA::Interrupts"
-                }
-            ], 
-            "dcache_port": {
-                "peer": "system.ruby.l1_cntrl0.sequencer.slave[1]", 
-                "role": "MASTER"
-            }, 
-            "socket_id": 0, 
-            "power_model": null, 
-            "max_insts_all_threads": 0, 
-            "path": "system.cpu", 
-            "max_loads_any_thread": 0, 
-            "switched_out": false, 
-            "workload": [
-                {
-                    "uid": 100, 
-                    "pid": 100, 
-                    "kvmInSE": false, 
-                    "cxx_class": "Process", 
-                    "executable": "/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello", 
-                    "drivers": [], 
-                    "system": "system", 
-                    "gid": 100, 
-                    "eventq_index": 0, 
-                    "env": [], 
-                    "maxStackSize": 67108864, 
-                    "ppid": 0, 
-                    "type": "Process", 
-                    "cwd": "", 
-                    "pgid": 100, 
-                    "simpoint": 0, 
-                    "euid": 100, 
-                    "input": "cin", 
-                    "path": "system.cpu.workload", 
-                    "name": "workload", 
-                    "cmd": [
-                        "hello"
-                    ], 
-                    "errout": "cerr", 
-                    "useArchPT": false, 
-                    "egid": 100, 
-                    "output": "cout"
-                }
-            ], 
-            "name": "cpu", 
-            "wait_for_remote_gdb": false, 
-            "dtb": {
-                "name": "dtb", 
-                "eventq_index": 0, 
-                "cxx_class": "RiscvISA::TLB", 
-                "path": "system.cpu.dtb", 
-                "type": "RiscvTLB", 
-                "size": 64
-            }, 
-            "simpoint_start_insts": [], 
-            "max_insts_any_thread": 0, 
-            "progress_interval": 0, 
-            "branchPred": null, 
-            "isa": [
-                {
-                    "eventq_index": 0, 
-                    "path": "system.cpu.isa", 
-                    "type": "RiscvISA", 
-                    "name": "isa", 
-                    "cxx_class": "RiscvISA::ISA"
-                }
-            ], 
-            "tracer": {
-                "eventq_index": 0, 
-                "path": "system.cpu.tracer", 
-                "type": "ExeTracer", 
-                "name": "tracer", 
-                "cxx_class": "Trace::ExeTracer"
-            }
-        }, 
-        "multi_thread": false, 
-        "mem_ctrls": [
-            {
-                "static_frontend_latency": 10, 
-                "tRFC": 260, 
-                "activation_limit": 4, 
-                "in_addr_map": true, 
-                "IDD3N2": "0.0", 
-                "tWTR": 8, 
-                "IDD52": "0.0", 
-                "clk_domain": "system.clk_domain", 
-                "channels": 1, 
-                "write_buffer_size": 64, 
-                "device_bus_width": 8, 
-                "VDD": "1.5", 
-                "write_high_thresh_perc": 85, 
-                "cxx_class": "DRAMCtrl", 
-                "bank_groups_per_rank": 0, 
-                "IDD2N2": "0.0", 
-                "port": {
-                    "peer": "system.ruby.dir_cntrl0.memory", 
-                    "role": "SLAVE"
-                }, 
-                "tCCD_L": 0, 
-                "IDD2N": "0.032", 
-                "p_state_clk_gate_min": 1, 
-                "null": false, 
-                "IDD2P1": "0.032", 
-                "eventq_index": 0, 
-                "tRRD": 6, 
-                "tRTW": 3, 
-                "IDD4R": "0.157", 
-                "burst_length": 8, 
-                "tRTP": 8, 
-                "IDD4W": "0.125", 
-                "tWR": 15, 
-                "banks_per_rank": 8, 
-                "devices_per_rank": 8, 
-                "IDD2P02": "0.0", 
-                "default_p_state": "UNDEFINED", 
-                "p_state_clk_gate_max": 1000000000, 
-                "IDD6": "0.02", 
-                "IDD5": "0.235", 
-                "tRCD": 14, 
-                "type": "DRAMCtrl", 
-                "IDD3P02": "0.0", 
-                "tRRD_L": 0, 
-                "IDD0": "0.055", 
-                "IDD62": "0.0", 
-                "min_writes_per_switch": 16, 
-                "mem_sched_policy": "frfcfs", 
-                "IDD02": "0.0", 
-                "IDD2P0": "0.0", 
-                "ranks_per_channel": 2, 
-                "page_policy": "open_adaptive", 
-                "IDD4W2": "0.0", 
-                "tCS": 3, 
-                "power_model": null, 
-                "tCL": 14, 
-                "read_buffer_size": 32, 
-                "conf_table_reported": true, 
-                "tCK": 1, 
-                "tRAS": 35, 
-                "tRP": 14, 
-                "tBURST": 5, 
-                "path": "system.mem_ctrls", 
-                "tXP": 6, 
-                "tXS": 270, 
-                "addr_mapping": "RoRaBaCoCh", 
-                "IDD3P0": "0.0", 
-                "IDD3P1": "0.038", 
-                "IDD3N": "0.038", 
-                "name": "mem_ctrls", 
-                "tXSDLL": 0, 
-                "device_size": 536870912, 
-                "kvm_map": true, 
-                "dll": true, 
-                "tXAW": 30, 
-                "write_low_thresh_perc": 50, 
-                "range": "0:268435455:5:19:0:0", 
-                "VDD2": "0.0", 
-                "IDD2P12": "0.0", 
-                "p_state_clk_gate_bins": 20, 
-                "tXPDLL": 0, 
-                "IDD4R2": "0.0", 
-                "device_rowbuffer_size": 1024, 
-                "static_backend_latency": 10, 
-                "max_accesses_per_row": 16, 
-                "IDD3P12": "0.0", 
-                "tREFI": 7800
-            }
-        ], 
-        "exit_on_work_items": false, 
-        "work_item_id": -1, 
-        "num_work_ids": 16
-    }, 
-    "time_sync_period": 100000000, 
-    "eventq_index": 0, 
-    "time_sync_spin_threshold": 100000, 
-    "cxx_class": "Root", 
-    "path": "root", 
-    "time_sync_enable": false, 
-    "type": "Root", 
-    "full_system": false
-}
\ No newline at end of file
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/simerr b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/simerr
deleted file mode 100755 (executable)
index c6cfb31..0000000
+++ /dev/null
@@ -1,15 +0,0 @@
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-info: Entering event queue @ 0.  Starting simulation...
-warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
-warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings.
-      Returning '/home/ar4jc/gem5/tests/test-progs/hello/bin/riscv/linux/hello'
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/simout
deleted file mode 100755 (executable)
index f830918..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing-ruby/simout
-Redirecting stderr to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing-ruby/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Jul 13 2017 17:37:52
-gem5 started Jul 13 2017 18:03:36
-gem5 executing on boldrock, pid 21569
-command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing-ruby --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/00.hello/riscv/linux/simple-timing-ruby
-
-Global frequency set at 1000000000 ticks per second
-Hello world!
-Exiting @ tick 96790 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/stats.txt
deleted file mode 100644 (file)
index e7d893b..0000000
+++ /dev/null
@@ -1,739 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000097                      
-sim_ticks                                       96790                      
-final_tick                                      96790                      
-sim_freq                                   1000000000                      
-host_inst_rate                                  12250                      
-host_op_rate                                    12270                      
-host_tick_rate                                 213561                      
-host_mem_usage                                 421516                      
-host_seconds                                     0.45                      
-sim_insts                                        5552                      
-sim_ops                                          5561                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                             1                      
-system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED        96790                      
-system.mem_ctrls.bytes_read::ruby.dir_cntrl0        89856                      
-system.mem_ctrls.bytes_read::total              89856                      
-system.mem_ctrls.bytes_written::ruby.dir_cntrl0        89600                      
-system.mem_ctrls.bytes_written::total           89600                      
-system.mem_ctrls.num_reads::ruby.dir_cntrl0         1404                      
-system.mem_ctrls.num_reads::total                1404                      
-system.mem_ctrls.num_writes::ruby.dir_cntrl0         1400                      
-system.mem_ctrls.num_writes::total               1400                      
-system.mem_ctrls.bw_read::ruby.dir_cntrl0    928360368                      
-system.mem_ctrls.bw_read::total             928360368                      
-system.mem_ctrls.bw_write::ruby.dir_cntrl0    925715466                      
-system.mem_ctrls.bw_write::total            925715466                      
-system.mem_ctrls.bw_total::ruby.dir_cntrl0   1854075834                      
-system.mem_ctrls.bw_total::total           1854075834                      
-system.mem_ctrls.readReqs                        1404                      
-system.mem_ctrls.writeReqs                       1400                      
-system.mem_ctrls.readBursts                      1404                      
-system.mem_ctrls.writeBursts                     1400                      
-system.mem_ctrls.bytesReadDRAM                  47808                      
-system.mem_ctrls.bytesReadWrQ                   42048                      
-system.mem_ctrls.bytesWritten                   48000                      
-system.mem_ctrls.bytesReadSys                   89856                      
-system.mem_ctrls.bytesWrittenSys                89600                      
-system.mem_ctrls.servicedByWrQ                    657                      
-system.mem_ctrls.mergedWrBursts                   628                      
-system.mem_ctrls.neitherReadNorWriteReqs            0                      
-system.mem_ctrls.perBankRdBursts::0                51                      
-system.mem_ctrls.perBankRdBursts::1                 0                      
-system.mem_ctrls.perBankRdBursts::2                41                      
-system.mem_ctrls.perBankRdBursts::3                15                      
-system.mem_ctrls.perBankRdBursts::4                69                      
-system.mem_ctrls.perBankRdBursts::5               176                      
-system.mem_ctrls.perBankRdBursts::6               162                      
-system.mem_ctrls.perBankRdBursts::7               136                      
-system.mem_ctrls.perBankRdBursts::8                58                      
-system.mem_ctrls.perBankRdBursts::9                31                      
-system.mem_ctrls.perBankRdBursts::10                0                      
-system.mem_ctrls.perBankRdBursts::11                2                      
-system.mem_ctrls.perBankRdBursts::12                2                      
-system.mem_ctrls.perBankRdBursts::13                3                      
-system.mem_ctrls.perBankRdBursts::14                1                      
-system.mem_ctrls.perBankRdBursts::15                0                      
-system.mem_ctrls.perBankWrBursts::0                51                      
-system.mem_ctrls.perBankWrBursts::1                 0                      
-system.mem_ctrls.perBankWrBursts::2                43                      
-system.mem_ctrls.perBankWrBursts::3                13                      
-system.mem_ctrls.perBankWrBursts::4                61                      
-system.mem_ctrls.perBankWrBursts::5               180                      
-system.mem_ctrls.perBankWrBursts::6               163                      
-system.mem_ctrls.perBankWrBursts::7               143                      
-system.mem_ctrls.perBankWrBursts::8                57                      
-system.mem_ctrls.perBankWrBursts::9                31                      
-system.mem_ctrls.perBankWrBursts::10                0                      
-system.mem_ctrls.perBankWrBursts::11                2                      
-system.mem_ctrls.perBankWrBursts::12                2                      
-system.mem_ctrls.perBankWrBursts::13                3                      
-system.mem_ctrls.perBankWrBursts::14                1                      
-system.mem_ctrls.perBankWrBursts::15                0                      
-system.mem_ctrls.numRdRetry                         0                      
-system.mem_ctrls.numWrRetry                         0                      
-system.mem_ctrls.totGap                         96722                      
-system.mem_ctrls.readPktSize::0                     0                      
-system.mem_ctrls.readPktSize::1                     0                      
-system.mem_ctrls.readPktSize::2                     0                      
-system.mem_ctrls.readPktSize::3                     0                      
-system.mem_ctrls.readPktSize::4                     0                      
-system.mem_ctrls.readPktSize::5                     0                      
-system.mem_ctrls.readPktSize::6                  1404                      
-system.mem_ctrls.writePktSize::0                    0                      
-system.mem_ctrls.writePktSize::1                    0                      
-system.mem_ctrls.writePktSize::2                    0                      
-system.mem_ctrls.writePktSize::3                    0                      
-system.mem_ctrls.writePktSize::4                    0                      
-system.mem_ctrls.writePktSize::5                    0                      
-system.mem_ctrls.writePktSize::6                 1400                      
-system.mem_ctrls.rdQLenPdf::0                     747                      
-system.mem_ctrls.rdQLenPdf::1                       0                      
-system.mem_ctrls.rdQLenPdf::2                       0                      
-system.mem_ctrls.rdQLenPdf::3                       0                      
-system.mem_ctrls.rdQLenPdf::4                       0                      
-system.mem_ctrls.rdQLenPdf::5                       0                      
-system.mem_ctrls.rdQLenPdf::6                       0                      
-system.mem_ctrls.rdQLenPdf::7                       0                      
-system.mem_ctrls.rdQLenPdf::8                       0                      
-system.mem_ctrls.rdQLenPdf::9                       0                      
-system.mem_ctrls.rdQLenPdf::10                      0                      
-system.mem_ctrls.rdQLenPdf::11                      0                      
-system.mem_ctrls.rdQLenPdf::12                      0                      
-system.mem_ctrls.rdQLenPdf::13                      0                      
-system.mem_ctrls.rdQLenPdf::14                      0                      
-system.mem_ctrls.rdQLenPdf::15                      0                      
-system.mem_ctrls.rdQLenPdf::16                      0                      
-system.mem_ctrls.rdQLenPdf::17                      0                      
-system.mem_ctrls.rdQLenPdf::18                      0                      
-system.mem_ctrls.rdQLenPdf::19                      0                      
-system.mem_ctrls.rdQLenPdf::20                      0                      
-system.mem_ctrls.rdQLenPdf::21                      0                      
-system.mem_ctrls.rdQLenPdf::22                      0                      
-system.mem_ctrls.rdQLenPdf::23                      0                      
-system.mem_ctrls.rdQLenPdf::24                      0                      
-system.mem_ctrls.rdQLenPdf::25                      0                      
-system.mem_ctrls.rdQLenPdf::26                      0                      
-system.mem_ctrls.rdQLenPdf::27                      0                      
-system.mem_ctrls.rdQLenPdf::28                      0                      
-system.mem_ctrls.rdQLenPdf::29                      0                      
-system.mem_ctrls.rdQLenPdf::30                      0                      
-system.mem_ctrls.rdQLenPdf::31                      0                      
-system.mem_ctrls.wrQLenPdf::0                       1                      
-system.mem_ctrls.wrQLenPdf::1                       1                      
-system.mem_ctrls.wrQLenPdf::2                       1                      
-system.mem_ctrls.wrQLenPdf::3                       1                      
-system.mem_ctrls.wrQLenPdf::4                       1                      
-system.mem_ctrls.wrQLenPdf::5                       1                      
-system.mem_ctrls.wrQLenPdf::6                       1                      
-system.mem_ctrls.wrQLenPdf::7                       1                      
-system.mem_ctrls.wrQLenPdf::8                       1                      
-system.mem_ctrls.wrQLenPdf::9                       1                      
-system.mem_ctrls.wrQLenPdf::10                      1                      
-system.mem_ctrls.wrQLenPdf::11                      1                      
-system.mem_ctrls.wrQLenPdf::12                      1                      
-system.mem_ctrls.wrQLenPdf::13                      1                      
-system.mem_ctrls.wrQLenPdf::14                      1                      
-system.mem_ctrls.wrQLenPdf::15                      6                      
-system.mem_ctrls.wrQLenPdf::16                      8                      
-system.mem_ctrls.wrQLenPdf::17                     42                      
-system.mem_ctrls.wrQLenPdf::18                     48                      
-system.mem_ctrls.wrQLenPdf::19                     48                      
-system.mem_ctrls.wrQLenPdf::20                     48                      
-system.mem_ctrls.wrQLenPdf::21                     50                      
-system.mem_ctrls.wrQLenPdf::22                     47                      
-system.mem_ctrls.wrQLenPdf::23                     46                      
-system.mem_ctrls.wrQLenPdf::24                     46                      
-system.mem_ctrls.wrQLenPdf::25                     46                      
-system.mem_ctrls.wrQLenPdf::26                     46                      
-system.mem_ctrls.wrQLenPdf::27                     46                      
-system.mem_ctrls.wrQLenPdf::28                     46                      
-system.mem_ctrls.wrQLenPdf::29                     46                      
-system.mem_ctrls.wrQLenPdf::30                     46                      
-system.mem_ctrls.wrQLenPdf::31                     46                      
-system.mem_ctrls.wrQLenPdf::32                     46                      
-system.mem_ctrls.wrQLenPdf::33                      0                      
-system.mem_ctrls.wrQLenPdf::34                      0                      
-system.mem_ctrls.wrQLenPdf::35                      0                      
-system.mem_ctrls.wrQLenPdf::36                      0                      
-system.mem_ctrls.wrQLenPdf::37                      0                      
-system.mem_ctrls.wrQLenPdf::38                      0                      
-system.mem_ctrls.wrQLenPdf::39                      0                      
-system.mem_ctrls.wrQLenPdf::40                      0                      
-system.mem_ctrls.wrQLenPdf::41                      0                      
-system.mem_ctrls.wrQLenPdf::42                      0                      
-system.mem_ctrls.wrQLenPdf::43                      0                      
-system.mem_ctrls.wrQLenPdf::44                      0                      
-system.mem_ctrls.wrQLenPdf::45                      0                      
-system.mem_ctrls.wrQLenPdf::46                      0                      
-system.mem_ctrls.wrQLenPdf::47                      0                      
-system.mem_ctrls.wrQLenPdf::48                      0                      
-system.mem_ctrls.wrQLenPdf::49                      0                      
-system.mem_ctrls.wrQLenPdf::50                      0                      
-system.mem_ctrls.wrQLenPdf::51                      0                      
-system.mem_ctrls.wrQLenPdf::52                      0                      
-system.mem_ctrls.wrQLenPdf::53                      0                      
-system.mem_ctrls.wrQLenPdf::54                      0                      
-system.mem_ctrls.wrQLenPdf::55                      0                      
-system.mem_ctrls.wrQLenPdf::56                      0                      
-system.mem_ctrls.wrQLenPdf::57                      0                      
-system.mem_ctrls.wrQLenPdf::58                      0                      
-system.mem_ctrls.wrQLenPdf::59                      0                      
-system.mem_ctrls.wrQLenPdf::60                      0                      
-system.mem_ctrls.wrQLenPdf::61                      0                      
-system.mem_ctrls.wrQLenPdf::62                      0                      
-system.mem_ctrls.wrQLenPdf::63                      0                      
-system.mem_ctrls.bytesPerActivate::samples          268                      
-system.mem_ctrls.bytesPerActivate::mean    349.134328                      
-system.mem_ctrls.bytesPerActivate::gmean   236.095994                      
-system.mem_ctrls.bytesPerActivate::stdev   304.006943                      
-system.mem_ctrls.bytesPerActivate::0-127           53     19.78%     19.78%
-system.mem_ctrls.bytesPerActivate::128-255           78     29.10%     48.88%
-system.mem_ctrls.bytesPerActivate::256-383           42     15.67%     64.55%
-system.mem_ctrls.bytesPerActivate::384-511           21      7.84%     72.39%
-system.mem_ctrls.bytesPerActivate::512-639           21      7.84%     80.22%
-system.mem_ctrls.bytesPerActivate::640-767           18      6.72%     86.94%
-system.mem_ctrls.bytesPerActivate::768-895            4      1.49%     88.43%
-system.mem_ctrls.bytesPerActivate::896-1023            4      1.49%     89.93%
-system.mem_ctrls.bytesPerActivate::1024-1151           27     10.07%    100.00%
-system.mem_ctrls.bytesPerActivate::total          268                      
-system.mem_ctrls.rdPerTurnAround::samples           46                      
-system.mem_ctrls.rdPerTurnAround::mean      16.130435                      
-system.mem_ctrls.rdPerTurnAround::gmean     15.900803                      
-system.mem_ctrls.rdPerTurnAround::stdev      3.370517                      
-system.mem_ctrls.rdPerTurnAround::12-13             4      8.70%      8.70%
-system.mem_ctrls.rdPerTurnAround::14-15            16     34.78%     43.48%
-system.mem_ctrls.rdPerTurnAround::16-17            20     43.48%     86.96%
-system.mem_ctrls.rdPerTurnAround::18-19             3      6.52%     93.48%
-system.mem_ctrls.rdPerTurnAround::20-21             2      4.35%     97.83%
-system.mem_ctrls.rdPerTurnAround::36-37             1      2.17%    100.00%
-system.mem_ctrls.rdPerTurnAround::total            46                      
-system.mem_ctrls.wrPerTurnAround::samples           46                      
-system.mem_ctrls.wrPerTurnAround::mean      16.304348                      
-system.mem_ctrls.wrPerTurnAround::gmean     16.283869                      
-system.mem_ctrls.wrPerTurnAround::stdev      0.865886                      
-system.mem_ctrls.wrPerTurnAround::16               40     86.96%     86.96%
-system.mem_ctrls.wrPerTurnAround::17                1      2.17%     89.13%
-system.mem_ctrls.wrPerTurnAround::18                3      6.52%     95.65%
-system.mem_ctrls.wrPerTurnAround::19                1      2.17%     97.83%
-system.mem_ctrls.wrPerTurnAround::20                1      2.17%    100.00%
-system.mem_ctrls.wrPerTurnAround::total            46                      
-system.mem_ctrls.totQLat                        14105                      
-system.mem_ctrls.totMemAccLat                   28298                      
-system.mem_ctrls.totBusLat                       3735                      
-system.mem_ctrls.avgQLat                        18.88                      
-system.mem_ctrls.avgBusLat                       5.00                      
-system.mem_ctrls.avgMemAccLat                   37.88                      
-system.mem_ctrls.avgRdBW                       493.94                      
-system.mem_ctrls.avgWrBW                       495.92                      
-system.mem_ctrls.avgRdBWSys                    928.36                      
-system.mem_ctrls.avgWrBWSys                    925.72                      
-system.mem_ctrls.peakBW                      12800.00                      
-system.mem_ctrls.busUtil                         7.73                      
-system.mem_ctrls.busUtilRead                     3.86                      
-system.mem_ctrls.busUtilWrite                    3.87                      
-system.mem_ctrls.avgRdQLen                       1.00                      
-system.mem_ctrls.avgWrQLen                      26.01                      
-system.mem_ctrls.readRowHits                      522                      
-system.mem_ctrls.writeRowHits                     700                      
-system.mem_ctrls.readRowHitRate                 69.88                      
-system.mem_ctrls.writeRowHitRate                90.67                      
-system.mem_ctrls.avgGap                         34.49                      
-system.mem_ctrls.pageHitRate                    80.45                      
-system.mem_ctrls_0.actEnergy                  1635060                      
-system.mem_ctrls_0.preEnergy                   861672                      
-system.mem_ctrls_0.readEnergy                 7425600                      
-system.mem_ctrls_0.writeEnergy                5462208                      
-system.mem_ctrls_0.refreshEnergy         7375680.000000                      
-system.mem_ctrls_0.actBackEnergy             14032032                      
-system.mem_ctrls_0.preBackEnergy               159744                      
-system.mem_ctrls_0.actPowerDownEnergy        27928632                      
-system.mem_ctrls_0.prePowerDownEnergy         1672320                      
-system.mem_ctrls_0.selfRefreshEnergy                0                      
-system.mem_ctrls_0.totalEnergy               66552948                      
-system.mem_ctrls_0.averagePower            687.601488                      
-system.mem_ctrls_0.totalIdleTime                65403                      
-system.mem_ctrls_0.memoryStateTime::IDLE           52                      
-system.mem_ctrls_0.memoryStateTime::REF          3120                      
-system.mem_ctrls_0.memoryStateTime::SREF            0                      
-system.mem_ctrls_0.memoryStateTime::PRE_PDN         4355                      
-system.mem_ctrls_0.memoryStateTime::ACT         28016                      
-system.mem_ctrls_0.memoryStateTime::ACT_PDN        61247                      
-system.mem_ctrls_1.actEnergy                   328440                      
-system.mem_ctrls_1.preEnergy                   173880                      
-system.mem_ctrls_1.readEnergy                 1108128                      
-system.mem_ctrls_1.writeEnergy                 801792                      
-system.mem_ctrls_1.refreshEnergy         7990320.000000                      
-system.mem_ctrls_1.actBackEnergy             13406400                      
-system.mem_ctrls_1.preBackEnergy               726528                      
-system.mem_ctrls_1.actPowerDownEnergy        18852864                      
-system.mem_ctrls_1.prePowerDownEnergy         7713408                      
-system.mem_ctrls_1.selfRefreshEnergy          2080560                      
-system.mem_ctrls_1.totalEnergy               53182320                      
-system.mem_ctrls_1.averagePower            549.460895                      
-system.mem_ctrls_1.totalIdleTime                65465                      
-system.mem_ctrls_1.memoryStateTime::IDLE         1488                      
-system.mem_ctrls_1.memoryStateTime::REF          3392                      
-system.mem_ctrls_1.memoryStateTime::SREF         4067                      
-system.mem_ctrls_1.memoryStateTime::PRE_PDN        20087                      
-system.mem_ctrls_1.memoryStateTime::ACT         26412                      
-system.mem_ctrls_1.memoryStateTime::ACT_PDN        41344                      
-system.pwrStateResidencyTicks::UNDEFINED        96790                      
-system.cpu.clk_domain.clock                         1                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.workload.numSyscalls                     9                      
-system.cpu.pwrStateResidencyTicks::ON           96790                      
-system.cpu.numCycles                            96790                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        5552                      
-system.cpu.committedOps                          5561                      
-system.cpu.num_int_alu_accesses                  5498                      
-system.cpu.num_fp_alu_accesses                     12                      
-system.cpu.num_vec_alu_accesses                     0                      
-system.cpu.num_func_calls                         282                      
-system.cpu.num_conditional_control_insts          914                      
-system.cpu.num_int_insts                         5498                      
-system.cpu.num_fp_insts                            12                      
-system.cpu.num_vec_insts                            0                      
-system.cpu.num_int_register_reads                7038                      
-system.cpu.num_int_register_writes               3414                      
-system.cpu.num_fp_register_reads                   12                      
-system.cpu.num_fp_register_writes                   0                      
-system.cpu.num_vec_register_reads                   0                      
-system.cpu.num_vec_register_writes                  0                      
-system.cpu.num_mem_refs                          2162                      
-system.cpu.num_load_insts                        1082                      
-system.cpu.num_store_insts                       1080                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                      96790                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1196                      
-system.cpu.op_class::No_OpClass                    10      0.18%      0.18%
-system.cpu.op_class::IntAlu                      3392     60.90%     61.08%
-system.cpu.op_class::IntMult                        2      0.04%     61.11%
-system.cpu.op_class::IntDiv                         4      0.07%     61.18%
-system.cpu.op_class::FloatAdd                       0      0.00%     61.18%
-system.cpu.op_class::FloatCmp                       0      0.00%     61.18%
-system.cpu.op_class::FloatCvt                       0      0.00%     61.18%
-system.cpu.op_class::FloatMult                      0      0.00%     61.18%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     61.18%
-system.cpu.op_class::FloatDiv                       0      0.00%     61.18%
-system.cpu.op_class::FloatMisc                      0      0.00%     61.18%
-system.cpu.op_class::FloatSqrt                      0      0.00%     61.18%
-system.cpu.op_class::SimdAdd                        0      0.00%     61.18%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     61.18%
-system.cpu.op_class::SimdAlu                        0      0.00%     61.18%
-system.cpu.op_class::SimdCmp                        0      0.00%     61.18%
-system.cpu.op_class::SimdCvt                        0      0.00%     61.18%
-system.cpu.op_class::SimdMisc                       0      0.00%     61.18%
-system.cpu.op_class::SimdMult                       0      0.00%     61.18%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     61.18%
-system.cpu.op_class::SimdShift                      0      0.00%     61.18%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     61.18%
-system.cpu.op_class::SimdSqrt                       0      0.00%     61.18%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     61.18%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     61.18%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     61.18%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     61.18%
-system.cpu.op_class::MemRead                     1082     19.43%     80.61%
-system.cpu.op_class::MemWrite                    1068     19.17%     99.78%
-system.cpu.op_class::FloatMemRead                   0      0.00%     99.78%
-system.cpu.op_class::FloatMemWrite                 12      0.22%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       5570                      
-system.ruby.clk_domain.clock                        1                      
-system.ruby.pwrStateResidencyTicks::UNDEFINED        96790                      
-system.ruby.delayHist::bucket_size                  1                      
-system.ruby.delayHist::max_bucket                   9                      
-system.ruby.delayHist::samples                   2804                      
-system.ruby.delayHist                    |        2804    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.delayHist::total                     2804                      
-system.ruby.outstanding_req_hist_seqr::bucket_size            1                      
-system.ruby.outstanding_req_hist_seqr::max_bucket            9                      
-system.ruby.outstanding_req_hist_seqr::samples         8758                      
-system.ruby.outstanding_req_hist_seqr::mean            1                      
-system.ruby.outstanding_req_hist_seqr::gmean            1                      
-system.ruby.outstanding_req_hist_seqr    |           0      0.00%      0.00% |        8758    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.outstanding_req_hist_seqr::total         8758                      
-system.ruby.latency_hist_seqr::bucket_size           64                      
-system.ruby.latency_hist_seqr::max_bucket          639                      
-system.ruby.latency_hist_seqr::samples           8757                      
-system.ruby.latency_hist_seqr::mean         10.052872                      
-system.ruby.latency_hist_seqr::gmean         1.876712                      
-system.ruby.latency_hist_seqr::stdev        24.945460                      
-system.ruby.latency_hist_seqr            |        8027     91.66%     91.66% |         684      7.81%     99.47% |          31      0.35%     99.83% |           9      0.10%     99.93% |           3      0.03%     99.97% |           2      0.02%     99.99% |           0      0.00%     99.99% |           1      0.01%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.latency_hist_seqr::total             8757                      
-system.ruby.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.hit_latency_hist_seqr::samples         7353                      
-system.ruby.hit_latency_hist_seqr::mean             1                      
-system.ruby.hit_latency_hist_seqr::gmean            1                      
-system.ruby.hit_latency_hist_seqr        |           0      0.00%      0.00% |        7353    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.hit_latency_hist_seqr::total         7353                      
-system.ruby.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.miss_latency_hist_seqr::samples         1404                      
-system.ruby.miss_latency_hist_seqr::mean    57.464387                      
-system.ruby.miss_latency_hist_seqr::gmean    50.725860                      
-system.ruby.miss_latency_hist_seqr::stdev    34.707342                      
-system.ruby.miss_latency_hist_seqr       |         674     48.01%     48.01% |         684     48.72%     96.72% |          31      2.21%     98.93% |           9      0.64%     99.57% |           3      0.21%     99.79% |           2      0.14%     99.93% |           0      0.00%     99.93% |           1      0.07%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.miss_latency_hist_seqr::total         1404                      
-system.ruby.Directory.incomplete_times_seqr         1403                      
-system.ruby.dir_cntrl0.forwardFromDir.avg_buf_msgs     0.014464                      
-system.ruby.dir_cntrl0.forwardFromDir.avg_stall_time     0.997087                      
-system.ruby.dir_cntrl0.requestToDir.avg_buf_msgs     0.028970                      
-system.ruby.dir_cntrl0.requestToDir.avg_stall_time    11.753985                      
-system.ruby.dir_cntrl0.responseFromDir.avg_buf_msgs     0.014505                      
-system.ruby.dir_cntrl0.responseFromDir.avg_stall_time     0.999287                      
-system.ruby.dir_cntrl0.responseFromMemory.avg_buf_msgs     0.028970                      
-system.ruby.dir_cntrl0.responseFromMemory.avg_stall_time     0.999297                      
-system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED        96790                      
-system.ruby.l1_cntrl0.cacheMemory.demand_hits         7353                      
-system.ruby.l1_cntrl0.cacheMemory.demand_misses         1404                      
-system.ruby.l1_cntrl0.cacheMemory.demand_accesses         8757                      
-system.ruby.l1_cntrl0.forwardToCache.avg_buf_msgs     0.014464                      
-system.ruby.l1_cntrl0.forwardToCache.avg_stall_time     6.979172                      
-system.ruby.l1_cntrl0.mandatoryQueue.avg_buf_msgs     0.090484                      
-system.ruby.l1_cntrl0.mandatoryQueue.avg_stall_time     0.999990                      
-system.ruby.l1_cntrl0.requestFromCache.avg_buf_msgs     0.057939                      
-system.ruby.l1_cntrl0.requestFromCache.avg_stall_time     1.999938                      
-system.ruby.l1_cntrl0.responseToCache.avg_buf_msgs     0.014505                      
-system.ruby.l1_cntrl0.responseToCache.avg_stall_time     6.994576                      
-system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED        96790                      
-system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED        96790                      
-system.ruby.memctrl_clk_domain.clock                3                      
-system.ruby.network.routers0.port_buffers03.avg_buf_msgs     0.014464                      
-system.ruby.network.routers0.port_buffers03.avg_stall_time     5.982209                      
-system.ruby.network.routers0.port_buffers04.avg_buf_msgs     0.014505                      
-system.ruby.network.routers0.port_buffers04.avg_stall_time     5.995413                      
-system.ruby.network.routers0.port_buffers07.avg_buf_msgs     0.086826                      
-system.ruby.network.routers0.port_buffers07.avg_stall_time     6.754812                      
-system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED        96790                      
-system.ruby.network.routers0.percent_links_utilized     7.242484                      
-system.ruby.network.routers0.msg_count.Control::2         1404                      
-system.ruby.network.routers0.msg_count.Data::2         1400                      
-system.ruby.network.routers0.msg_count.Response_Data::4         1404                      
-system.ruby.network.routers0.msg_count.Writeback_Control::3         1400                      
-system.ruby.network.routers0.msg_bytes.Control::2        11232                      
-system.ruby.network.routers0.msg_bytes.Data::2       100800                      
-system.ruby.network.routers0.msg_bytes.Response_Data::4       101088                      
-system.ruby.network.routers0.msg_bytes.Writeback_Control::3        11200                      
-system.ruby.network.routers1.port_buffers02.avg_buf_msgs     0.028970                      
-system.ruby.network.routers1.port_buffers02.avg_stall_time    10.754192                      
-system.ruby.network.routers1.port_buffers06.avg_buf_msgs     0.014464                      
-system.ruby.network.routers1.port_buffers06.avg_stall_time     1.994152                      
-system.ruby.network.routers1.port_buffers07.avg_buf_msgs     0.014505                      
-system.ruby.network.routers1.port_buffers07.avg_stall_time     1.998554                      
-system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED        96790                      
-system.ruby.network.routers1.percent_links_utilized     7.242484                      
-system.ruby.network.routers1.msg_count.Control::2         1404                      
-system.ruby.network.routers1.msg_count.Data::2         1400                      
-system.ruby.network.routers1.msg_count.Response_Data::4         1404                      
-system.ruby.network.routers1.msg_count.Writeback_Control::3         1400                      
-system.ruby.network.routers1.msg_bytes.Control::2        11232                      
-system.ruby.network.routers1.msg_bytes.Data::2       100800                      
-system.ruby.network.routers1.msg_bytes.Response_Data::4       101088                      
-system.ruby.network.routers1.msg_bytes.Writeback_Control::3        11200                      
-system.ruby.network.int_link_buffers02.avg_buf_msgs     0.028970                      
-system.ruby.network.int_link_buffers02.avg_stall_time     7.754688                      
-system.ruby.network.int_link_buffers08.avg_buf_msgs     0.014464                      
-system.ruby.network.int_link_buffers08.avg_stall_time     2.991198                      
-system.ruby.network.int_link_buffers09.avg_buf_msgs     0.014505                      
-system.ruby.network.int_link_buffers09.avg_stall_time     2.997799                      
-system.ruby.network.int_link_buffers13.avg_buf_msgs     0.014464                      
-system.ruby.network.int_link_buffers13.avg_stall_time     4.985226                      
-system.ruby.network.int_link_buffers14.avg_buf_msgs     0.014505                      
-system.ruby.network.int_link_buffers14.avg_stall_time     4.996229                      
-system.ruby.network.int_link_buffers17.avg_buf_msgs     0.028970                      
-system.ruby.network.int_link_buffers17.avg_stall_time     9.754378                      
-system.ruby.network.routers2.port_buffers03.avg_buf_msgs     0.014464                      
-system.ruby.network.routers2.port_buffers03.avg_stall_time     3.988222                      
-system.ruby.network.routers2.port_buffers04.avg_buf_msgs     0.014505                      
-system.ruby.network.routers2.port_buffers04.avg_stall_time     3.997025                      
-system.ruby.network.routers2.port_buffers07.avg_buf_msgs     0.028970                      
-system.ruby.network.routers2.port_buffers07.avg_stall_time     8.754543                      
-system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED        96790                      
-system.ruby.network.routers2.percent_links_utilized     7.242484                      
-system.ruby.network.routers2.msg_count.Control::2         1404                      
-system.ruby.network.routers2.msg_count.Data::2         1400                      
-system.ruby.network.routers2.msg_count.Response_Data::4         1404                      
-system.ruby.network.routers2.msg_count.Writeback_Control::3         1400                      
-system.ruby.network.routers2.msg_bytes.Control::2        11232                      
-system.ruby.network.routers2.msg_bytes.Data::2       100800                      
-system.ruby.network.routers2.msg_bytes.Response_Data::4       101088                      
-system.ruby.network.routers2.msg_bytes.Writeback_Control::3        11200                      
-system.ruby.network.pwrStateResidencyTicks::UNDEFINED        96790                      
-system.ruby.network.msg_count.Control            4212                      
-system.ruby.network.msg_count.Data               4200                      
-system.ruby.network.msg_count.Response_Data         4212                      
-system.ruby.network.msg_count.Writeback_Control         4200                      
-system.ruby.network.msg_byte.Control            33696                      
-system.ruby.network.msg_byte.Data              302400                      
-system.ruby.network.msg_byte.Response_Data       303264                      
-system.ruby.network.msg_byte.Writeback_Control        33600                      
-system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED        96790                      
-system.ruby.network.routers0.throttle0.link_utilization     7.250749                      
-system.ruby.network.routers0.throttle0.msg_count.Response_Data::4         1404                      
-system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3         1400                      
-system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4       101088                      
-system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3        11200                      
-system.ruby.network.routers0.throttle1.link_utilization     7.234218                      
-system.ruby.network.routers0.throttle1.msg_count.Control::2         1404                      
-system.ruby.network.routers0.throttle1.msg_count.Data::2         1400                      
-system.ruby.network.routers0.throttle1.msg_bytes.Control::2        11232                      
-system.ruby.network.routers0.throttle1.msg_bytes.Data::2       100800                      
-system.ruby.network.routers1.throttle0.link_utilization     7.234218                      
-system.ruby.network.routers1.throttle0.msg_count.Control::2         1404                      
-system.ruby.network.routers1.throttle0.msg_count.Data::2         1400                      
-system.ruby.network.routers1.throttle0.msg_bytes.Control::2        11232                      
-system.ruby.network.routers1.throttle0.msg_bytes.Data::2       100800                      
-system.ruby.network.routers1.throttle1.link_utilization     7.250749                      
-system.ruby.network.routers1.throttle1.msg_count.Response_Data::4         1404                      
-system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3         1400                      
-system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4       101088                      
-system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3        11200                      
-system.ruby.network.routers2.throttle0.link_utilization     7.250749                      
-system.ruby.network.routers2.throttle0.msg_count.Response_Data::4         1404                      
-system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3         1400                      
-system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4       101088                      
-system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3        11200                      
-system.ruby.network.routers2.throttle1.link_utilization     7.234218                      
-system.ruby.network.routers2.throttle1.msg_count.Control::2         1404                      
-system.ruby.network.routers2.throttle1.msg_count.Data::2         1400                      
-system.ruby.network.routers2.throttle1.msg_bytes.Control::2        11232                      
-system.ruby.network.routers2.throttle1.msg_bytes.Data::2       100800                      
-system.ruby.delayVCHist.vnet_1::bucket_size            1                      
-system.ruby.delayVCHist.vnet_1::max_bucket            9                      
-system.ruby.delayVCHist.vnet_1::samples          1404                      
-system.ruby.delayVCHist.vnet_1           |        1404    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.delayVCHist.vnet_1::total            1404                      
-system.ruby.delayVCHist.vnet_2::bucket_size            1                      
-system.ruby.delayVCHist.vnet_2::max_bucket            9                      
-system.ruby.delayVCHist.vnet_2::samples          1400                      
-system.ruby.delayVCHist.vnet_2           |        1400    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.delayVCHist.vnet_2::total            1400                      
-system.ruby.LD.latency_hist_seqr::bucket_size           64                      
-system.ruby.LD.latency_hist_seqr::max_bucket          639                      
-system.ruby.LD.latency_hist_seqr::samples         1074                      
-system.ruby.LD.latency_hist_seqr::mean      26.591248                      
-system.ruby.LD.latency_hist_seqr::gmean      6.709391                      
-system.ruby.LD.latency_hist_seqr::stdev     34.553301                      
-system.ruby.LD.latency_hist_seqr         |         848     78.96%     78.96% |         215     20.02%     98.98% |           7      0.65%     99.63% |           3      0.28%     99.91% |           0      0.00%     99.91% |           0      0.00%     99.91% |           0      0.00%     99.91% |           1      0.09%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.latency_hist_seqr::total          1074                      
-system.ruby.LD.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.LD.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.LD.hit_latency_hist_seqr::samples          542                      
-system.ruby.LD.hit_latency_hist_seqr::mean            1                      
-system.ruby.LD.hit_latency_hist_seqr::gmean            1                      
-system.ruby.LD.hit_latency_hist_seqr     |           0      0.00%      0.00% |         542    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.hit_latency_hist_seqr::total          542                      
-system.ruby.LD.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.LD.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.LD.miss_latency_hist_seqr::samples          532                      
-system.ruby.LD.miss_latency_hist_seqr::mean    52.663534                      
-system.ruby.LD.miss_latency_hist_seqr::gmean    46.655770                      
-system.ruby.LD.miss_latency_hist_seqr::stdev    32.604772                      
-system.ruby.LD.miss_latency_hist_seqr    |         306     57.52%     57.52% |         215     40.41%     97.93% |           7      1.32%     99.25% |           3      0.56%     99.81% |           0      0.00%     99.81% |           0      0.00%     99.81% |           0      0.00%     99.81% |           1      0.19%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.miss_latency_hist_seqr::total          532                      
-system.ruby.ST.latency_hist_seqr::bucket_size           32                      
-system.ruby.ST.latency_hist_seqr::max_bucket          319                      
-system.ruby.ST.latency_hist_seqr::samples         1072                      
-system.ruby.ST.latency_hist_seqr::mean      16.008396                      
-system.ruby.ST.latency_hist_seqr::gmean      2.979056                      
-system.ruby.ST.latency_hist_seqr::stdev     29.501031                      
-system.ruby.ST.latency_hist_seqr         |         769     71.74%     71.74% |         170     15.86%     87.59% |         122     11.38%     98.97% |           0      0.00%     98.97% |           2      0.19%     99.16% |           6      0.56%     99.72% |           3      0.28%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.latency_hist_seqr::total          1072                      
-system.ruby.ST.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.ST.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.ST.hit_latency_hist_seqr::samples          769                      
-system.ruby.ST.hit_latency_hist_seqr::mean            1                      
-system.ruby.ST.hit_latency_hist_seqr::gmean            1                      
-system.ruby.ST.hit_latency_hist_seqr     |           0      0.00%      0.00% |         769    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.hit_latency_hist_seqr::total          769                      
-system.ruby.ST.miss_latency_hist_seqr::bucket_size           32                      
-system.ruby.ST.miss_latency_hist_seqr::max_bucket          319                      
-system.ruby.ST.miss_latency_hist_seqr::samples          303                      
-system.ruby.ST.miss_latency_hist_seqr::mean    54.099010                      
-system.ruby.ST.miss_latency_hist_seqr::gmean    47.562894                      
-system.ruby.ST.miss_latency_hist_seqr::stdev    32.514033                      
-system.ruby.ST.miss_latency_hist_seqr    |           0      0.00%      0.00% |         170     56.11%     56.11% |         122     40.26%     96.37% |           0      0.00%     96.37% |           2      0.66%     97.03% |           6      1.98%     99.01% |           3      0.99%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.miss_latency_hist_seqr::total          303                      
-system.ruby.IFETCH.latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.latency_hist_seqr::samples         6595                      
-system.ruby.IFETCH.latency_hist_seqr::mean     6.403487                      
-system.ruby.IFETCH.latency_hist_seqr::gmean     1.415992                      
-system.ruby.IFETCH.latency_hist_seqr::stdev    20.648323                      
-system.ruby.IFETCH.latency_hist_seqr     |        6225     94.39%     94.39% |         346      5.25%     99.64% |          16      0.24%     99.88% |           3      0.05%     99.92% |           3      0.05%     99.97% |           2      0.03%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.latency_hist_seqr::total         6595                      
-system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.IFETCH.hit_latency_hist_seqr::samples         6027                      
-system.ruby.IFETCH.hit_latency_hist_seqr::mean            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr::gmean            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr |           0      0.00%      0.00% |        6027    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.hit_latency_hist_seqr::total         6027                      
-system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.miss_latency_hist_seqr::samples          568                      
-system.ruby.IFETCH.miss_latency_hist_seqr::mean    63.739437                      
-system.ruby.IFETCH.miss_latency_hist_seqr::gmean    56.748499                      
-system.ruby.IFETCH.miss_latency_hist_seqr::stdev    36.807077                      
-system.ruby.IFETCH.miss_latency_hist_seqr |         198     34.86%     34.86% |         346     60.92%     95.77% |          16      2.82%     98.59% |           3      0.53%     99.12% |           3      0.53%     99.65% |           2      0.35%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.miss_latency_hist_seqr::total          568                      
-system.ruby.Load_Linked.latency_hist_seqr::bucket_size            8                      
-system.ruby.Load_Linked.latency_hist_seqr::max_bucket           79                      
-system.ruby.Load_Linked.latency_hist_seqr::samples            8                      
-system.ruby.Load_Linked.latency_hist_seqr::mean     9.250000                      
-system.ruby.Load_Linked.latency_hist_seqr::gmean     1.691451                      
-system.ruby.Load_Linked.latency_hist_seqr::stdev    23.334524                      
-system.ruby.Load_Linked.latency_hist_seqr |           7     87.50%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           1     12.50%    100.00% |           0      0.00%    100.00%
-system.ruby.Load_Linked.latency_hist_seqr::total            8                      
-system.ruby.Load_Linked.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.Load_Linked.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.Load_Linked.hit_latency_hist_seqr::samples            7                      
-system.ruby.Load_Linked.hit_latency_hist_seqr::mean            1                      
-system.ruby.Load_Linked.hit_latency_hist_seqr::gmean            1                      
-system.ruby.Load_Linked.hit_latency_hist_seqr |           0      0.00%      0.00% |           7    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Load_Linked.hit_latency_hist_seqr::total            7                      
-system.ruby.Load_Linked.miss_latency_hist_seqr::bucket_size            8                      
-system.ruby.Load_Linked.miss_latency_hist_seqr::max_bucket           79                      
-system.ruby.Load_Linked.miss_latency_hist_seqr::samples            1                      
-system.ruby.Load_Linked.miss_latency_hist_seqr::mean           67                      
-system.ruby.Load_Linked.miss_latency_hist_seqr::gmean    67.000000                      
-system.ruby.Load_Linked.miss_latency_hist_seqr::stdev          nan                      
-system.ruby.Load_Linked.miss_latency_hist_seqr |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           1    100.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Load_Linked.miss_latency_hist_seqr::total            1                      
-system.ruby.Store_Conditional.latency_hist_seqr::bucket_size            1                      
-system.ruby.Store_Conditional.latency_hist_seqr::max_bucket            9                      
-system.ruby.Store_Conditional.latency_hist_seqr::samples            8                      
-system.ruby.Store_Conditional.latency_hist_seqr::mean            1                      
-system.ruby.Store_Conditional.latency_hist_seqr::gmean            1                      
-system.ruby.Store_Conditional.latency_hist_seqr |           0      0.00%      0.00% |           8    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Store_Conditional.latency_hist_seqr::total            8                      
-system.ruby.Store_Conditional.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.Store_Conditional.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.Store_Conditional.hit_latency_hist_seqr::samples            8                      
-system.ruby.Store_Conditional.hit_latency_hist_seqr::mean            1                      
-system.ruby.Store_Conditional.hit_latency_hist_seqr::gmean            1                      
-system.ruby.Store_Conditional.hit_latency_hist_seqr |           0      0.00%      0.00% |           8    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Store_Conditional.hit_latency_hist_seqr::total            8                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::samples         1404                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::mean    57.464387                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::gmean    50.725860                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::stdev    34.707342                      
-system.ruby.Directory.miss_mach_latency_hist_seqr |         674     48.01%     48.01% |         684     48.72%     96.72% |          31      2.21%     98.93% |           9      0.64%     99.57% |           3      0.21%     99.79% |           2      0.14%     99.93% |           0      0.00%     99.93% |           1      0.07%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_mach_latency_hist_seqr::total         1404                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size            8                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket           79                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean           75                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean    75.000000                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           1    100.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total            1                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples          532                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean    52.663534                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean    46.655770                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev    32.604772                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr |         306     57.52%     57.52% |         215     40.41%     97.93% |           7      1.32%     99.25% |           3      0.56%     99.81% |           0      0.00%     99.81% |           0      0.00%     99.81% |           0      0.00%     99.81% |           1      0.19%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total          532                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size           32                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket          319                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples          303                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean    54.099010                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean    47.562894                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev    32.514033                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr |           0      0.00%      0.00% |         170     56.11%     56.11% |         122     40.26%     96.37% |           0      0.00%     96.37% |           2      0.66%     97.03% |           6      1.98%     99.01% |           3      0.99%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total          303                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples          568                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean    63.739437                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean    56.748499                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev    36.807077                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr |         198     34.86%     34.86% |         346     60.92%     95.77% |          16      2.82%     98.59% |           3      0.53%     99.12% |           3      0.53%     99.65% |           2      0.35%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total          568                      
-system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::bucket_size            8                      
-system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::max_bucket           79                      
-system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::samples            1                      
-system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::mean           67                      
-system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::gmean    67.000000                      
-system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::stdev          nan                      
-system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           1    100.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::total            1                      
-system.ruby.Directory_Controller.GETX            1404      0.00%      0.00%
-system.ruby.Directory_Controller.PUTX            1400      0.00%      0.00%
-system.ruby.Directory_Controller.Memory_Data         1404      0.00%      0.00%
-system.ruby.Directory_Controller.Memory_Ack         1400      0.00%      0.00%
-system.ruby.Directory_Controller.I.GETX          1404      0.00%      0.00%
-system.ruby.Directory_Controller.M.PUTX          1400      0.00%      0.00%
-system.ruby.Directory_Controller.IM.Memory_Data         1404      0.00%      0.00%
-system.ruby.Directory_Controller.MI.Memory_Ack         1400      0.00%      0.00%
-system.ruby.L1Cache_Controller.Load              1074      0.00%      0.00%
-system.ruby.L1Cache_Controller.Ifetch            6595      0.00%      0.00%
-system.ruby.L1Cache_Controller.Store             1088      0.00%      0.00%
-system.ruby.L1Cache_Controller.Data              1404      0.00%      0.00%
-system.ruby.L1Cache_Controller.Replacement         1400      0.00%      0.00%
-system.ruby.L1Cache_Controller.Writeback_Ack         1400      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Load             532      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Ifetch           568      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Store            304      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Load             542      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Ifetch          6027      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Store            784      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Replacement         1400      0.00%      0.00%
-system.ruby.L1Cache_Controller.MI.Writeback_Ack         1400      0.00%      0.00%
-system.ruby.L1Cache_Controller.IS.Data           1100      0.00%      0.00%
-system.ruby.L1Cache_Controller.IM.Data            304      0.00%      0.00%
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.ini
deleted file mode 100644 (file)
index 9688a58..0000000
+++ /dev/null
@@ -1,383 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-wait_for_remote_gdb=false
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=RiscvInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=RiscvISA
-eventq_index=0
-
-[system.cpu.itb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.json b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.json
deleted file mode 100644 (file)
index 5efae3a..0000000
+++ /dev/null
@@ -1,511 +0,0 @@
-{
-    "name": null, 
-    "sim_quantum": 0, 
-    "system": {
-        "kernel": "", 
-        "mmap_using_noreserve": false, 
-        "kernel_addr_check": true, 
-        "membus": {
-            "point_of_coherency": true, 
-            "system": "system", 
-            "response_latency": 2, 
-            "cxx_class": "CoherentXBar", 
-            "forward_latency": 4, 
-            "clk_domain": "system.clk_domain", 
-            "width": 16, 
-            "eventq_index": 0, 
-            "default_p_state": "UNDEFINED", 
-            "p_state_clk_gate_max": 1000000000000, 
-            "master": {
-                "peer": [
-                    "system.physmem.port"
-                ], 
-                "role": "MASTER"
-            }, 
-            "type": "CoherentXBar", 
-            "frontend_latency": 3, 
-            "slave": {
-                "peer": [
-                    "system.system_port", 
-                    "system.cpu.l2cache.mem_side"
-                ], 
-                "role": "SLAVE"
-            }, 
-            "p_state_clk_gate_min": 1000, 
-            "snoop_filter": {
-                "name": "snoop_filter", 
-                "system": "system", 
-                "max_capacity": 8388608, 
-                "eventq_index": 0, 
-                "cxx_class": "SnoopFilter", 
-                "path": "system.membus.snoop_filter", 
-                "type": "SnoopFilter", 
-                "lookup_latency": 1
-            }, 
-            "power_model": null, 
-            "path": "system.membus", 
-            "snoop_response_latency": 4, 
-            "name": "membus", 
-            "p_state_clk_gate_bins": 20, 
-            "use_default_range": false
-        }, 
-        "symbolfile": "", 
-        "readfile": "", 
-        "thermal_model": null, 
-        "cxx_class": "System", 
-        "work_begin_cpu_id_exit": -1, 
-        "load_offset": 0, 
-        "work_begin_exit_count": 0, 
-        "p_state_clk_gate_min": 1000, 
-        "memories": [
-            "system.physmem"
-        ], 
-        "work_begin_ckpt_count": 0, 
-        "clk_domain": {
-            "name": "clk_domain", 
-            "clock": [
-                1000
-            ], 
-            "init_perf_level": 0, 
-            "voltage_domain": "system.voltage_domain", 
-            "eventq_index": 0, 
-            "cxx_class": "SrcClockDomain", 
-            "path": "system.clk_domain", 
-            "type": "SrcClockDomain", 
-            "domain_id": -1
-        }, 
-        "mem_ranges": [], 
-        "eventq_index": 0, 
-        "default_p_state": "UNDEFINED", 
-        "p_state_clk_gate_max": 1000000000000, 
-        "dvfs_handler": {
-            "enable": false, 
-            "name": "dvfs_handler", 
-            "sys_clk_domain": "system.clk_domain", 
-            "transition_latency": 100000000, 
-            "eventq_index": 0, 
-            "cxx_class": "DVFSHandler", 
-            "domains": [], 
-            "path": "system.dvfs_handler", 
-            "type": "DVFSHandler"
-        }, 
-        "work_end_exit_count": 0, 
-        "type": "System", 
-        "voltage_domain": {
-            "name": "voltage_domain", 
-            "eventq_index": 0, 
-            "voltage": [
-                "1.0"
-            ], 
-            "cxx_class": "VoltageDomain", 
-            "path": "system.voltage_domain", 
-            "type": "VoltageDomain"
-        }, 
-        "cache_line_size": 64, 
-        "boot_osflags": "a", 
-        "system_port": {
-            "peer": "system.membus.slave[0]", 
-            "role": "MASTER"
-        }, 
-        "physmem": {
-            "range": "0:134217727:0:0:0:0", 
-            "latency": 30000, 
-            "name": "physmem", 
-            "p_state_clk_gate_min": 1000, 
-            "eventq_index": 0, 
-            "p_state_clk_gate_bins": 20, 
-            "default_p_state": "UNDEFINED", 
-            "kvm_map": true, 
-            "clk_domain": "system.clk_domain", 
-            "power_model": null, 
-            "latency_var": 0, 
-            "bandwidth": "73.000000", 
-            "conf_table_reported": true, 
-            "cxx_class": "SimpleMemory", 
-            "p_state_clk_gate_max": 1000000000000, 
-            "path": "system.physmem", 
-            "null": false, 
-            "type": "SimpleMemory", 
-            "port": {
-                "peer": "system.membus.master[0]", 
-                "role": "SLAVE"
-            }, 
-            "in_addr_map": true
-        }, 
-        "power_model": null, 
-        "work_cpus_ckpt_count": 0, 
-        "thermal_components": [], 
-        "path": "system", 
-        "cpu_clk_domain": {
-            "name": "cpu_clk_domain", 
-            "clock": [
-                500
-            ], 
-            "init_perf_level": 0, 
-            "voltage_domain": "system.voltage_domain", 
-            "eventq_index": 0, 
-            "cxx_class": "SrcClockDomain", 
-            "path": "system.cpu_clk_domain", 
-            "type": "SrcClockDomain", 
-            "domain_id": -1
-        }, 
-        "work_end_ckpt_count": 0, 
-        "mem_mode": "timing", 
-        "name": "system", 
-        "init_param": 0, 
-        "p_state_clk_gate_bins": 20, 
-        "load_addr_mask": 1099511627775, 
-        "cpu": [
-            {
-                "do_statistics_insts": true, 
-                "numThreads": 1, 
-                "itb": {
-                    "name": "itb", 
-                    "eventq_index": 0, 
-                    "cxx_class": "RiscvISA::TLB", 
-                    "path": "system.cpu.itb", 
-                    "type": "RiscvTLB", 
-                    "size": 64
-                }, 
-                "system": "system", 
-                "icache": {
-                    "cpu_side": {
-                        "peer": "system.cpu.icache_port", 
-                        "role": "SLAVE"
-                    }, 
-                    "clusivity": "mostly_incl", 
-                    "prefetcher": null, 
-                    "system": "system", 
-                    "write_buffers": 8, 
-                    "response_latency": 2, 
-                    "cxx_class": "Cache", 
-                    "size": 131072, 
-                    "type": "Cache", 
-                    "clk_domain": "system.cpu_clk_domain", 
-                    "max_miss_count": 0, 
-                    "eventq_index": 0, 
-                    "default_p_state": "UNDEFINED", 
-                    "p_state_clk_gate_max": 1000000000000, 
-                    "mem_side": {
-                        "peer": "system.cpu.toL2Bus.slave[0]", 
-                        "role": "MASTER"
-                    }, 
-                    "mshrs": 4, 
-                    "writeback_clean": true, 
-                    "p_state_clk_gate_min": 1000, 
-                    "tags": {
-                        "size": 131072, 
-                        "tag_latency": 2, 
-                        "name": "tags", 
-                        "p_state_clk_gate_min": 1000, 
-                        "eventq_index": 0, 
-                        "p_state_clk_gate_bins": 20, 
-                        "default_p_state": "UNDEFINED", 
-                        "clk_domain": "system.cpu_clk_domain", 
-                        "power_model": null, 
-                        "sequential_access": false, 
-                        "assoc": 2, 
-                        "cxx_class": "LRU", 
-                        "p_state_clk_gate_max": 1000000000000, 
-                        "path": "system.cpu.icache.tags", 
-                        "block_size": 64, 
-                        "type": "LRU", 
-                        "data_latency": 2
-                    }, 
-                    "tgts_per_mshr": 20, 
-                    "demand_mshr_reserve": 1, 
-                    "power_model": null, 
-                    "addr_ranges": [
-                        "0:18446744073709551615:0:0:0:0"
-                    ], 
-                    "is_read_only": true, 
-                    "prefetch_on_access": false, 
-                    "path": "system.cpu.icache", 
-                    "data_latency": 2, 
-                    "tag_latency": 2, 
-                    "name": "icache", 
-                    "p_state_clk_gate_bins": 20, 
-                    "sequential_access": false, 
-                    "assoc": 2
-                }, 
-                "function_trace": false, 
-                "do_checkpoint_insts": true, 
-                "cxx_class": "TimingSimpleCPU", 
-                "max_loads_all_threads": 0, 
-                "clk_domain": "system.cpu_clk_domain", 
-                "function_trace_start": 0, 
-                "cpu_id": 0, 
-                "checker": null, 
-                "eventq_index": 0, 
-                "default_p_state": "UNDEFINED", 
-                "p_state_clk_gate_max": 1000000000000, 
-                "toL2Bus": {
-                    "point_of_coherency": false, 
-                    "system": "system", 
-                    "response_latency": 1, 
-                    "cxx_class": "CoherentXBar", 
-                    "forward_latency": 0, 
-                    "clk_domain": "system.cpu_clk_domain", 
-                    "width": 32, 
-                    "eventq_index": 0, 
-                    "default_p_state": "UNDEFINED", 
-                    "p_state_clk_gate_max": 1000000000000, 
-                    "master": {
-                        "peer": [
-                            "system.cpu.l2cache.cpu_side"
-                        ], 
-                        "role": "MASTER"
-                    }, 
-                    "type": "CoherentXBar", 
-                    "frontend_latency": 1, 
-                    "slave": {
-                        "peer": [
-                            "system.cpu.icache.mem_side", 
-                            "system.cpu.dcache.mem_side"
-                        ], 
-                        "role": "SLAVE"
-                    }, 
-                    "p_state_clk_gate_min": 1000, 
-                    "snoop_filter": {
-                        "name": "snoop_filter", 
-                        "system": "system", 
-                        "max_capacity": 8388608, 
-                        "eventq_index": 0, 
-                        "cxx_class": "SnoopFilter", 
-                        "path": "system.cpu.toL2Bus.snoop_filter", 
-                        "type": "SnoopFilter", 
-                        "lookup_latency": 0
-                    }, 
-                    "power_model": null, 
-                    "path": "system.cpu.toL2Bus", 
-                    "snoop_response_latency": 1, 
-                    "name": "toL2Bus", 
-                    "p_state_clk_gate_bins": 20, 
-                    "use_default_range": false
-                }, 
-                "do_quiesce": true, 
-                "type": "TimingSimpleCPU", 
-                "profile": 0, 
-                "icache_port": {
-                    "peer": "system.cpu.icache.cpu_side", 
-                    "role": "MASTER"
-                }, 
-                "p_state_clk_gate_bins": 20, 
-                "p_state_clk_gate_min": 1000, 
-                "syscallRetryLatency": 10000, 
-                "interrupts": [
-                    {
-                        "eventq_index": 0, 
-                        "path": "system.cpu.interrupts", 
-                        "type": "RiscvInterrupts", 
-                        "name": "interrupts", 
-                        "cxx_class": "RiscvISA::Interrupts"
-                    }
-                ], 
-                "dcache_port": {
-                    "peer": "system.cpu.dcache.cpu_side", 
-                    "role": "MASTER"
-                }, 
-                "socket_id": 0, 
-                "power_model": null, 
-                "max_insts_all_threads": 0, 
-                "l2cache": {
-                    "cpu_side": {
-                        "peer": "system.cpu.toL2Bus.master[0]", 
-                        "role": "SLAVE"
-                    }, 
-                    "clusivity": "mostly_incl", 
-                    "prefetcher": null, 
-                    "system": "system", 
-                    "write_buffers": 8, 
-                    "response_latency": 20, 
-                    "cxx_class": "Cache", 
-                    "size": 2097152, 
-                    "type": "Cache", 
-                    "clk_domain": "system.cpu_clk_domain", 
-                    "max_miss_count": 0, 
-                    "eventq_index": 0, 
-                    "default_p_state": "UNDEFINED", 
-                    "p_state_clk_gate_max": 1000000000000, 
-                    "mem_side": {
-                        "peer": "system.membus.slave[1]", 
-                        "role": "MASTER"
-                    }, 
-                    "mshrs": 20, 
-                    "writeback_clean": false, 
-                    "p_state_clk_gate_min": 1000, 
-                    "tags": {
-                        "size": 2097152, 
-                        "tag_latency": 20, 
-                        "name": "tags", 
-                        "p_state_clk_gate_min": 1000, 
-                        "eventq_index": 0, 
-                        "p_state_clk_gate_bins": 20, 
-                        "default_p_state": "UNDEFINED", 
-                        "clk_domain": "system.cpu_clk_domain", 
-                        "power_model": null, 
-                        "sequential_access": false, 
-                        "assoc": 8, 
-                        "cxx_class": "LRU", 
-                        "p_state_clk_gate_max": 1000000000000, 
-                        "path": "system.cpu.l2cache.tags", 
-                        "block_size": 64, 
-                        "type": "LRU", 
-                        "data_latency": 20
-                    }, 
-                    "tgts_per_mshr": 12, 
-                    "demand_mshr_reserve": 1, 
-                    "power_model": null, 
-                    "addr_ranges": [
-                        "0:18446744073709551615:0:0:0:0"
-                    ], 
-                    "is_read_only": false, 
-                    "prefetch_on_access": false, 
-                    "path": "system.cpu.l2cache", 
-                    "data_latency": 20, 
-                    "tag_latency": 20, 
-                    "name": "l2cache", 
-                    "p_state_clk_gate_bins": 20, 
-                    "sequential_access": false, 
-                    "assoc": 8
-                }, 
-                "path": "system.cpu", 
-                "max_loads_any_thread": 0, 
-                "switched_out": false, 
-                "workload": [
-                    {
-                        "uid": 100, 
-                        "pid": 100, 
-                        "kvmInSE": false, 
-                        "cxx_class": "Process", 
-                        "executable": "/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello", 
-                        "drivers": [], 
-                        "system": "system", 
-                        "gid": 100, 
-                        "eventq_index": 0, 
-                        "env": [], 
-                        "maxStackSize": 67108864, 
-                        "ppid": 0, 
-                        "type": "Process", 
-                        "cwd": "", 
-                        "pgid": 100, 
-                        "simpoint": 0, 
-                        "euid": 100, 
-                        "input": "cin", 
-                        "path": "system.cpu.workload", 
-                        "name": "workload", 
-                        "cmd": [
-                            "hello"
-                        ], 
-                        "errout": "cerr", 
-                        "useArchPT": false, 
-                        "egid": 100, 
-                        "output": "cout"
-                    }
-                ], 
-                "name": "cpu", 
-                "wait_for_remote_gdb": false, 
-                "dtb": {
-                    "name": "dtb", 
-                    "eventq_index": 0, 
-                    "cxx_class": "RiscvISA::TLB", 
-                    "path": "system.cpu.dtb", 
-                    "type": "RiscvTLB", 
-                    "size": 64
-                }, 
-                "simpoint_start_insts": [], 
-                "max_insts_any_thread": 0, 
-                "progress_interval": 0, 
-                "branchPred": null, 
-                "dcache": {
-                    "cpu_side": {
-                        "peer": "system.cpu.dcache_port", 
-                        "role": "SLAVE"
-                    }, 
-                    "clusivity": "mostly_incl", 
-                    "prefetcher": null, 
-                    "system": "system", 
-                    "write_buffers": 8, 
-                    "response_latency": 2, 
-                    "cxx_class": "Cache", 
-                    "size": 262144, 
-                    "type": "Cache", 
-                    "clk_domain": "system.cpu_clk_domain", 
-                    "max_miss_count": 0, 
-                    "eventq_index": 0, 
-                    "default_p_state": "UNDEFINED", 
-                    "p_state_clk_gate_max": 1000000000000, 
-                    "mem_side": {
-                        "peer": "system.cpu.toL2Bus.slave[1]", 
-                        "role": "MASTER"
-                    }, 
-                    "mshrs": 4, 
-                    "writeback_clean": false, 
-                    "p_state_clk_gate_min": 1000, 
-                    "tags": {
-                        "size": 262144, 
-                        "tag_latency": 2, 
-                        "name": "tags", 
-                        "p_state_clk_gate_min": 1000, 
-                        "eventq_index": 0, 
-                        "p_state_clk_gate_bins": 20, 
-                        "default_p_state": "UNDEFINED", 
-                        "clk_domain": "system.cpu_clk_domain", 
-                        "power_model": null, 
-                        "sequential_access": false, 
-                        "assoc": 2, 
-                        "cxx_class": "LRU", 
-                        "p_state_clk_gate_max": 1000000000000, 
-                        "path": "system.cpu.dcache.tags", 
-                        "block_size": 64, 
-                        "type": "LRU", 
-                        "data_latency": 2
-                    }, 
-                    "tgts_per_mshr": 20, 
-                    "demand_mshr_reserve": 1, 
-                    "power_model": null, 
-                    "addr_ranges": [
-                        "0:18446744073709551615:0:0:0:0"
-                    ], 
-                    "is_read_only": false, 
-                    "prefetch_on_access": false, 
-                    "path": "system.cpu.dcache", 
-                    "data_latency": 2, 
-                    "tag_latency": 2, 
-                    "name": "dcache", 
-                    "p_state_clk_gate_bins": 20, 
-                    "sequential_access": false, 
-                    "assoc": 2
-                }, 
-                "isa": [
-                    {
-                        "eventq_index": 0, 
-                        "path": "system.cpu.isa", 
-                        "type": "RiscvISA", 
-                        "name": "isa", 
-                        "cxx_class": "RiscvISA::ISA"
-                    }
-                ], 
-                "tracer": {
-                    "eventq_index": 0, 
-                    "path": "system.cpu.tracer", 
-                    "type": "ExeTracer", 
-                    "name": "tracer", 
-                    "cxx_class": "Trace::ExeTracer"
-                }
-            }
-        ], 
-        "multi_thread": false, 
-        "exit_on_work_items": false, 
-        "work_item_id": -1, 
-        "num_work_ids": 16
-    }, 
-    "time_sync_period": 100000000000, 
-    "eventq_index": 0, 
-    "time_sync_spin_threshold": 100000000, 
-    "cxx_class": "Root", 
-    "path": "root", 
-    "time_sync_enable": false, 
-    "type": "Root", 
-    "full_system": false
-}
\ No newline at end of file
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simerr b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simerr
deleted file mode 100755 (executable)
index 183f48e..0000000
+++ /dev/null
@@ -1,5 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-info: Entering event queue @ 0.  Starting simulation...
-warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings.
-      Returning '/home/ar4jc/gem5/tests/test-progs/hello/bin/riscv/linux/hello'
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simout
deleted file mode 100755 (executable)
index 4e80d20..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing/simout
-Redirecting stderr to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Jul 13 2017 17:37:52
-gem5 started Jul 13 2017 18:03:36
-gem5 executing on boldrock, pid 21570
-command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/00.hello/riscv/linux/simple-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 31821500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/stats.txt
deleted file mode 100644 (file)
index 8480d3c..0000000
+++ /dev/null
@@ -1,533 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000032                      
-sim_ticks                                    31821500                      
-final_tick                                   31821500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                  11620                      
-host_op_rate                                    11638                      
-host_tick_rate                               66593131                      
-host_mem_usage                                 258956                      
-host_seconds                                     0.48                      
-sim_insts                                        5552                      
-sim_ops                                          5561                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED     31821500                      
-system.physmem.bytes_read::cpu.inst             14592                      
-system.physmem.bytes_read::cpu.data              9216                      
-system.physmem.bytes_read::total                23808                      
-system.physmem.bytes_inst_read::cpu.inst        14592                      
-system.physmem.bytes_inst_read::total           14592                      
-system.physmem.num_reads::cpu.inst                228                      
-system.physmem.num_reads::cpu.data                144                      
-system.physmem.num_reads::total                   372                      
-system.physmem.bw_read::cpu.inst            458557893                      
-system.physmem.bw_read::cpu.data            289615512                      
-system.physmem.bw_read::total               748173405                      
-system.physmem.bw_inst_read::cpu.inst       458557893                      
-system.physmem.bw_inst_read::total          458557893                      
-system.physmem.bw_total::cpu.inst           458557893                      
-system.physmem.bw_total::cpu.data           289615512                      
-system.physmem.bw_total::total              748173405                      
-system.pwrStateResidencyTicks::UNDEFINED     31821500                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.workload.numSyscalls                     9                      
-system.cpu.pwrStateResidencyTicks::ON        31821500                      
-system.cpu.numCycles                            63643                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        5552                      
-system.cpu.committedOps                          5561                      
-system.cpu.num_int_alu_accesses                  5498                      
-system.cpu.num_fp_alu_accesses                     12                      
-system.cpu.num_vec_alu_accesses                     0                      
-system.cpu.num_func_calls                         282                      
-system.cpu.num_conditional_control_insts          914                      
-system.cpu.num_int_insts                         5498                      
-system.cpu.num_fp_insts                            12                      
-system.cpu.num_vec_insts                            0                      
-system.cpu.num_int_register_reads                7038                      
-system.cpu.num_int_register_writes               3414                      
-system.cpu.num_fp_register_reads                   12                      
-system.cpu.num_fp_register_writes                   0                      
-system.cpu.num_vec_register_reads                   0                      
-system.cpu.num_vec_register_writes                  0                      
-system.cpu.num_mem_refs                          2162                      
-system.cpu.num_load_insts                        1082                      
-system.cpu.num_store_insts                       1080                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                      63643                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1196                      
-system.cpu.op_class::No_OpClass                    10      0.18%      0.18%
-system.cpu.op_class::IntAlu                      3392     60.90%     61.08%
-system.cpu.op_class::IntMult                        2      0.04%     61.11%
-system.cpu.op_class::IntDiv                         4      0.07%     61.18%
-system.cpu.op_class::FloatAdd                       0      0.00%     61.18%
-system.cpu.op_class::FloatCmp                       0      0.00%     61.18%
-system.cpu.op_class::FloatCvt                       0      0.00%     61.18%
-system.cpu.op_class::FloatMult                      0      0.00%     61.18%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     61.18%
-system.cpu.op_class::FloatDiv                       0      0.00%     61.18%
-system.cpu.op_class::FloatMisc                      0      0.00%     61.18%
-system.cpu.op_class::FloatSqrt                      0      0.00%     61.18%
-system.cpu.op_class::SimdAdd                        0      0.00%     61.18%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     61.18%
-system.cpu.op_class::SimdAlu                        0      0.00%     61.18%
-system.cpu.op_class::SimdCmp                        0      0.00%     61.18%
-system.cpu.op_class::SimdCvt                        0      0.00%     61.18%
-system.cpu.op_class::SimdMisc                       0      0.00%     61.18%
-system.cpu.op_class::SimdMult                       0      0.00%     61.18%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     61.18%
-system.cpu.op_class::SimdShift                      0      0.00%     61.18%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     61.18%
-system.cpu.op_class::SimdSqrt                       0      0.00%     61.18%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     61.18%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     61.18%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     61.18%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     61.18%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     61.18%
-system.cpu.op_class::MemRead                     1082     19.43%     80.61%
-system.cpu.op_class::MemWrite                    1068     19.17%     99.78%
-system.cpu.op_class::FloatMemRead                   0      0.00%     99.78%
-system.cpu.op_class::FloatMemWrite                 12      0.22%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       5570                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     31821500                      
-system.cpu.dcache.tags.replacements                 0                      
-system.cpu.dcache.tags.tagsinuse            86.061155                      
-system.cpu.dcache.tags.total_refs                2018                      
-system.cpu.dcache.tags.sampled_refs               144                      
-system.cpu.dcache.tags.avg_refs             14.013889                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data    86.061155                      
-system.cpu.dcache.tags.occ_percent::cpu.data     0.021011                      
-system.cpu.dcache.tags.occ_percent::total     0.021011                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024          144                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           30                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::1          114                      
-system.cpu.dcache.tags.occ_task_id_percent::1024     0.035156                      
-system.cpu.dcache.tags.tag_accesses              4468                      
-system.cpu.dcache.tags.data_accesses             4468                      
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     31821500                      
-system.cpu.dcache.ReadReq_hits::cpu.data         1013                      
-system.cpu.dcache.ReadReq_hits::total            1013                      
-system.cpu.dcache.WriteReq_hits::cpu.data          990                      
-system.cpu.dcache.WriteReq_hits::total            990                      
-system.cpu.dcache.LoadLockedReq_hits::cpu.data            7                      
-system.cpu.dcache.LoadLockedReq_hits::total            7                      
-system.cpu.dcache.StoreCondReq_hits::cpu.data            8                      
-system.cpu.dcache.StoreCondReq_hits::total            8                      
-system.cpu.dcache.demand_hits::cpu.data          2003                      
-system.cpu.dcache.demand_hits::total             2003                      
-system.cpu.dcache.overall_hits::cpu.data         2003                      
-system.cpu.dcache.overall_hits::total            2003                      
-system.cpu.dcache.ReadReq_misses::cpu.data           61                      
-system.cpu.dcache.ReadReq_misses::total            61                      
-system.cpu.dcache.WriteReq_misses::cpu.data           82                      
-system.cpu.dcache.WriteReq_misses::total           82                      
-system.cpu.dcache.LoadLockedReq_misses::cpu.data            1                      
-system.cpu.dcache.LoadLockedReq_misses::total            1                      
-system.cpu.dcache.demand_misses::cpu.data          143                      
-system.cpu.dcache.demand_misses::total            143                      
-system.cpu.dcache.overall_misses::cpu.data          143                      
-system.cpu.dcache.overall_misses::total           143                      
-system.cpu.dcache.ReadReq_miss_latency::cpu.data      3843000                      
-system.cpu.dcache.ReadReq_miss_latency::total      3843000                      
-system.cpu.dcache.WriteReq_miss_latency::cpu.data      5166000                      
-system.cpu.dcache.WriteReq_miss_latency::total      5166000                      
-system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data        63000                      
-system.cpu.dcache.LoadLockedReq_miss_latency::total        63000                      
-system.cpu.dcache.demand_miss_latency::cpu.data      9009000                      
-system.cpu.dcache.demand_miss_latency::total      9009000                      
-system.cpu.dcache.overall_miss_latency::cpu.data      9009000                      
-system.cpu.dcache.overall_miss_latency::total      9009000                      
-system.cpu.dcache.ReadReq_accesses::cpu.data         1074                      
-system.cpu.dcache.ReadReq_accesses::total         1074                      
-system.cpu.dcache.WriteReq_accesses::cpu.data         1072                      
-system.cpu.dcache.WriteReq_accesses::total         1072                      
-system.cpu.dcache.LoadLockedReq_accesses::cpu.data            8                      
-system.cpu.dcache.LoadLockedReq_accesses::total            8                      
-system.cpu.dcache.StoreCondReq_accesses::cpu.data            8                      
-system.cpu.dcache.StoreCondReq_accesses::total            8                      
-system.cpu.dcache.demand_accesses::cpu.data         2146                      
-system.cpu.dcache.demand_accesses::total         2146                      
-system.cpu.dcache.overall_accesses::cpu.data         2146                      
-system.cpu.dcache.overall_accesses::total         2146                      
-system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.056797                      
-system.cpu.dcache.ReadReq_miss_rate::total     0.056797                      
-system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.076493                      
-system.cpu.dcache.WriteReq_miss_rate::total     0.076493                      
-system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data     0.125000                      
-system.cpu.dcache.LoadLockedReq_miss_rate::total     0.125000                      
-system.cpu.dcache.demand_miss_rate::cpu.data     0.066636                      
-system.cpu.dcache.demand_miss_rate::total     0.066636                      
-system.cpu.dcache.overall_miss_rate::cpu.data     0.066636                      
-system.cpu.dcache.overall_miss_rate::total     0.066636                      
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data        63000                      
-system.cpu.dcache.ReadReq_avg_miss_latency::total        63000                      
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data        63000                      
-system.cpu.dcache.WriteReq_avg_miss_latency::total        63000                      
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data        63000                      
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::total        63000                      
-system.cpu.dcache.demand_avg_miss_latency::cpu.data        63000                      
-system.cpu.dcache.demand_avg_miss_latency::total        63000                      
-system.cpu.dcache.overall_avg_miss_latency::cpu.data        63000                      
-system.cpu.dcache.overall_avg_miss_latency::total        63000                      
-system.cpu.dcache.blocked_cycles::no_mshrs            0                      
-system.cpu.dcache.blocked_cycles::no_targets            0                      
-system.cpu.dcache.blocked::no_mshrs                 0                      
-system.cpu.dcache.blocked::no_targets               0                      
-system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.dcache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.dcache.ReadReq_mshr_misses::cpu.data           61                      
-system.cpu.dcache.ReadReq_mshr_misses::total           61                      
-system.cpu.dcache.WriteReq_mshr_misses::cpu.data           82                      
-system.cpu.dcache.WriteReq_mshr_misses::total           82                      
-system.cpu.dcache.LoadLockedReq_mshr_misses::cpu.data            1                      
-system.cpu.dcache.LoadLockedReq_mshr_misses::total            1                      
-system.cpu.dcache.demand_mshr_misses::cpu.data          143                      
-system.cpu.dcache.demand_mshr_misses::total          143                      
-system.cpu.dcache.overall_mshr_misses::cpu.data          143                      
-system.cpu.dcache.overall_mshr_misses::total          143                      
-system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data      3782000                      
-system.cpu.dcache.ReadReq_mshr_miss_latency::total      3782000                      
-system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data      5084000                      
-system.cpu.dcache.WriteReq_mshr_miss_latency::total      5084000                      
-system.cpu.dcache.LoadLockedReq_mshr_miss_latency::cpu.data        62000                      
-system.cpu.dcache.LoadLockedReq_mshr_miss_latency::total        62000                      
-system.cpu.dcache.demand_mshr_miss_latency::cpu.data      8866000                      
-system.cpu.dcache.demand_mshr_miss_latency::total      8866000                      
-system.cpu.dcache.overall_mshr_miss_latency::cpu.data      8866000                      
-system.cpu.dcache.overall_mshr_miss_latency::total      8866000                      
-system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.056797                      
-system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.056797                      
-system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.076493                      
-system.cpu.dcache.WriteReq_mshr_miss_rate::total     0.076493                      
-system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data     0.125000                      
-system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total     0.125000                      
-system.cpu.dcache.demand_mshr_miss_rate::cpu.data     0.066636                      
-system.cpu.dcache.demand_mshr_miss_rate::total     0.066636                      
-system.cpu.dcache.overall_mshr_miss_rate::cpu.data     0.066636                      
-system.cpu.dcache.overall_mshr_miss_rate::total     0.066636                      
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data        62000                      
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total        62000                      
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data        62000                      
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total        62000                      
-system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data        62000                      
-system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total        62000                      
-system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data        62000                      
-system.cpu.dcache.demand_avg_mshr_miss_latency::total        62000                      
-system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data        62000                      
-system.cpu.dcache.overall_avg_mshr_miss_latency::total        62000                      
-system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED     31821500                      
-system.cpu.icache.tags.replacements                 0                      
-system.cpu.icache.tags.tagsinuse           108.376290                      
-system.cpu.icache.tags.total_refs                6368                      
-system.cpu.icache.tags.sampled_refs               228                      
-system.cpu.icache.tags.avg_refs             27.929825                      
-system.cpu.icache.tags.warmup_cycle                 0                      
-system.cpu.icache.tags.occ_blocks::cpu.inst   108.376290                      
-system.cpu.icache.tags.occ_percent::cpu.inst     0.052918                      
-system.cpu.icache.tags.occ_percent::total     0.052918                      
-system.cpu.icache.tags.occ_task_id_blocks::1024          228                      
-system.cpu.icache.tags.age_task_id_blocks_1024::0           82                      
-system.cpu.icache.tags.age_task_id_blocks_1024::1          146                      
-system.cpu.icache.tags.occ_task_id_percent::1024     0.111328                      
-system.cpu.icache.tags.tag_accesses             13420                      
-system.cpu.icache.tags.data_accesses            13420                      
-system.cpu.icache.pwrStateResidencyTicks::UNDEFINED     31821500                      
-system.cpu.icache.ReadReq_hits::cpu.inst         6368                      
-system.cpu.icache.ReadReq_hits::total            6368                      
-system.cpu.icache.demand_hits::cpu.inst          6368                      
-system.cpu.icache.demand_hits::total             6368                      
-system.cpu.icache.overall_hits::cpu.inst         6368                      
-system.cpu.icache.overall_hits::total            6368                      
-system.cpu.icache.ReadReq_misses::cpu.inst          228                      
-system.cpu.icache.ReadReq_misses::total           228                      
-system.cpu.icache.demand_misses::cpu.inst          228                      
-system.cpu.icache.demand_misses::total            228                      
-system.cpu.icache.overall_misses::cpu.inst          228                      
-system.cpu.icache.overall_misses::total           228                      
-system.cpu.icache.ReadReq_miss_latency::cpu.inst     14364500                      
-system.cpu.icache.ReadReq_miss_latency::total     14364500                      
-system.cpu.icache.demand_miss_latency::cpu.inst     14364500                      
-system.cpu.icache.demand_miss_latency::total     14364500                      
-system.cpu.icache.overall_miss_latency::cpu.inst     14364500                      
-system.cpu.icache.overall_miss_latency::total     14364500                      
-system.cpu.icache.ReadReq_accesses::cpu.inst         6596                      
-system.cpu.icache.ReadReq_accesses::total         6596                      
-system.cpu.icache.demand_accesses::cpu.inst         6596                      
-system.cpu.icache.demand_accesses::total         6596                      
-system.cpu.icache.overall_accesses::cpu.inst         6596                      
-system.cpu.icache.overall_accesses::total         6596                      
-system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.034566                      
-system.cpu.icache.ReadReq_miss_rate::total     0.034566                      
-system.cpu.icache.demand_miss_rate::cpu.inst     0.034566                      
-system.cpu.icache.demand_miss_rate::total     0.034566                      
-system.cpu.icache.overall_miss_rate::cpu.inst     0.034566                      
-system.cpu.icache.overall_miss_rate::total     0.034566                      
-system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 63002.192982                      
-system.cpu.icache.ReadReq_avg_miss_latency::total 63002.192982                      
-system.cpu.icache.demand_avg_miss_latency::cpu.inst 63002.192982                      
-system.cpu.icache.demand_avg_miss_latency::total 63002.192982                      
-system.cpu.icache.overall_avg_miss_latency::cpu.inst 63002.192982                      
-system.cpu.icache.overall_avg_miss_latency::total 63002.192982                      
-system.cpu.icache.blocked_cycles::no_mshrs            0                      
-system.cpu.icache.blocked_cycles::no_targets            0                      
-system.cpu.icache.blocked::no_mshrs                 0                      
-system.cpu.icache.blocked::no_targets               0                      
-system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.icache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.icache.ReadReq_mshr_misses::cpu.inst          228                      
-system.cpu.icache.ReadReq_mshr_misses::total          228                      
-system.cpu.icache.demand_mshr_misses::cpu.inst          228                      
-system.cpu.icache.demand_mshr_misses::total          228                      
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-system.cpu.icache.overall_mshr_misses::total          228                      
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-system.cpu.icache.ReadReq_mshr_miss_latency::total     14136500                      
-system.cpu.icache.demand_mshr_miss_latency::cpu.inst     14136500                      
-system.cpu.icache.demand_mshr_miss_latency::total     14136500                      
-system.cpu.icache.overall_mshr_miss_latency::cpu.inst     14136500                      
-system.cpu.icache.overall_mshr_miss_latency::total     14136500                      
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-system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 62002.192982                      
-system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 62002.192982                      
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-system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 62002.192982                      
-system.cpu.icache.overall_avg_mshr_miss_latency::total 62002.192982                      
-system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED     31821500                      
-system.cpu.l2cache.tags.replacements                0                      
-system.cpu.l2cache.tags.tagsinuse          194.560193                      
-system.cpu.l2cache.tags.total_refs                  0                      
-system.cpu.l2cache.tags.sampled_refs              372                      
-system.cpu.l2cache.tags.avg_refs                    0                      
-system.cpu.l2cache.tags.warmup_cycle                0                      
-system.cpu.l2cache.tags.occ_blocks::cpu.inst   108.451522                      
-system.cpu.l2cache.tags.occ_blocks::cpu.data    86.108670                      
-system.cpu.l2cache.tags.occ_percent::cpu.inst     0.003310                      
-system.cpu.l2cache.tags.occ_percent::cpu.data     0.002628                      
-system.cpu.l2cache.tags.occ_percent::total     0.005938                      
-system.cpu.l2cache.tags.occ_task_id_blocks::1024          372                      
-system.cpu.l2cache.tags.age_task_id_blocks_1024::0          112                      
-system.cpu.l2cache.tags.age_task_id_blocks_1024::1          260                      
-system.cpu.l2cache.tags.occ_task_id_percent::1024     0.011353                      
-system.cpu.l2cache.tags.tag_accesses             3348                      
-system.cpu.l2cache.tags.data_accesses            3348                      
-system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED     31821500                      
-system.cpu.l2cache.ReadExReq_misses::cpu.data           82                      
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-system.cpu.l2cache.ReadCleanReq_misses::total          228                      
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-system.cpu.l2cache.demand_misses::cpu.inst          228                      
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-system.cpu.l2cache.overall_misses::total          372                      
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-system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst     13794500                      
-system.cpu.l2cache.ReadCleanReq_miss_latency::total     13794500                      
-system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data      3751000                      
-system.cpu.l2cache.ReadSharedReq_miss_latency::total      3751000                      
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-system.cpu.l2cache.demand_miss_latency::cpu.data      8712000                      
-system.cpu.l2cache.demand_miss_latency::total     22506500                      
-system.cpu.l2cache.overall_miss_latency::cpu.inst     13794500                      
-system.cpu.l2cache.overall_miss_latency::cpu.data      8712000                      
-system.cpu.l2cache.overall_miss_latency::total     22506500                      
-system.cpu.l2cache.ReadExReq_accesses::cpu.data           82                      
-system.cpu.l2cache.ReadExReq_accesses::total           82                      
-system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst          228                      
-system.cpu.l2cache.ReadCleanReq_accesses::total          228                      
-system.cpu.l2cache.ReadSharedReq_accesses::cpu.data           62                      
-system.cpu.l2cache.ReadSharedReq_accesses::total           62                      
-system.cpu.l2cache.demand_accesses::cpu.inst          228                      
-system.cpu.l2cache.demand_accesses::cpu.data          144                      
-system.cpu.l2cache.demand_accesses::total          372                      
-system.cpu.l2cache.overall_accesses::cpu.inst          228                      
-system.cpu.l2cache.overall_accesses::cpu.data          144                      
-system.cpu.l2cache.overall_accesses::total          372                      
-system.cpu.l2cache.ReadExReq_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::total            1                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::total            1                      
-system.cpu.l2cache.demand_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.demand_miss_rate::cpu.data            1                      
-system.cpu.l2cache.demand_miss_rate::total            1                      
-system.cpu.l2cache.overall_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.overall_miss_rate::cpu.data            1                      
-system.cpu.l2cache.overall_miss_rate::total            1                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data        60500                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::total        60500                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 60502.192982                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 60502.192982                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data        60500                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total        60500                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 60502.192982                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.data        60500                      
-system.cpu.l2cache.demand_avg_miss_latency::total 60501.344086                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 60502.192982                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data        60500                      
-system.cpu.l2cache.overall_avg_miss_latency::total 60501.344086                      
-system.cpu.l2cache.blocked_cycles::no_mshrs            0                      
-system.cpu.l2cache.blocked_cycles::no_targets            0                      
-system.cpu.l2cache.blocked::no_mshrs                0                      
-system.cpu.l2cache.blocked::no_targets              0                      
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data           82                      
-system.cpu.l2cache.ReadExReq_mshr_misses::total           82                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst          228                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::total          228                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data           62                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::total           62                      
-system.cpu.l2cache.demand_mshr_misses::cpu.inst          228                      
-system.cpu.l2cache.demand_mshr_misses::cpu.data          144                      
-system.cpu.l2cache.demand_mshr_misses::total          372                      
-system.cpu.l2cache.overall_mshr_misses::cpu.inst          228                      
-system.cpu.l2cache.overall_mshr_misses::cpu.data          144                      
-system.cpu.l2cache.overall_mshr_misses::total          372                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data      4141000                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total      4141000                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst     11514500                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total     11514500                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data      3131000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      3131000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     11514500                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data      7272000                      
-system.cpu.l2cache.demand_mshr_miss_latency::total     18786500                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     11514500                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data      7272000                      
-system.cpu.l2cache.overall_mshr_miss_latency::total     18786500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.demand_mshr_miss_rate::total            1                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst            1                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.overall_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total        50500                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50502.192982                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50502.192982                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total        50500                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50502.192982                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50501.344086                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50502.192982                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50501.344086                      
-system.cpu.toL2Bus.snoop_filter.tot_requests          372                      
-system.cpu.toL2Bus.snoop_filter.hit_single_requests            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0                      
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     31821500                      
-system.cpu.toL2Bus.trans_dist::ReadResp           290                      
-system.cpu.toL2Bus.trans_dist::ReadExReq           82                      
-system.cpu.toL2Bus.trans_dist::ReadExResp           82                      
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          228                      
-system.cpu.toL2Bus.trans_dist::ReadSharedReq           62                      
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          456                      
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          288                      
-system.cpu.toL2Bus.pkt_count::total               744                      
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        14592                      
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         9216                      
-system.cpu.toL2Bus.pkt_size::total              23808                      
-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples          372                      
-system.cpu.toL2Bus.snoop_fanout::mean               0                      
-system.cpu.toL2Bus.snoop_fanout::stdev              0                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0                372    100.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::1                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            0                      
-system.cpu.toL2Bus.snoop_fanout::total            372                      
-system.cpu.toL2Bus.reqLayer0.occupancy         186000                      
-system.cpu.toL2Bus.reqLayer0.utilization          0.6                      
-system.cpu.toL2Bus.respLayer0.occupancy        342000                      
-system.cpu.toL2Bus.respLayer0.utilization          1.1                      
-system.cpu.toL2Bus.respLayer1.occupancy        216000                      
-system.cpu.toL2Bus.respLayer1.utilization          0.7                      
-system.membus.snoop_filter.tot_requests           372                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED     31821500                      
-system.membus.trans_dist::ReadResp                290                      
-system.membus.trans_dist::ReadExReq                82                      
-system.membus.trans_dist::ReadExResp               82                      
-system.membus.trans_dist::ReadSharedReq           290                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          744                      
-system.membus.pkt_count::total                    744                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        23808                      
-system.membus.pkt_size::total                   23808                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples               372                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                     372    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                 372                      
-system.membus.reqLayer0.occupancy              372500                      
-system.membus.reqLayer0.utilization               1.2                      
-system.membus.respLayer1.occupancy            1860000                      
-system.membus.respLayer1.utilization              5.8                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini
deleted file mode 100644 (file)
index 90a4968..0000000
+++ /dev/null
@@ -1,213 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=AtomicSimpleCPU
-children=dtb interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-width=1
-workload=system.cpu.workload
-dcache_port=system.membus.slave[2]
-icache_port=system.membus.slave[1]
-
-[system.cpu.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/sparc/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simerr b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simerr
deleted file mode 100755 (executable)
index c0b55d1..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simout
deleted file mode 100755 (executable)
index cac26c8..0000000
+++ /dev/null
@@ -1,12 +0,0 @@
-Redirecting stdout to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic/simout
-Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 18:41:19
-gem5 started Apr  3 2017 18:41:40
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 64886
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/sparc/linux/simple-atomic
-
-Global frequency set at 1000000000000 ticks per second
-Hello World!Exiting @ tick 2694500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt
deleted file mode 100644 (file)
index 6ce9e51..0000000
+++ /dev/null
@@ -1,135 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000003                      
-sim_ticks                                     2694500                      
-final_tick                                    2694500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 549051                      
-host_op_rate                                   547755                      
-host_tick_rate                              276495662                      
-host_mem_usage                                 251832                      
-host_seconds                                     0.01                      
-sim_insts                                        5327                      
-sim_ops                                          5327                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED      2694500                      
-system.physmem.bytes_read::cpu.inst             21480                      
-system.physmem.bytes_read::cpu.data              4602                      
-system.physmem.bytes_read::total                26082                      
-system.physmem.bytes_inst_read::cpu.inst        21480                      
-system.physmem.bytes_inst_read::total           21480                      
-system.physmem.bytes_written::cpu.data           5065                      
-system.physmem.bytes_written::total              5065                      
-system.physmem.num_reads::cpu.inst               5370                      
-system.physmem.num_reads::cpu.data                715                      
-system.physmem.num_reads::total                  6085                      
-system.physmem.num_writes::cpu.data               673                      
-system.physmem.num_writes::total                  673                      
-system.physmem.bw_read::cpu.inst           7971794396                      
-system.physmem.bw_read::cpu.data           1707923548                      
-system.physmem.bw_read::total              9679717944                      
-system.physmem.bw_inst_read::cpu.inst      7971794396                      
-system.physmem.bw_inst_read::total         7971794396                      
-system.physmem.bw_write::cpu.data          1879755057                      
-system.physmem.bw_write::total             1879755057                      
-system.physmem.bw_total::cpu.inst          7971794396                      
-system.physmem.bw_total::cpu.data          3587678605                      
-system.physmem.bw_total::total            11559473001                      
-system.pwrStateResidencyTicks::UNDEFINED      2694500                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.workload.numSyscalls                    11                      
-system.cpu.pwrStateResidencyTicks::ON         2694500                      
-system.cpu.numCycles                             5390                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        5327                      
-system.cpu.committedOps                          5327                      
-system.cpu.num_int_alu_accesses                  4505                      
-system.cpu.num_fp_alu_accesses                      0                      
-system.cpu.num_func_calls                         146                      
-system.cpu.num_conditional_control_insts          773                      
-system.cpu.num_int_insts                         4505                      
-system.cpu.num_fp_insts                             0                      
-system.cpu.num_int_register_reads               10598                      
-system.cpu.num_int_register_writes               4846                      
-system.cpu.num_fp_register_reads                    0                      
-system.cpu.num_fp_register_writes                   0                      
-system.cpu.num_mem_refs                          1401                      
-system.cpu.num_load_insts                         723                      
-system.cpu.num_store_insts                        678                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                       5390                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1121                      
-system.cpu.op_class::No_OpClass                   173      3.22%      3.22%
-system.cpu.op_class::IntAlu                      3796     70.69%     73.91%
-system.cpu.op_class::IntMult                        0      0.00%     73.91%
-system.cpu.op_class::IntDiv                         0      0.00%     73.91%
-system.cpu.op_class::FloatAdd                       0      0.00%     73.91%
-system.cpu.op_class::FloatCmp                       0      0.00%     73.91%
-system.cpu.op_class::FloatCvt                       0      0.00%     73.91%
-system.cpu.op_class::FloatMult                      0      0.00%     73.91%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     73.91%
-system.cpu.op_class::FloatDiv                       0      0.00%     73.91%
-system.cpu.op_class::FloatMisc                      0      0.00%     73.91%
-system.cpu.op_class::FloatSqrt                      0      0.00%     73.91%
-system.cpu.op_class::SimdAdd                        0      0.00%     73.91%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     73.91%
-system.cpu.op_class::SimdAlu                        0      0.00%     73.91%
-system.cpu.op_class::SimdCmp                        0      0.00%     73.91%
-system.cpu.op_class::SimdCvt                        0      0.00%     73.91%
-system.cpu.op_class::SimdMisc                       0      0.00%     73.91%
-system.cpu.op_class::SimdMult                       0      0.00%     73.91%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     73.91%
-system.cpu.op_class::SimdShift                      0      0.00%     73.91%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     73.91%
-system.cpu.op_class::SimdSqrt                       0      0.00%     73.91%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     73.91%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     73.91%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     73.91%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     73.91%
-system.cpu.op_class::MemRead                      723     13.46%     87.37%
-system.cpu.op_class::MemWrite                     678     12.63%    100.00%
-system.cpu.op_class::FloatMemRead                   0      0.00%    100.00%
-system.cpu.op_class::FloatMemWrite                  0      0.00%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       5370                      
-system.membus.snoop_filter.tot_requests             0                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED      2694500                      
-system.membus.trans_dist::ReadReq                6085                      
-system.membus.trans_dist::ReadResp               6085                      
-system.membus.trans_dist::WriteReq                673                      
-system.membus.trans_dist::WriteResp               673                      
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port        10740                      
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port         2776                      
-system.membus.pkt_count::total                  13516                      
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port        21480                      
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port         9667                      
-system.membus.pkt_size::total                   31147                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples              6758                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                    6758    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                6758                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini
deleted file mode 100644 (file)
index 74133b3..0000000
+++ /dev/null
@@ -1,1268 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000
-time_sync_spin_threshold=100000
-
-[system]
-type=System
-children=clk_domain cpu dvfs_handler mem_ctrls ruby sys_port_proxy voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=0:268435455:0:0:0:0
-memories=system.mem_ctrls
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.sys_port_proxy.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=clk_domain dtb interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu.clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-workload=system.cpu.workload
-dcache_port=system.ruby.l1_cntrl0.sequencer.slave[1]
-icache_port=system.ruby.l1_cntrl0.sequencer.slave[0]
-
-[system.cpu.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/sparc/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000
-
-[system.mem_ctrls]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-page_policy=open_adaptive
-power_model=Null
-range=0:268435455:5:19:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10
-static_frontend_latency=10
-tBURST=5
-tCCD_L=0
-tCK=1
-tCL=14
-tCS=3
-tRAS=35
-tRCD=14
-tREFI=7800
-tRFC=260
-tRP=14
-tRRD=6
-tRRD_L=0
-tRTP=8
-tRTW=3
-tWR=15
-tWTR=8
-tXAW=30
-tXP=6
-tXPDLL=0
-tXS=270
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.ruby.dir_cntrl0.memory
-
-[system.ruby]
-type=RubySystem
-children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network
-access_backing_store=false
-all_instructions=false
-block_size_bytes=64
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-hot_lines=false
-memory_size_bits=48
-num_of_sequencers=1
-number_of_virtual_networks=5
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-phys_mem=Null
-power_model=Null
-randomization=false
-
-[system.ruby.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.ruby.dir_cntrl0]
-type=Directory_Controller
-children=directory dmaRequestToDir dmaResponseFromDir forwardFromDir requestToDir responseFromDir responseFromMemory
-buffer_size=0
-clk_domain=system.ruby.clk_domain
-cluster_id=0
-default_p_state=UNDEFINED
-directory=system.ruby.dir_cntrl0.directory
-directory_latency=12
-dmaRequestToDir=system.ruby.dir_cntrl0.dmaRequestToDir
-dmaResponseFromDir=system.ruby.dir_cntrl0.dmaResponseFromDir
-eventq_index=0
-forwardFromDir=system.ruby.dir_cntrl0.forwardFromDir
-number_of_TBEs=256
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-recycle_latency=10
-requestToDir=system.ruby.dir_cntrl0.requestToDir
-responseFromDir=system.ruby.dir_cntrl0.responseFromDir
-responseFromMemory=system.ruby.dir_cntrl0.responseFromMemory
-ruby_system=system.ruby
-system=system
-to_memory_controller_latency=1
-transitions_per_cycle=4
-version=0
-memory=system.mem_ctrls.port
-
-[system.ruby.dir_cntrl0.directory]
-type=RubyDirectoryMemory
-eventq_index=0
-numa_high_bit=5
-size=268435456
-system=system
-version=0
-
-[system.ruby.dir_cntrl0.dmaRequestToDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[3]
-
-[system.ruby.dir_cntrl0.dmaResponseFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[3]
-
-[system.ruby.dir_cntrl0.forwardFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-master=system.ruby.network.slave[4]
-
-[system.ruby.dir_cntrl0.requestToDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[2]
-
-[system.ruby.dir_cntrl0.responseFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-master=system.ruby.network.slave[2]
-
-[system.ruby.dir_cntrl0.responseFromMemory]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-
-[system.ruby.l1_cntrl0]
-type=L1Cache_Controller
-children=cacheMemory forwardToCache mandatoryQueue requestFromCache responseFromCache responseToCache sequencer
-buffer_size=0
-cacheMemory=system.ruby.l1_cntrl0.cacheMemory
-cache_response_latency=12
-clk_domain=system.cpu.clk_domain
-cluster_id=0
-default_p_state=UNDEFINED
-eventq_index=0
-forwardToCache=system.ruby.l1_cntrl0.forwardToCache
-issue_latency=2
-mandatoryQueue=system.ruby.l1_cntrl0.mandatoryQueue
-number_of_TBEs=256
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-recycle_latency=10
-requestFromCache=system.ruby.l1_cntrl0.requestFromCache
-responseFromCache=system.ruby.l1_cntrl0.responseFromCache
-responseToCache=system.ruby.l1_cntrl0.responseToCache
-ruby_system=system.ruby
-send_evictions=false
-sequencer=system.ruby.l1_cntrl0.sequencer
-system=system
-transitions_per_cycle=4
-version=0
-
-[system.ruby.l1_cntrl0.cacheMemory]
-type=RubyCache
-children=replacement_policy
-assoc=2
-block_size=0
-dataAccessLatency=1
-dataArrayBanks=1
-eventq_index=0
-is_icache=false
-replacement_policy=system.ruby.l1_cntrl0.cacheMemory.replacement_policy
-resourceStalls=false
-ruby_system=system.ruby
-size=256
-start_index_bit=6
-tagAccessLatency=1
-tagArrayBanks=1
-
-[system.ruby.l1_cntrl0.cacheMemory.replacement_policy]
-type=PseudoLRUReplacementPolicy
-assoc=2
-block_size=64
-eventq_index=0
-size=256
-
-[system.ruby.l1_cntrl0.forwardToCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[0]
-
-[system.ruby.l1_cntrl0.mandatoryQueue]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-
-[system.ruby.l1_cntrl0.requestFromCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[0]
-
-[system.ruby.l1_cntrl0.responseFromCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[1]
-
-[system.ruby.l1_cntrl0.responseToCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[1]
-
-[system.ruby.l1_cntrl0.sequencer]
-type=RubySequencer
-clk_domain=system.cpu.clk_domain
-coreid=99
-dcache=system.ruby.l1_cntrl0.cacheMemory
-dcache_hit_latency=1
-deadlock_threshold=500000
-default_p_state=UNDEFINED
-eventq_index=0
-garnet_standalone=false
-icache=system.ruby.l1_cntrl0.cacheMemory
-icache_hit_latency=1
-is_cpu_sequencer=true
-max_outstanding_requests=16
-no_retry_on_stall=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-ruby_system=system.ruby
-support_data_reqs=true
-support_inst_reqs=true
-system=system
-using_ruby_tester=false
-version=0
-slave=system.cpu.icache_port system.cpu.dcache_port
-
-[system.ruby.memctrl_clk_domain]
-type=DerivedClockDomain
-clk_divider=3
-clk_domain=system.ruby.clk_domain
-eventq_index=0
-
-[system.ruby.network]
-type=SimpleNetwork
-children=ext_links0 ext_links1 int_link_buffers00 int_link_buffers01 int_link_buffers02 int_link_buffers03 int_link_buffers04 int_link_buffers05 int_link_buffers06 int_link_buffers07 int_link_buffers08 int_link_buffers09 int_link_buffers10 int_link_buffers11 int_link_buffers12 int_link_buffers13 int_link_buffers14 int_link_buffers15 int_link_buffers16 int_link_buffers17 int_link_buffers18 int_link_buffers19 int_link_buffers20 int_link_buffers21 int_link_buffers22 int_link_buffers23 int_link_buffers24 int_link_buffers25 int_link_buffers26 int_link_buffers27 int_link_buffers28 int_link_buffers29 int_link_buffers30 int_link_buffers31 int_link_buffers32 int_link_buffers33 int_link_buffers34 int_link_buffers35 int_link_buffers36 int_link_buffers37 int_link_buffers38 int_link_buffers39 int_links0 int_links1 int_links2 int_links3 routers0 routers1 routers2
-adaptive_routing=false
-buffer_size=0
-clk_domain=system.ruby.clk_domain
-control_msg_size=8
-default_p_state=UNDEFINED
-endpoint_bandwidth=1000
-eventq_index=0
-ext_links=system.ruby.network.ext_links0 system.ruby.network.ext_links1
-int_link_buffers=system.ruby.network.int_link_buffers00 system.ruby.network.int_link_buffers01 system.ruby.network.int_link_buffers02 system.ruby.network.int_link_buffers03 system.ruby.network.int_link_buffers04 system.ruby.network.int_link_buffers05 system.ruby.network.int_link_buffers06 system.ruby.network.int_link_buffers07 system.ruby.network.int_link_buffers08 system.ruby.network.int_link_buffers09 system.ruby.network.int_link_buffers10 system.ruby.network.int_link_buffers11 system.ruby.network.int_link_buffers12 system.ruby.network.int_link_buffers13 system.ruby.network.int_link_buffers14 system.ruby.network.int_link_buffers15 system.ruby.network.int_link_buffers16 system.ruby.network.int_link_buffers17 system.ruby.network.int_link_buffers18 system.ruby.network.int_link_buffers19 system.ruby.network.int_link_buffers20 system.ruby.network.int_link_buffers21 system.ruby.network.int_link_buffers22 system.ruby.network.int_link_buffers23 system.ruby.network.int_link_buffers24 system.ruby.network.int_link_buffers25 system.ruby.network.int_link_buffers26 system.ruby.network.int_link_buffers27 system.ruby.network.int_link_buffers28 system.ruby.network.int_link_buffers29 system.ruby.network.int_link_buffers30 system.ruby.network.int_link_buffers31 system.ruby.network.int_link_buffers32 system.ruby.network.int_link_buffers33 system.ruby.network.int_link_buffers34 system.ruby.network.int_link_buffers35 system.ruby.network.int_link_buffers36 system.ruby.network.int_link_buffers37 system.ruby.network.int_link_buffers38 system.ruby.network.int_link_buffers39
-int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2 system.ruby.network.int_links3
-netifs=
-number_of_virtual_networks=5
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
-ruby_system=system.ruby
-topology=Crossbar
-master=system.ruby.l1_cntrl0.forwardToCache.slave system.ruby.l1_cntrl0.responseToCache.slave system.ruby.dir_cntrl0.requestToDir.slave system.ruby.dir_cntrl0.dmaRequestToDir.slave
-slave=system.ruby.l1_cntrl0.requestFromCache.master system.ruby.l1_cntrl0.responseFromCache.master system.ruby.dir_cntrl0.responseFromDir.master system.ruby.dir_cntrl0.dmaResponseFromDir.master system.ruby.dir_cntrl0.forwardFromDir.master
-
-[system.ruby.network.ext_links0]
-type=SimpleExtLink
-bandwidth_factor=16
-eventq_index=0
-ext_node=system.ruby.l1_cntrl0
-int_node=system.ruby.network.routers0
-latency=1
-link_id=0
-weight=1
-
-[system.ruby.network.ext_links1]
-type=SimpleExtLink
-bandwidth_factor=16
-eventq_index=0
-ext_node=system.ruby.dir_cntrl0
-int_node=system.ruby.network.routers1
-latency=1
-link_id=1
-weight=1
-
-[system.ruby.network.int_link_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers06]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers07]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers08]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers09]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers12]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers13]
-type=MessageBuffer
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-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers14]
-type=MessageBuffer
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-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers15]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers16]
-type=MessageBuffer
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-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers17]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers18]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers19]
-type=MessageBuffer
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-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers20]
-type=MessageBuffer
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-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers21]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers22]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers23]
-type=MessageBuffer
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-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers24]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers25]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers26]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers27]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers28]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers29]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers30]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers31]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers32]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers33]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers34]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers35]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers36]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers37]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers38]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers39]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_links0]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers2
-eventq_index=0
-latency=1
-link_id=2
-src_node=system.ruby.network.routers0
-src_outport=
-weight=1
-
-[system.ruby.network.int_links1]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers2
-eventq_index=0
-latency=1
-link_id=3
-src_node=system.ruby.network.routers1
-src_outport=
-weight=1
-
-[system.ruby.network.int_links2]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers0
-eventq_index=0
-latency=1
-link_id=4
-src_node=system.ruby.network.routers2
-src_outport=
-weight=1
-
-[system.ruby.network.int_links3]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers1
-eventq_index=0
-latency=1
-link_id=5
-src_node=system.ruby.network.routers2
-src_outport=
-weight=1
-
-[system.ruby.network.routers0]
-type=Switch
-children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14
-power_model=Null
-router_id=0
-virt_nets=5
-
-[system.ruby.network.routers0.port_buffers00]
-type=MessageBuffer
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-eventq_index=0
-ordered=true
-randomization=false
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-type=MessageBuffer
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-type=MessageBuffer
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-[system.ruby.network.routers0.port_buffers03]
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-
-[system.ruby.network.routers1]
-type=Switch
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-clk_domain=system.ruby.clk_domain
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-eventq_index=0
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-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
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-port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14
-power_model=Null
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-virt_nets=5
-
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-
-[system.ruby.network.routers2]
-type=Switch
-children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14 port_buffers15 port_buffers16 port_buffers17 port_buffers18 port_buffers19
-clk_domain=system.ruby.clk_domain
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-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19
-power_model=Null
-router_id=2
-virt_nets=5
-
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-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers15]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers16]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers17]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers18]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers19]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.sys_port_proxy]
-type=RubyPortProxy
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_cpu_sequencer=true
-no_retry_on_stall=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-ruby_system=system.ruby
-support_data_reqs=true
-support_inst_reqs=true
-system=system
-using_ruby_tester=false
-version=0
-slave=system.system_port
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simerr b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simerr
deleted file mode 100755 (executable)
index 95500d5..0000000
+++ /dev/null
@@ -1,11 +0,0 @@
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
-warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout
deleted file mode 100755 (executable)
index 8d60476..0000000
+++ /dev/null
@@ -1,12 +0,0 @@
-Redirecting stdout to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby/simout
-Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 18:41:19
-gem5 started Apr  3 2017 18:41:37
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 64825
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/sparc/linux/simple-timing-ruby
-
-Global frequency set at 1000000000 ticks per second
-Hello World!Exiting @ tick 86746 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
deleted file mode 100644 (file)
index 83a3d1a..0000000
+++ /dev/null
@@ -1,669 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000087                      
-sim_ticks                                       86746                      
-final_tick                                      86746                      
-sim_freq                                   1000000000                      
-host_inst_rate                                  50496                      
-host_op_rate                                    50484                      
-host_tick_rate                                 821944                      
-host_mem_usage                                 426428                      
-host_seconds                                     0.11                      
-sim_insts                                        5327                      
-sim_ops                                          5327                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                             1                      
-system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED        86746                      
-system.mem_ctrls.bytes_read::ruby.dir_cntrl0        82496                      
-system.mem_ctrls.bytes_read::total              82496                      
-system.mem_ctrls.bytes_written::ruby.dir_cntrl0        82240                      
-system.mem_ctrls.bytes_written::total           82240                      
-system.mem_ctrls.num_reads::ruby.dir_cntrl0         1289                      
-system.mem_ctrls.num_reads::total                1289                      
-system.mem_ctrls.num_writes::ruby.dir_cntrl0         1285                      
-system.mem_ctrls.num_writes::total               1285                      
-system.mem_ctrls.bw_read::ruby.dir_cntrl0    951006386                      
-system.mem_ctrls.bw_read::total             951006386                      
-system.mem_ctrls.bw_write::ruby.dir_cntrl0    948055242                      
-system.mem_ctrls.bw_write::total            948055242                      
-system.mem_ctrls.bw_total::ruby.dir_cntrl0   1899061628                      
-system.mem_ctrls.bw_total::total           1899061628                      
-system.mem_ctrls.readReqs                        1289                      
-system.mem_ctrls.writeReqs                       1285                      
-system.mem_ctrls.readBursts                      1289                      
-system.mem_ctrls.writeBursts                     1285                      
-system.mem_ctrls.bytesReadDRAM                  44800                      
-system.mem_ctrls.bytesReadWrQ                   37696                      
-system.mem_ctrls.bytesWritten                   45504                      
-system.mem_ctrls.bytesReadSys                   82496                      
-system.mem_ctrls.bytesWrittenSys                82240                      
-system.mem_ctrls.servicedByWrQ                    589                      
-system.mem_ctrls.mergedWrBursts                   555                      
-system.mem_ctrls.neitherReadNorWriteReqs            0                      
-system.mem_ctrls.perBankRdBursts::0                28                      
-system.mem_ctrls.perBankRdBursts::1                17                      
-system.mem_ctrls.perBankRdBursts::2                 1                      
-system.mem_ctrls.perBankRdBursts::3                 8                      
-system.mem_ctrls.perBankRdBursts::4                 0                      
-system.mem_ctrls.perBankRdBursts::5               119                      
-system.mem_ctrls.perBankRdBursts::6               121                      
-system.mem_ctrls.perBankRdBursts::7               141                      
-system.mem_ctrls.perBankRdBursts::8                55                      
-system.mem_ctrls.perBankRdBursts::9                31                      
-system.mem_ctrls.perBankRdBursts::10               13                      
-system.mem_ctrls.perBankRdBursts::11               62                      
-system.mem_ctrls.perBankRdBursts::12               21                      
-system.mem_ctrls.perBankRdBursts::13               61                      
-system.mem_ctrls.perBankRdBursts::14               14                      
-system.mem_ctrls.perBankRdBursts::15                8                      
-system.mem_ctrls.perBankWrBursts::0                28                      
-system.mem_ctrls.perBankWrBursts::1                18                      
-system.mem_ctrls.perBankWrBursts::2                 1                      
-system.mem_ctrls.perBankWrBursts::3                 8                      
-system.mem_ctrls.perBankWrBursts::4                 0                      
-system.mem_ctrls.perBankWrBursts::5               118                      
-system.mem_ctrls.perBankWrBursts::6               114                      
-system.mem_ctrls.perBankWrBursts::7               141                      
-system.mem_ctrls.perBankWrBursts::8                61                      
-system.mem_ctrls.perBankWrBursts::9                35                      
-system.mem_ctrls.perBankWrBursts::10               14                      
-system.mem_ctrls.perBankWrBursts::11               62                      
-system.mem_ctrls.perBankWrBursts::12               23                      
-system.mem_ctrls.perBankWrBursts::13               64                      
-system.mem_ctrls.perBankWrBursts::14               16                      
-system.mem_ctrls.perBankWrBursts::15                8                      
-system.mem_ctrls.numRdRetry                         0                      
-system.mem_ctrls.numWrRetry                         0                      
-system.mem_ctrls.totGap                         86680                      
-system.mem_ctrls.readPktSize::0                     0                      
-system.mem_ctrls.readPktSize::1                     0                      
-system.mem_ctrls.readPktSize::2                     0                      
-system.mem_ctrls.readPktSize::3                     0                      
-system.mem_ctrls.readPktSize::4                     0                      
-system.mem_ctrls.readPktSize::5                     0                      
-system.mem_ctrls.readPktSize::6                  1289                      
-system.mem_ctrls.writePktSize::0                    0                      
-system.mem_ctrls.writePktSize::1                    0                      
-system.mem_ctrls.writePktSize::2                    0                      
-system.mem_ctrls.writePktSize::3                    0                      
-system.mem_ctrls.writePktSize::4                    0                      
-system.mem_ctrls.writePktSize::5                    0                      
-system.mem_ctrls.writePktSize::6                 1285                      
-system.mem_ctrls.rdQLenPdf::0                     700                      
-system.mem_ctrls.rdQLenPdf::1                       0                      
-system.mem_ctrls.rdQLenPdf::2                       0                      
-system.mem_ctrls.rdQLenPdf::3                       0                      
-system.mem_ctrls.rdQLenPdf::4                       0                      
-system.mem_ctrls.rdQLenPdf::5                       0                      
-system.mem_ctrls.rdQLenPdf::6                       0                      
-system.mem_ctrls.rdQLenPdf::7                       0                      
-system.mem_ctrls.rdQLenPdf::8                       0                      
-system.mem_ctrls.rdQLenPdf::9                       0                      
-system.mem_ctrls.rdQLenPdf::10                      0                      
-system.mem_ctrls.rdQLenPdf::11                      0                      
-system.mem_ctrls.rdQLenPdf::12                      0                      
-system.mem_ctrls.rdQLenPdf::13                      0                      
-system.mem_ctrls.rdQLenPdf::14                      0                      
-system.mem_ctrls.rdQLenPdf::15                      0                      
-system.mem_ctrls.rdQLenPdf::16                      0                      
-system.mem_ctrls.rdQLenPdf::17                      0                      
-system.mem_ctrls.rdQLenPdf::18                      0                      
-system.mem_ctrls.rdQLenPdf::19                      0                      
-system.mem_ctrls.rdQLenPdf::20                      0                      
-system.mem_ctrls.rdQLenPdf::21                      0                      
-system.mem_ctrls.rdQLenPdf::22                      0                      
-system.mem_ctrls.rdQLenPdf::23                      0                      
-system.mem_ctrls.rdQLenPdf::24                      0                      
-system.mem_ctrls.rdQLenPdf::25                      0                      
-system.mem_ctrls.rdQLenPdf::26                      0                      
-system.mem_ctrls.rdQLenPdf::27                      0                      
-system.mem_ctrls.rdQLenPdf::28                      0                      
-system.mem_ctrls.rdQLenPdf::29                      0                      
-system.mem_ctrls.rdQLenPdf::30                      0                      
-system.mem_ctrls.rdQLenPdf::31                      0                      
-system.mem_ctrls.wrQLenPdf::0                       1                      
-system.mem_ctrls.wrQLenPdf::1                       1                      
-system.mem_ctrls.wrQLenPdf::2                       1                      
-system.mem_ctrls.wrQLenPdf::3                       1                      
-system.mem_ctrls.wrQLenPdf::4                       1                      
-system.mem_ctrls.wrQLenPdf::5                       1                      
-system.mem_ctrls.wrQLenPdf::6                       1                      
-system.mem_ctrls.wrQLenPdf::7                       1                      
-system.mem_ctrls.wrQLenPdf::8                       1                      
-system.mem_ctrls.wrQLenPdf::9                       1                      
-system.mem_ctrls.wrQLenPdf::10                      1                      
-system.mem_ctrls.wrQLenPdf::11                      1                      
-system.mem_ctrls.wrQLenPdf::12                      1                      
-system.mem_ctrls.wrQLenPdf::13                      1                      
-system.mem_ctrls.wrQLenPdf::14                      1                      
-system.mem_ctrls.wrQLenPdf::15                      3                      
-system.mem_ctrls.wrQLenPdf::16                      3                      
-system.mem_ctrls.wrQLenPdf::17                     35                      
-system.mem_ctrls.wrQLenPdf::18                     45                      
-system.mem_ctrls.wrQLenPdf::19                     45                      
-system.mem_ctrls.wrQLenPdf::20                     49                      
-system.mem_ctrls.wrQLenPdf::21                     49                      
-system.mem_ctrls.wrQLenPdf::22                     46                      
-system.mem_ctrls.wrQLenPdf::23                     44                      
-system.mem_ctrls.wrQLenPdf::24                     44                      
-system.mem_ctrls.wrQLenPdf::25                     44                      
-system.mem_ctrls.wrQLenPdf::26                     44                      
-system.mem_ctrls.wrQLenPdf::27                     44                      
-system.mem_ctrls.wrQLenPdf::28                     44                      
-system.mem_ctrls.wrQLenPdf::29                     44                      
-system.mem_ctrls.wrQLenPdf::30                     44                      
-system.mem_ctrls.wrQLenPdf::31                     44                      
-system.mem_ctrls.wrQLenPdf::32                     44                      
-system.mem_ctrls.wrQLenPdf::33                      0                      
-system.mem_ctrls.wrQLenPdf::34                      0                      
-system.mem_ctrls.wrQLenPdf::35                      0                      
-system.mem_ctrls.wrQLenPdf::36                      0                      
-system.mem_ctrls.wrQLenPdf::37                      0                      
-system.mem_ctrls.wrQLenPdf::38                      0                      
-system.mem_ctrls.wrQLenPdf::39                      0                      
-system.mem_ctrls.wrQLenPdf::40                      0                      
-system.mem_ctrls.wrQLenPdf::41                      0                      
-system.mem_ctrls.wrQLenPdf::42                      0                      
-system.mem_ctrls.wrQLenPdf::43                      0                      
-system.mem_ctrls.wrQLenPdf::44                      0                      
-system.mem_ctrls.wrQLenPdf::45                      0                      
-system.mem_ctrls.wrQLenPdf::46                      0                      
-system.mem_ctrls.wrQLenPdf::47                      0                      
-system.mem_ctrls.wrQLenPdf::48                      0                      
-system.mem_ctrls.wrQLenPdf::49                      0                      
-system.mem_ctrls.wrQLenPdf::50                      0                      
-system.mem_ctrls.wrQLenPdf::51                      0                      
-system.mem_ctrls.wrQLenPdf::52                      0                      
-system.mem_ctrls.wrQLenPdf::53                      0                      
-system.mem_ctrls.wrQLenPdf::54                      0                      
-system.mem_ctrls.wrQLenPdf::55                      0                      
-system.mem_ctrls.wrQLenPdf::56                      0                      
-system.mem_ctrls.wrQLenPdf::57                      0                      
-system.mem_ctrls.wrQLenPdf::58                      0                      
-system.mem_ctrls.wrQLenPdf::59                      0                      
-system.mem_ctrls.wrQLenPdf::60                      0                      
-system.mem_ctrls.wrQLenPdf::61                      0                      
-system.mem_ctrls.wrQLenPdf::62                      0                      
-system.mem_ctrls.wrQLenPdf::63                      0                      
-system.mem_ctrls.bytesPerActivate::samples          247                      
-system.mem_ctrls.bytesPerActivate::mean    359.384615                      
-system.mem_ctrls.bytesPerActivate::gmean   236.451062                      
-system.mem_ctrls.bytesPerActivate::stdev   319.751749                      
-system.mem_ctrls.bytesPerActivate::0-127           54     21.86%     21.86%
-system.mem_ctrls.bytesPerActivate::128-255           65     26.32%     48.18%
-system.mem_ctrls.bytesPerActivate::256-383           38     15.38%     63.56%
-system.mem_ctrls.bytesPerActivate::384-511           27     10.93%     74.49%
-system.mem_ctrls.bytesPerActivate::512-639            8      3.24%     77.73%
-system.mem_ctrls.bytesPerActivate::640-767           10      4.05%     81.78%
-system.mem_ctrls.bytesPerActivate::768-895           11      4.45%     86.23%
-system.mem_ctrls.bytesPerActivate::896-1023            9      3.64%     89.88%
-system.mem_ctrls.bytesPerActivate::1024-1151           25     10.12%    100.00%
-system.mem_ctrls.bytesPerActivate::total          247                      
-system.mem_ctrls.rdPerTurnAround::samples           44                      
-system.mem_ctrls.rdPerTurnAround::mean      15.840909                      
-system.mem_ctrls.rdPerTurnAround::gmean     15.640724                      
-system.mem_ctrls.rdPerTurnAround::stdev      3.183849                      
-system.mem_ctrls.rdPerTurnAround::12-13             2      4.55%      4.55%
-system.mem_ctrls.rdPerTurnAround::14-15            21     47.73%     52.27%
-system.mem_ctrls.rdPerTurnAround::16-17            18     40.91%     93.18%
-system.mem_ctrls.rdPerTurnAround::18-19             2      4.55%     97.73%
-system.mem_ctrls.rdPerTurnAround::34-35             1      2.27%    100.00%
-system.mem_ctrls.rdPerTurnAround::total            44                      
-system.mem_ctrls.wrPerTurnAround::samples           44                      
-system.mem_ctrls.wrPerTurnAround::mean      16.159091                      
-system.mem_ctrls.wrPerTurnAround::gmean     16.147705                      
-system.mem_ctrls.wrPerTurnAround::stdev      0.644951                      
-system.mem_ctrls.wrPerTurnAround::16               41     93.18%     93.18%
-system.mem_ctrls.wrPerTurnAround::17                1      2.27%     95.45%
-system.mem_ctrls.wrPerTurnAround::19                2      4.55%    100.00%
-system.mem_ctrls.wrPerTurnAround::total            44                      
-system.mem_ctrls.totQLat                        12987                      
-system.mem_ctrls.totMemAccLat                   26287                      
-system.mem_ctrls.totBusLat                       3500                      
-system.mem_ctrls.avgQLat                        18.55                      
-system.mem_ctrls.avgBusLat                       5.00                      
-system.mem_ctrls.avgMemAccLat                   37.55                      
-system.mem_ctrls.avgRdBW                       516.45                      
-system.mem_ctrls.avgWrBW                       524.57                      
-system.mem_ctrls.avgRdBWSys                    951.01                      
-system.mem_ctrls.avgWrBWSys                    948.06                      
-system.mem_ctrls.peakBW                      12800.00                      
-system.mem_ctrls.busUtil                         8.13                      
-system.mem_ctrls.busUtilRead                     4.03                      
-system.mem_ctrls.busUtilWrite                    4.10                      
-system.mem_ctrls.avgRdQLen                       1.00                      
-system.mem_ctrls.avgWrQLen                      25.18                      
-system.mem_ctrls.readRowHits                      508                      
-system.mem_ctrls.writeRowHits                     652                      
-system.mem_ctrls.readRowHitRate                 72.57                      
-system.mem_ctrls.writeRowHitRate                89.32                      
-system.mem_ctrls.avgGap                         33.68                      
-system.mem_ctrls.pageHitRate                    81.12                      
-system.mem_ctrls_0.actEnergy                  1099560                      
-system.mem_ctrls_0.preEnergy                   587328                      
-system.mem_ctrls_0.readEnergy                 4969440                      
-system.mem_ctrls_0.writeEnergy                3574656                      
-system.mem_ctrls_0.refreshEnergy         6761040.000000                      
-system.mem_ctrls_0.actBackEnergy             10338432                      
-system.mem_ctrls_0.preBackEnergy               148224                      
-system.mem_ctrls_0.actPowerDownEnergy        27605784                      
-system.mem_ctrls_0.prePowerDownEnergy         1209216                      
-system.mem_ctrls_0.selfRefreshEnergy                0                      
-system.mem_ctrls_0.totalEnergy               56293680                      
-system.mem_ctrls_0.averagePower            648.948424                      
-system.mem_ctrls_0.totalIdleTime                63519                      
-system.mem_ctrls_0.memoryStateTime::IDLE           64                      
-system.mem_ctrls_0.memoryStateTime::REF          2860                      
-system.mem_ctrls_0.memoryStateTime::SREF            0                      
-system.mem_ctrls_0.memoryStateTime::PRE_PDN         3149                      
-system.mem_ctrls_0.memoryStateTime::ACT         20134                      
-system.mem_ctrls_0.memoryStateTime::ACT_PDN        60539                      
-system.mem_ctrls_1.actEnergy                   692580                      
-system.mem_ctrls_1.preEnergy                   367080                      
-system.mem_ctrls_1.readEnergy                 3027360                      
-system.mem_ctrls_1.writeEnergy                2363616                      
-system.mem_ctrls_1.refreshEnergy         6761040.000000                      
-system.mem_ctrls_1.actBackEnergy              9621600                      
-system.mem_ctrls_1.preBackEnergy               296448                      
-system.mem_ctrls_1.actPowerDownEnergy        26302992                      
-system.mem_ctrls_1.prePowerDownEnergy         2761728                      
-system.mem_ctrls_1.selfRefreshEnergy                0                      
-system.mem_ctrls_1.totalEnergy               52194444                      
-system.mem_ctrls_1.averagePower            601.692804                      
-system.mem_ctrls_1.totalIdleTime                64843                      
-system.mem_ctrls_1.memoryStateTime::IDLE          422                      
-system.mem_ctrls_1.memoryStateTime::REF          2860                      
-system.mem_ctrls_1.memoryStateTime::SREF            0                      
-system.mem_ctrls_1.memoryStateTime::PRE_PDN         7192                      
-system.mem_ctrls_1.memoryStateTime::ACT         18590                      
-system.mem_ctrls_1.memoryStateTime::ACT_PDN        57682                      
-system.pwrStateResidencyTicks::UNDEFINED        86746                      
-system.cpu.clk_domain.clock                         1                      
-system.cpu.workload.numSyscalls                    11                      
-system.cpu.pwrStateResidencyTicks::ON           86746                      
-system.cpu.numCycles                            86746                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        5327                      
-system.cpu.committedOps                          5327                      
-system.cpu.num_int_alu_accesses                  4505                      
-system.cpu.num_fp_alu_accesses                      0                      
-system.cpu.num_func_calls                         146                      
-system.cpu.num_conditional_control_insts          773                      
-system.cpu.num_int_insts                         4505                      
-system.cpu.num_fp_insts                             0                      
-system.cpu.num_int_register_reads               10598                      
-system.cpu.num_int_register_writes               4845                      
-system.cpu.num_fp_register_reads                    0                      
-system.cpu.num_fp_register_writes                   0                      
-system.cpu.num_mem_refs                          1401                      
-system.cpu.num_load_insts                         723                      
-system.cpu.num_store_insts                        678                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                      86746                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1121                      
-system.cpu.op_class::No_OpClass                   173      3.22%      3.22%
-system.cpu.op_class::IntAlu                      3796     70.69%     73.91%
-system.cpu.op_class::IntMult                        0      0.00%     73.91%
-system.cpu.op_class::IntDiv                         0      0.00%     73.91%
-system.cpu.op_class::FloatAdd                       0      0.00%     73.91%
-system.cpu.op_class::FloatCmp                       0      0.00%     73.91%
-system.cpu.op_class::FloatCvt                       0      0.00%     73.91%
-system.cpu.op_class::FloatMult                      0      0.00%     73.91%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     73.91%
-system.cpu.op_class::FloatDiv                       0      0.00%     73.91%
-system.cpu.op_class::FloatMisc                      0      0.00%     73.91%
-system.cpu.op_class::FloatSqrt                      0      0.00%     73.91%
-system.cpu.op_class::SimdAdd                        0      0.00%     73.91%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     73.91%
-system.cpu.op_class::SimdAlu                        0      0.00%     73.91%
-system.cpu.op_class::SimdCmp                        0      0.00%     73.91%
-system.cpu.op_class::SimdCvt                        0      0.00%     73.91%
-system.cpu.op_class::SimdMisc                       0      0.00%     73.91%
-system.cpu.op_class::SimdMult                       0      0.00%     73.91%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     73.91%
-system.cpu.op_class::SimdShift                      0      0.00%     73.91%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     73.91%
-system.cpu.op_class::SimdSqrt                       0      0.00%     73.91%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     73.91%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     73.91%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     73.91%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     73.91%
-system.cpu.op_class::MemRead                      723     13.46%     87.37%
-system.cpu.op_class::MemWrite                     678     12.63%    100.00%
-system.cpu.op_class::FloatMemRead                   0      0.00%    100.00%
-system.cpu.op_class::FloatMemWrite                  0      0.00%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       5370                      
-system.ruby.clk_domain.clock                        1                      
-system.ruby.pwrStateResidencyTicks::UNDEFINED        86746                      
-system.ruby.delayHist::bucket_size                  1                      
-system.ruby.delayHist::max_bucket                   9                      
-system.ruby.delayHist::samples                   2574                      
-system.ruby.delayHist                    |        2574    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.delayHist::total                     2574                      
-system.ruby.outstanding_req_hist_seqr::bucket_size            1                      
-system.ruby.outstanding_req_hist_seqr::max_bucket            9                      
-system.ruby.outstanding_req_hist_seqr::samples         6759                      
-system.ruby.outstanding_req_hist_seqr::mean            1                      
-system.ruby.outstanding_req_hist_seqr::gmean            1                      
-system.ruby.outstanding_req_hist_seqr    |           0      0.00%      0.00% |        6759    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.outstanding_req_hist_seqr::total         6759                      
-system.ruby.latency_hist_seqr::bucket_size           64                      
-system.ruby.latency_hist_seqr::max_bucket          639                      
-system.ruby.latency_hist_seqr::samples           6758                      
-system.ruby.latency_hist_seqr::mean         11.836046                      
-system.ruby.latency_hist_seqr::gmean         2.117342                      
-system.ruby.latency_hist_seqr::stdev        27.149732                      
-system.ruby.latency_hist_seqr            |        6079     89.95%     89.95% |         633      9.37%     99.32% |          36      0.53%     99.85% |           1      0.01%     99.87% |           6      0.09%     99.96% |           2      0.03%     99.99% |           0      0.00%     99.99% |           1      0.01%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.latency_hist_seqr::total             6758                      
-system.ruby.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.hit_latency_hist_seqr::samples         5469                      
-system.ruby.hit_latency_hist_seqr::mean             1                      
-system.ruby.hit_latency_hist_seqr::gmean            1                      
-system.ruby.hit_latency_hist_seqr        |           0      0.00%      0.00% |        5469    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.hit_latency_hist_seqr::total         5469                      
-system.ruby.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.miss_latency_hist_seqr::samples         1289                      
-system.ruby.miss_latency_hist_seqr::mean    57.811482                      
-system.ruby.miss_latency_hist_seqr::gmean    51.058094                      
-system.ruby.miss_latency_hist_seqr::stdev    35.397665                      
-system.ruby.miss_latency_hist_seqr       |         610     47.32%     47.32% |         633     49.11%     96.43% |          36      2.79%     99.22% |           1      0.08%     99.30% |           6      0.47%     99.77% |           2      0.16%     99.92% |           0      0.00%     99.92% |           1      0.08%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.miss_latency_hist_seqr::total         1289                      
-system.ruby.Directory.incomplete_times_seqr         1288                      
-system.ruby.dir_cntrl0.forwardFromDir.avg_buf_msgs     0.014813                      
-system.ruby.dir_cntrl0.forwardFromDir.avg_stall_time     0.995735                      
-system.ruby.dir_cntrl0.requestToDir.avg_buf_msgs     0.029672                      
-system.ruby.dir_cntrl0.requestToDir.avg_stall_time    11.745697                      
-system.ruby.dir_cntrl0.responseFromDir.avg_buf_msgs     0.014859                      
-system.ruby.dir_cntrl0.responseFromDir.avg_stall_time     0.999205                      
-system.ruby.dir_cntrl0.responseFromMemory.avg_buf_msgs     0.029672                      
-system.ruby.dir_cntrl0.responseFromMemory.avg_stall_time     0.999216                      
-system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED        86746                      
-system.ruby.l1_cntrl0.cacheMemory.demand_hits         5469                      
-system.ruby.l1_cntrl0.cacheMemory.demand_misses         1289                      
-system.ruby.l1_cntrl0.cacheMemory.demand_accesses         6758                      
-system.ruby.l1_cntrl0.forwardToCache.avg_buf_msgs     0.014813                      
-system.ruby.l1_cntrl0.forwardToCache.avg_stall_time     6.969659                      
-system.ruby.l1_cntrl0.mandatoryQueue.avg_buf_msgs     0.077916                      
-system.ruby.l1_cntrl0.mandatoryQueue.avg_stall_time     0.999988                      
-system.ruby.l1_cntrl0.requestFromCache.avg_buf_msgs     0.059345                      
-system.ruby.l1_cntrl0.requestFromCache.avg_stall_time     1.999931                      
-system.ruby.l1_cntrl0.responseToCache.avg_buf_msgs     0.014859                      
-system.ruby.l1_cntrl0.responseToCache.avg_stall_time     6.993948                      
-system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED        86746                      
-system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED        86746                      
-system.ruby.memctrl_clk_domain.clock                3                      
-system.ruby.network.routers0.port_buffers03.avg_buf_msgs     0.014813                      
-system.ruby.network.routers0.port_buffers03.avg_stall_time     5.974063                      
-system.ruby.network.routers0.port_buffers04.avg_buf_msgs     0.014859                      
-system.ruby.network.routers0.port_buffers04.avg_stall_time     5.994882                      
-system.ruby.network.routers0.port_buffers07.avg_buf_msgs     0.088925                      
-system.ruby.network.routers0.port_buffers07.avg_stall_time     6.746619                      
-system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED        86746                      
-system.ruby.network.routers0.percent_links_utilized     7.418209                      
-system.ruby.network.routers0.msg_count.Control::2         1289                      
-system.ruby.network.routers0.msg_count.Data::2         1285                      
-system.ruby.network.routers0.msg_count.Response_Data::4         1289                      
-system.ruby.network.routers0.msg_count.Writeback_Control::3         1285                      
-system.ruby.network.routers0.msg_bytes.Control::2        10312                      
-system.ruby.network.routers0.msg_bytes.Data::2        92520                      
-system.ruby.network.routers0.msg_bytes.Response_Data::4        92808                      
-system.ruby.network.routers0.msg_bytes.Writeback_Control::3        10280                      
-system.ruby.network.routers1.port_buffers02.avg_buf_msgs     0.029672                      
-system.ruby.network.routers1.port_buffers02.avg_stall_time    10.745928                      
-system.ruby.network.routers1.port_buffers06.avg_buf_msgs     0.014813                      
-system.ruby.network.routers1.port_buffers06.avg_stall_time     1.991446                      
-system.ruby.network.routers1.port_buffers07.avg_buf_msgs     0.014859                      
-system.ruby.network.routers1.port_buffers07.avg_stall_time     1.998386                      
-system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED        86746                      
-system.ruby.network.routers1.percent_links_utilized     7.418209                      
-system.ruby.network.routers1.msg_count.Control::2         1289                      
-system.ruby.network.routers1.msg_count.Data::2         1285                      
-system.ruby.network.routers1.msg_count.Response_Data::4         1289                      
-system.ruby.network.routers1.msg_count.Writeback_Control::3         1285                      
-system.ruby.network.routers1.msg_bytes.Control::2        10312                      
-system.ruby.network.routers1.msg_bytes.Data::2        92520                      
-system.ruby.network.routers1.msg_bytes.Response_Data::4        92808                      
-system.ruby.network.routers1.msg_bytes.Writeback_Control::3        10280                      
-system.ruby.network.int_link_buffers02.avg_buf_msgs     0.029672                      
-system.ruby.network.int_link_buffers02.avg_stall_time     7.746481                      
-system.ruby.network.int_link_buffers08.avg_buf_msgs     0.014813                      
-system.ruby.network.int_link_buffers08.avg_stall_time     2.987135                      
-system.ruby.network.int_link_buffers09.avg_buf_msgs     0.014859                      
-system.ruby.network.int_link_buffers09.avg_stall_time     2.997545                      
-system.ruby.network.int_link_buffers13.avg_buf_msgs     0.014813                      
-system.ruby.network.int_link_buffers13.avg_stall_time     4.978443                      
-system.ruby.network.int_link_buffers14.avg_buf_msgs     0.014859                      
-system.ruby.network.int_link_buffers14.avg_stall_time     4.995792                      
-system.ruby.network.int_link_buffers17.avg_buf_msgs     0.029672                      
-system.ruby.network.int_link_buffers17.avg_stall_time     9.746135                      
-system.ruby.network.routers2.port_buffers03.avg_buf_msgs     0.014813                      
-system.ruby.network.routers2.port_buffers03.avg_stall_time     3.982801                      
-system.ruby.network.routers2.port_buffers04.avg_buf_msgs     0.014859                      
-system.ruby.network.routers2.port_buffers04.avg_stall_time     3.996680                      
-system.ruby.network.routers2.port_buffers07.avg_buf_msgs     0.029672                      
-system.ruby.network.routers2.port_buffers07.avg_stall_time     8.746320                      
-system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED        86746                      
-system.ruby.network.routers2.percent_links_utilized     7.418209                      
-system.ruby.network.routers2.msg_count.Control::2         1289                      
-system.ruby.network.routers2.msg_count.Data::2         1285                      
-system.ruby.network.routers2.msg_count.Response_Data::4         1289                      
-system.ruby.network.routers2.msg_count.Writeback_Control::3         1285                      
-system.ruby.network.routers2.msg_bytes.Control::2        10312                      
-system.ruby.network.routers2.msg_bytes.Data::2        92520                      
-system.ruby.network.routers2.msg_bytes.Response_Data::4        92808                      
-system.ruby.network.routers2.msg_bytes.Writeback_Control::3        10280                      
-system.ruby.network.pwrStateResidencyTicks::UNDEFINED        86746                      
-system.ruby.network.msg_count.Control            3867                      
-system.ruby.network.msg_count.Data               3855                      
-system.ruby.network.msg_count.Response_Data         3867                      
-system.ruby.network.msg_count.Writeback_Control         3855                      
-system.ruby.network.msg_byte.Control            30936                      
-system.ruby.network.msg_byte.Data              277560                      
-system.ruby.network.msg_byte.Response_Data       278424                      
-system.ruby.network.msg_byte.Writeback_Control        30840                      
-system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED        86746                      
-system.ruby.network.routers0.throttle0.link_utilization     7.427432                      
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-system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3         1285                      
-system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4        92808                      
-system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3        10280                      
-system.ruby.network.routers0.throttle1.link_utilization     7.408987                      
-system.ruby.network.routers0.throttle1.msg_count.Control::2         1289                      
-system.ruby.network.routers0.throttle1.msg_count.Data::2         1285                      
-system.ruby.network.routers0.throttle1.msg_bytes.Control::2        10312                      
-system.ruby.network.routers0.throttle1.msg_bytes.Data::2        92520                      
-system.ruby.network.routers1.throttle0.link_utilization     7.408987                      
-system.ruby.network.routers1.throttle0.msg_count.Control::2         1289                      
-system.ruby.network.routers1.throttle0.msg_count.Data::2         1285                      
-system.ruby.network.routers1.throttle0.msg_bytes.Control::2        10312                      
-system.ruby.network.routers1.throttle0.msg_bytes.Data::2        92520                      
-system.ruby.network.routers1.throttle1.link_utilization     7.427432                      
-system.ruby.network.routers1.throttle1.msg_count.Response_Data::4         1289                      
-system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3         1285                      
-system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4        92808                      
-system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3        10280                      
-system.ruby.network.routers2.throttle0.link_utilization     7.427432                      
-system.ruby.network.routers2.throttle0.msg_count.Response_Data::4         1289                      
-system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3         1285                      
-system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4        92808                      
-system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3        10280                      
-system.ruby.network.routers2.throttle1.link_utilization     7.408987                      
-system.ruby.network.routers2.throttle1.msg_count.Control::2         1289                      
-system.ruby.network.routers2.throttle1.msg_count.Data::2         1285                      
-system.ruby.network.routers2.throttle1.msg_bytes.Control::2        10312                      
-system.ruby.network.routers2.throttle1.msg_bytes.Data::2        92520                      
-system.ruby.delayVCHist.vnet_1::bucket_size            1                      
-system.ruby.delayVCHist.vnet_1::max_bucket            9                      
-system.ruby.delayVCHist.vnet_1::samples          1289                      
-system.ruby.delayVCHist.vnet_1           |        1289    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.delayVCHist.vnet_1::total            1289                      
-system.ruby.delayVCHist.vnet_2::bucket_size            1                      
-system.ruby.delayVCHist.vnet_2::max_bucket            9                      
-system.ruby.delayVCHist.vnet_2::samples          1285                      
-system.ruby.delayVCHist.vnet_2           |        1285    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.delayVCHist.vnet_2::total            1285                      
-system.ruby.LD.latency_hist_seqr::bucket_size           64                      
-system.ruby.LD.latency_hist_seqr::max_bucket          639                      
-system.ruby.LD.latency_hist_seqr::samples          715                      
-system.ruby.LD.latency_hist_seqr::mean      30.464336                      
-system.ruby.LD.latency_hist_seqr::gmean      8.484057                      
-system.ruby.LD.latency_hist_seqr::stdev     36.464169                      
-system.ruby.LD.latency_hist_seqr         |         540     75.52%     75.52% |         163     22.80%     98.32% |          10      1.40%     99.72% |           0      0.00%     99.72% |           1      0.14%     99.86% |           1      0.14%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.latency_hist_seqr::total           715                      
-system.ruby.LD.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.LD.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.LD.hit_latency_hist_seqr::samples          320                      
-system.ruby.LD.hit_latency_hist_seqr::mean            1                      
-system.ruby.LD.hit_latency_hist_seqr::gmean            1                      
-system.ruby.LD.hit_latency_hist_seqr     |           0      0.00%      0.00% |         320    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.hit_latency_hist_seqr::total          320                      
-system.ruby.LD.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.LD.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.LD.miss_latency_hist_seqr::samples          395                      
-system.ruby.LD.miss_latency_hist_seqr::mean    54.334177                      
-system.ruby.LD.miss_latency_hist_seqr::gmean    47.961199                      
-system.ruby.LD.miss_latency_hist_seqr::stdev    33.663530                      
-system.ruby.LD.miss_latency_hist_seqr    |         220     55.70%     55.70% |         163     41.27%     96.96% |          10      2.53%     99.49% |           0      0.00%     99.49% |           1      0.25%     99.75% |           1      0.25%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.miss_latency_hist_seqr::total          395                      
-system.ruby.ST.latency_hist_seqr::bucket_size           64                      
-system.ruby.ST.latency_hist_seqr::max_bucket          639                      
-system.ruby.ST.latency_hist_seqr::samples          673                      
-system.ruby.ST.latency_hist_seqr::mean      17.630015                      
-system.ruby.ST.latency_hist_seqr::gmean      2.926423                      
-system.ruby.ST.latency_hist_seqr::stdev     33.570929                      
-system.ruby.ST.latency_hist_seqr         |         555     82.47%     82.47% |         110     16.34%     98.81% |           6      0.89%     99.70% |           0      0.00%     99.70% |           1      0.15%     99.85% |           1      0.15%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.latency_hist_seqr::total           673                      
-system.ruby.ST.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.ST.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.ST.hit_latency_hist_seqr::samples          494                      
-system.ruby.ST.hit_latency_hist_seqr::mean            1                      
-system.ruby.ST.hit_latency_hist_seqr::gmean            1                      
-system.ruby.ST.hit_latency_hist_seqr     |           0      0.00%      0.00% |         494    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.hit_latency_hist_seqr::total          494                      
-system.ruby.ST.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.ST.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.ST.miss_latency_hist_seqr::samples          179                      
-system.ruby.ST.miss_latency_hist_seqr::mean    63.525140                      
-system.ruby.ST.miss_latency_hist_seqr::gmean    56.666113                      
-system.ruby.ST.miss_latency_hist_seqr::stdev    37.000656                      
-system.ruby.ST.miss_latency_hist_seqr    |          61     34.08%     34.08% |         110     61.45%     95.53% |           6      3.35%     98.88% |           0      0.00%     98.88% |           1      0.56%     99.44% |           1      0.56%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.miss_latency_hist_seqr::total          179                      
-system.ruby.IFETCH.latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.latency_hist_seqr::samples         5370                      
-system.ruby.IFETCH.latency_hist_seqr::mean     8.629609                      
-system.ruby.IFETCH.latency_hist_seqr::gmean     1.690107                      
-system.ruby.IFETCH.latency_hist_seqr::stdev    23.432463                      
-system.ruby.IFETCH.latency_hist_seqr     |        4984     92.81%     92.81% |         360      6.70%     99.52% |          20      0.37%     99.89% |           1      0.02%     99.91% |           4      0.07%     99.98% |           0      0.00%     99.98% |           0      0.00%     99.98% |           1      0.02%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.latency_hist_seqr::total         5370                      
-system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.IFETCH.hit_latency_hist_seqr::samples         4655                      
-system.ruby.IFETCH.hit_latency_hist_seqr::mean            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr::gmean            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr |           0      0.00%      0.00% |        4655    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.hit_latency_hist_seqr::total         4655                      
-system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.miss_latency_hist_seqr::samples          715                      
-system.ruby.IFETCH.miss_latency_hist_seqr::mean    58.302098                      
-system.ruby.IFETCH.miss_latency_hist_seqr::gmean    51.492810                      
-system.ruby.IFETCH.miss_latency_hist_seqr::stdev    35.756740                      
-system.ruby.IFETCH.miss_latency_hist_seqr |         329     46.01%     46.01% |         360     50.35%     96.36% |          20      2.80%     99.16% |           1      0.14%     99.30% |           4      0.56%     99.86% |           0      0.00%     99.86% |           0      0.00%     99.86% |           1      0.14%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.miss_latency_hist_seqr::total          715                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::samples         1289                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::mean    57.811482                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::gmean    51.058094                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::stdev    35.397665                      
-system.ruby.Directory.miss_mach_latency_hist_seqr |         610     47.32%     47.32% |         633     49.11%     96.43% |          36      2.79%     99.22% |           1      0.08%     99.30% |           6      0.47%     99.77% |           2      0.16%     99.92% |           0      0.00%     99.92% |           1      0.08%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_mach_latency_hist_seqr::total         1289                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size            8                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket           79                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean           75                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean    75.000000                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           1    100.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total            1                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples          395                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean    54.334177                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean    47.961199                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev    33.663530                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr |         220     55.70%     55.70% |         163     41.27%     96.96% |          10      2.53%     99.49% |           0      0.00%     99.49% |           1      0.25%     99.75% |           1      0.25%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total          395                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples          179                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean    63.525140                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean    56.666113                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev    37.000656                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr |          61     34.08%     34.08% |         110     61.45%     95.53% |           6      3.35%     98.88% |           0      0.00%     98.88% |           1      0.56%     99.44% |           1      0.56%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total          179                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples          715                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean    58.302098                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean    51.492810                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev    35.756740                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr |         329     46.01%     46.01% |         360     50.35%     96.36% |          20      2.80%     99.16% |           1      0.14%     99.30% |           4      0.56%     99.86% |           0      0.00%     99.86% |           0      0.00%     99.86% |           1      0.14%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total          715                      
-system.ruby.Directory_Controller.GETX            1289      0.00%      0.00%
-system.ruby.Directory_Controller.PUTX            1285      0.00%      0.00%
-system.ruby.Directory_Controller.Memory_Data         1289      0.00%      0.00%
-system.ruby.Directory_Controller.Memory_Ack         1285      0.00%      0.00%
-system.ruby.Directory_Controller.I.GETX          1289      0.00%      0.00%
-system.ruby.Directory_Controller.M.PUTX          1285      0.00%      0.00%
-system.ruby.Directory_Controller.IM.Memory_Data         1289      0.00%      0.00%
-system.ruby.Directory_Controller.MI.Memory_Ack         1285      0.00%      0.00%
-system.ruby.L1Cache_Controller.Load               715      0.00%      0.00%
-system.ruby.L1Cache_Controller.Ifetch            5370      0.00%      0.00%
-system.ruby.L1Cache_Controller.Store              673      0.00%      0.00%
-system.ruby.L1Cache_Controller.Data              1289      0.00%      0.00%
-system.ruby.L1Cache_Controller.Replacement         1285      0.00%      0.00%
-system.ruby.L1Cache_Controller.Writeback_Ack         1285      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Load             395      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Ifetch           715      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Store            179      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Load             320      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Ifetch          4655      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Store            494      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Replacement         1285      0.00%      0.00%
-system.ruby.L1Cache_Controller.MI.Writeback_Ack         1285      0.00%      0.00%
-system.ruby.L1Cache_Controller.IS.Data           1110      0.00%      0.00%
-system.ruby.L1Cache_Controller.IM.Data            179      0.00%      0.00%
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini
deleted file mode 100644 (file)
index 48a2ce7..0000000
+++ /dev/null
@@ -1,382 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/sparc/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simerr b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simerr
deleted file mode 100755 (executable)
index c0b55d1..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simout
deleted file mode 100755 (executable)
index 5531435..0000000
+++ /dev/null
@@ -1,12 +0,0 @@
-Redirecting stdout to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing/simout
-Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 18:41:19
-gem5 started Apr  3 2017 18:41:41
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 64913
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/sparc/linux/simple-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello World!Exiting @ tick 30915500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt
deleted file mode 100644 (file)
index 0583936..0000000
+++ /dev/null
@@ -1,497 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000031                      
-sim_ticks                                    30915500                      
-final_tick                                   30915500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 330902                      
-host_op_rate                                   330442                      
-host_tick_rate                             1915496347                      
-host_mem_usage                                 261572                      
-host_seconds                                     0.02                      
-sim_insts                                        5327                      
-sim_ops                                          5327                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED     30915500                      
-system.physmem.bytes_read::cpu.inst             16320                      
-system.physmem.bytes_read::cpu.data              8576                      
-system.physmem.bytes_read::total                24896                      
-system.physmem.bytes_inst_read::cpu.inst        16320                      
-system.physmem.bytes_inst_read::total           16320                      
-system.physmem.num_reads::cpu.inst                255                      
-system.physmem.num_reads::cpu.data                134                      
-system.physmem.num_reads::total                   389                      
-system.physmem.bw_read::cpu.inst            527890540                      
-system.physmem.bw_read::cpu.data            277401304                      
-system.physmem.bw_read::total               805291844                      
-system.physmem.bw_inst_read::cpu.inst       527890540                      
-system.physmem.bw_inst_read::total          527890540                      
-system.physmem.bw_total::cpu.inst           527890540                      
-system.physmem.bw_total::cpu.data           277401304                      
-system.physmem.bw_total::total              805291844                      
-system.pwrStateResidencyTicks::UNDEFINED     30915500                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.workload.numSyscalls                    11                      
-system.cpu.pwrStateResidencyTicks::ON        30915500                      
-system.cpu.numCycles                            61831                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        5327                      
-system.cpu.committedOps                          5327                      
-system.cpu.num_int_alu_accesses                  4505                      
-system.cpu.num_fp_alu_accesses                      0                      
-system.cpu.num_func_calls                         146                      
-system.cpu.num_conditional_control_insts          773                      
-system.cpu.num_int_insts                         4505                      
-system.cpu.num_fp_insts                             0                      
-system.cpu.num_int_register_reads               10598                      
-system.cpu.num_int_register_writes               4845                      
-system.cpu.num_fp_register_reads                    0                      
-system.cpu.num_fp_register_writes                   0                      
-system.cpu.num_mem_refs                          1401                      
-system.cpu.num_load_insts                         723                      
-system.cpu.num_store_insts                        678                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                      61831                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1121                      
-system.cpu.op_class::No_OpClass                   173      3.22%      3.22%
-system.cpu.op_class::IntAlu                      3796     70.69%     73.91%
-system.cpu.op_class::IntMult                        0      0.00%     73.91%
-system.cpu.op_class::IntDiv                         0      0.00%     73.91%
-system.cpu.op_class::FloatAdd                       0      0.00%     73.91%
-system.cpu.op_class::FloatCmp                       0      0.00%     73.91%
-system.cpu.op_class::FloatCvt                       0      0.00%     73.91%
-system.cpu.op_class::FloatMult                      0      0.00%     73.91%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     73.91%
-system.cpu.op_class::FloatDiv                       0      0.00%     73.91%
-system.cpu.op_class::FloatMisc                      0      0.00%     73.91%
-system.cpu.op_class::FloatSqrt                      0      0.00%     73.91%
-system.cpu.op_class::SimdAdd                        0      0.00%     73.91%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     73.91%
-system.cpu.op_class::SimdAlu                        0      0.00%     73.91%
-system.cpu.op_class::SimdCmp                        0      0.00%     73.91%
-system.cpu.op_class::SimdCvt                        0      0.00%     73.91%
-system.cpu.op_class::SimdMisc                       0      0.00%     73.91%
-system.cpu.op_class::SimdMult                       0      0.00%     73.91%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     73.91%
-system.cpu.op_class::SimdShift                      0      0.00%     73.91%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     73.91%
-system.cpu.op_class::SimdSqrt                       0      0.00%     73.91%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     73.91%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     73.91%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     73.91%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     73.91%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     73.91%
-system.cpu.op_class::MemRead                      723     13.46%     87.37%
-system.cpu.op_class::MemWrite                     678     12.63%    100.00%
-system.cpu.op_class::FloatMemRead                   0      0.00%    100.00%
-system.cpu.op_class::FloatMemWrite                  0      0.00%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       5370                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     30915500                      
-system.cpu.dcache.tags.replacements                 0                      
-system.cpu.dcache.tags.tagsinuse            81.942328                      
-system.cpu.dcache.tags.total_refs                1253                      
-system.cpu.dcache.tags.sampled_refs               135                      
-system.cpu.dcache.tags.avg_refs              9.281481                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data    81.942328                      
-system.cpu.dcache.tags.occ_percent::cpu.data     0.020005                      
-system.cpu.dcache.tags.occ_percent::total     0.020005                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024          135                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           28                      
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-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst     12878000                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total     12878000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data      2676500                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      2676500                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     12878000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data      6767000                      
-system.cpu.l2cache.demand_mshr_miss_latency::total     19645000                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     12878000                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data      6767000                      
-system.cpu.l2cache.overall_mshr_miss_latency::total     19645000                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.992218                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.992218                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data     0.981481                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total     0.981481                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.992218                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data     0.992593                      
-system.cpu.l2cache.demand_mshr_miss_rate::total     0.992347                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.992218                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data     0.992593                      
-system.cpu.l2cache.overall_mshr_miss_rate::total     0.992347                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total        50500                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50501.960784                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50501.960784                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total        50500                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50501.960784                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50501.285347                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50501.960784                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50501.285347                      
-system.cpu.toL2Bus.snoop_filter.tot_requests          392                      
-system.cpu.toL2Bus.snoop_filter.hit_single_requests            3                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0                      
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     30915500                      
-system.cpu.toL2Bus.trans_dist::ReadResp           311                      
-system.cpu.toL2Bus.trans_dist::ReadExReq           81                      
-system.cpu.toL2Bus.trans_dist::ReadExResp           81                      
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          257                      
-system.cpu.toL2Bus.trans_dist::ReadSharedReq           54                      
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          514                      
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          270                      
-system.cpu.toL2Bus.pkt_count::total               784                      
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        16448                      
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         8640                      
-system.cpu.toL2Bus.pkt_size::total              25088                      
-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples          392                      
-system.cpu.toL2Bus.snoop_fanout::mean        0.007653                      
-system.cpu.toL2Bus.snoop_fanout::stdev       0.087258                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0                389     99.23%     99.23%
-system.cpu.toL2Bus.snoop_fanout::1                  3      0.77%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            1                      
-system.cpu.toL2Bus.snoop_fanout::total            392                      
-system.cpu.toL2Bus.reqLayer0.occupancy         196000                      
-system.cpu.toL2Bus.reqLayer0.utilization          0.6                      
-system.cpu.toL2Bus.respLayer0.occupancy        385500                      
-system.cpu.toL2Bus.respLayer0.utilization          1.2                      
-system.cpu.toL2Bus.respLayer1.occupancy        202500                      
-system.cpu.toL2Bus.respLayer1.utilization          0.7                      
-system.membus.snoop_filter.tot_requests           389                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED     30915500                      
-system.membus.trans_dist::ReadResp                308                      
-system.membus.trans_dist::ReadExReq                81                      
-system.membus.trans_dist::ReadExResp               81                      
-system.membus.trans_dist::ReadSharedReq           308                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          778                      
-system.membus.pkt_count::total                    778                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        24896                      
-system.membus.pkt_size::total                   24896                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples               389                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                     389    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                 389                      
-system.membus.reqLayer0.occupancy              389500                      
-system.membus.reqLayer0.utilization               1.3                      
-system.membus.respLayer1.occupancy            1945000                      
-system.membus.respLayer1.utilization              6.3                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini
deleted file mode 100644 (file)
index b5dc4aa..0000000
+++ /dev/null
@@ -1,924 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-kvm_vm=Null
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=DerivO3CPU
-children=apic_clk_domain branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload
-LFSTSize=1024
-LQEntries=32
-LSQCheckLoads=true
-LSQDepCheckShift=4
-SQEntries=32
-SSITSize=1024
-activity=0
-backComSize=5
-branchPred=system.cpu.branchPred
-cacheStorePorts=200
-checker=Null
-clk_domain=system.cpu_clk_domain
-commitToDecodeDelay=1
-commitToFetchDelay=1
-commitToIEWDelay=1
-commitToRenameDelay=1
-commitWidth=8
-cpu_id=0
-decodeToFetchDelay=1
-decodeToRenameDelay=1
-decodeWidth=8
-default_p_state=UNDEFINED
-dispatchWidth=8
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fetchBufferSize=64
-fetchQueueSize=32
-fetchToDecodeDelay=1
-fetchTrapLatency=1
-fetchWidth=8
-forwardComSize=5
-fuPool=system.cpu.fuPool
-function_trace=false
-function_trace_start=0
-iewToCommitDelay=1
-iewToDecodeDelay=1
-iewToFetchDelay=1
-iewToRenameDelay=1
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-issueToExecuteDelay=1
-issueWidth=8
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-needsTSO=true
-numIQEntries=64
-numPhysCCRegs=1280
-numPhysFloatRegs=256
-numPhysIntRegs=256
-numROBEntries=192
-numRobs=1
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-renameToDecodeDelay=1
-renameToFetchDelay=1
-renameToIEWDelay=2
-renameToROBDelay=1
-renameWidth=8
-simpoint_start_insts=
-smtCommitPolicy=RoundRobin
-smtFetchPolicy=SingleThread
-smtIQPolicy=Partitioned
-smtIQThreshold=100
-smtLSQPolicy=Partitioned
-smtLSQThreshold=100
-smtNumFetchingThreads=1
-smtROBPolicy=Partitioned
-smtROBThreshold=100
-socket_id=0
-squashWidth=8
-store_set_clear_period=250000
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-trapLatency=13
-wbWidth=8
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.apic_clk_domain]
-type=DerivedClockDomain
-clk_divider=16
-clk_domain=system.cpu_clk_domain
-eventq_index=0
-
-[system.cpu.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-system=system
-port=system.cpu.toL2Bus.slave[3]
-
-[system.cpu.fuPool]
-type=FUPool
-children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
-FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
-eventq_index=0
-
-[system.cpu.fuPool.FUList0]
-type=FUDesc
-children=opList
-count=6
-eventq_index=0
-opList=system.cpu.fuPool.FUList0.opList
-
-[system.cpu.fuPool.FUList0.opList]
-type=OpDesc
-eventq_index=0
-opClass=IntAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList1]
-type=FUDesc
-children=opList0 opList1
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
-
-[system.cpu.fuPool.FUList1.opList0]
-type=OpDesc
-eventq_index=0
-opClass=IntMult
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList1.opList1]
-type=OpDesc
-eventq_index=0
-opClass=IntDiv
-opLat=1
-pipelined=false
-
-[system.cpu.fuPool.FUList2]
-type=FUDesc
-children=opList0 opList1 opList2
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
-
-[system.cpu.fuPool.FUList2.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatAdd
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatCmp
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatCvt
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList3]
-type=FUDesc
-children=opList0 opList1 opList2 opList3 opList4
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 system.cpu.fuPool.FUList3.opList3 system.cpu.fuPool.FUList3.opList4
-
-[system.cpu.fuPool.FUList3.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatMult
-opLat=4
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMultAcc
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMisc
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatDiv
-opLat=12
-pipelined=false
-
-[system.cpu.fuPool.FUList3.opList4]
-type=OpDesc
-eventq_index=0
-opClass=FloatSqrt
-opLat=24
-pipelined=false
-
-[system.cpu.fuPool.FUList4]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList4.opList0 system.cpu.fuPool.FUList4.opList1
-
-[system.cpu.fuPool.FUList4.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5]
-type=FUDesc
-children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
-
-[system.cpu.fuPool.FUList5.opList00]
-type=OpDesc
-eventq_index=0
-opClass=SimdAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList01]
-type=OpDesc
-eventq_index=0
-opClass=SimdAddAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList02]
-type=OpDesc
-eventq_index=0
-opClass=SimdAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList03]
-type=OpDesc
-eventq_index=0
-opClass=SimdCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList04]
-type=OpDesc
-eventq_index=0
-opClass=SimdCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList05]
-type=OpDesc
-eventq_index=0
-opClass=SimdMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList06]
-type=OpDesc
-eventq_index=0
-opClass=SimdMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList07]
-type=OpDesc
-eventq_index=0
-opClass=SimdMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList08]
-type=OpDesc
-eventq_index=0
-opClass=SimdShift
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList09]
-type=OpDesc
-eventq_index=0
-opClass=SimdShiftAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList10]
-type=OpDesc
-eventq_index=0
-opClass=SimdSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList11]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList12]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList13]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList14]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList15]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatDiv
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList16]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList17]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList18]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList19]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1
-
-[system.cpu.fuPool.FUList6.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7]
-type=FUDesc
-children=opList0 opList1 opList2 opList3
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 system.cpu.fuPool.FUList7.opList2 system.cpu.fuPool.FUList7.opList3
-
-[system.cpu.fuPool.FUList7.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList1]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList8]
-type=FUDesc
-children=opList
-count=1
-eventq_index=0
-opList=system.cpu.fuPool.FUList8.opList
-
-[system.cpu.fuPool.FUList8.opList]
-type=OpDesc
-eventq_index=0
-opClass=IprAccess
-opLat=3
-pipelined=false
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=X86LocalApic
-clk_domain=system.cpu.apic_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-int_latency=1000
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-pio_addr=2305843009213693952
-pio_latency=100000
-power_model=Null
-system=system
-int_master=system.membus.slave[2]
-int_slave=system.membus.master[2]
-pio=system.membus.master[1]
-
-[system.cpu.isa]
-type=X86ISA
-eventq_index=0
-
-[system.cpu.itb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-system=system
-port=system.cpu.toL2Bus.slave[2]
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/x86/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
-slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-page_policy=open_adaptive
-power_model=Null
-range=0:134217727:0:0:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10000
-static_frontend_latency=10000
-tBURST=5000
-tCCD_L=0
-tCK=1250
-tCL=13750
-tCS=2500
-tRAS=35000
-tRCD=13750
-tREFI=7800000
-tRFC=260000
-tRP=13750
-tRRD=6000
-tRRD_L=0
-tRTP=7500
-tRTW=2500
-tWR=15000
-tWTR=7500
-tXAW=30000
-tXP=6000
-tXPDLL=0
-tXS=270000
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simerr b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simerr
deleted file mode 100755 (executable)
index 707fed9..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout
deleted file mode 100755 (executable)
index d96836b..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing/simout
-Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 19:05:53
-gem5 started Apr  3 2017 19:06:21
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 87180
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/x86/linux/o3-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 22516500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt
deleted file mode 100644 (file)
index f96155f..0000000
+++ /dev/null
@@ -1,995 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000023                      
-sim_ticks                                    22516500                      
-final_tick                                   22516500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                  26720                      
-host_op_rate                                    48405                      
-host_tick_rate                              111808950                      
-host_mem_usage                                 281880                      
-host_seconds                                     0.20                      
-sim_insts                                        5380                      
-sim_ops                                          9747                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.physmem.bytes_read::cpu.inst             17728                      
-system.physmem.bytes_read::cpu.data              8960                      
-system.physmem.bytes_read::total                26688                      
-system.physmem.bytes_inst_read::cpu.inst        17728                      
-system.physmem.bytes_inst_read::total           17728                      
-system.physmem.num_reads::cpu.inst                277                      
-system.physmem.num_reads::cpu.data                140                      
-system.physmem.num_reads::total                   417                      
-system.physmem.bw_read::cpu.inst            787333733                      
-system.physmem.bw_read::cpu.data            397930407                      
-system.physmem.bw_read::total              1185264140                      
-system.physmem.bw_inst_read::cpu.inst       787333733                      
-system.physmem.bw_inst_read::total          787333733                      
-system.physmem.bw_total::cpu.inst           787333733                      
-system.physmem.bw_total::cpu.data           397930407                      
-system.physmem.bw_total::total             1185264140                      
-system.physmem.readReqs                           417                      
-system.physmem.writeReqs                            0                      
-system.physmem.readBursts                         417                      
-system.physmem.writeBursts                          0                      
-system.physmem.bytesReadDRAM                    26688                      
-system.physmem.bytesReadWrQ                         0                      
-system.physmem.bytesWritten                         0                      
-system.physmem.bytesReadSys                     26688                      
-system.physmem.bytesWrittenSys                      0                      
-system.physmem.servicedByWrQ                        0                      
-system.physmem.mergedWrBursts                       0                      
-system.physmem.neitherReadNorWriteReqs              0                      
-system.physmem.perBankRdBursts::0                  31                      
-system.physmem.perBankRdBursts::1                   1                      
-system.physmem.perBankRdBursts::2                   5                      
-system.physmem.perBankRdBursts::3                   8                      
-system.physmem.perBankRdBursts::4                  51                      
-system.physmem.perBankRdBursts::5                  44                      
-system.physmem.perBankRdBursts::6                  21                      
-system.physmem.perBankRdBursts::7                  36                      
-system.physmem.perBankRdBursts::8                  24                      
-system.physmem.perBankRdBursts::9                  71                      
-system.physmem.perBankRdBursts::10                 64                      
-system.physmem.perBankRdBursts::11                 16                      
-system.physmem.perBankRdBursts::12                  2                      
-system.physmem.perBankRdBursts::13                 20                      
-system.physmem.perBankRdBursts::14                  6                      
-system.physmem.perBankRdBursts::15                 17                      
-system.physmem.perBankWrBursts::0                   0                      
-system.physmem.perBankWrBursts::1                   0                      
-system.physmem.perBankWrBursts::2                   0                      
-system.physmem.perBankWrBursts::3                   0                      
-system.physmem.perBankWrBursts::4                   0                      
-system.physmem.perBankWrBursts::5                   0                      
-system.physmem.perBankWrBursts::6                   0                      
-system.physmem.perBankWrBursts::7                   0                      
-system.physmem.perBankWrBursts::8                   0                      
-system.physmem.perBankWrBursts::9                   0                      
-system.physmem.perBankWrBursts::10                  0                      
-system.physmem.perBankWrBursts::11                  0                      
-system.physmem.perBankWrBursts::12                  0                      
-system.physmem.perBankWrBursts::13                  0                      
-system.physmem.perBankWrBursts::14                  0                      
-system.physmem.perBankWrBursts::15                  0                      
-system.physmem.numRdRetry                           0                      
-system.physmem.numWrRetry                           0                      
-system.physmem.totGap                        22387500                      
-system.physmem.readPktSize::0                       0                      
-system.physmem.readPktSize::1                       0                      
-system.physmem.readPktSize::2                       0                      
-system.physmem.readPktSize::3                       0                      
-system.physmem.readPktSize::4                       0                      
-system.physmem.readPktSize::5                       0                      
-system.physmem.readPktSize::6                     417                      
-system.physmem.writePktSize::0                      0                      
-system.physmem.writePktSize::1                      0                      
-system.physmem.writePktSize::2                      0                      
-system.physmem.writePktSize::3                      0                      
-system.physmem.writePktSize::4                      0                      
-system.physmem.writePktSize::5                      0                      
-system.physmem.writePktSize::6                      0                      
-system.physmem.rdQLenPdf::0                       242                      
-system.physmem.rdQLenPdf::1                       128                      
-system.physmem.rdQLenPdf::2                        37                      
-system.physmem.rdQLenPdf::3                         9                      
-system.physmem.rdQLenPdf::4                         1                      
-system.physmem.rdQLenPdf::5                         0                      
-system.physmem.rdQLenPdf::6                         0                      
-system.physmem.rdQLenPdf::7                         0                      
-system.physmem.rdQLenPdf::8                         0                      
-system.physmem.rdQLenPdf::9                         0                      
-system.physmem.rdQLenPdf::10                        0                      
-system.physmem.rdQLenPdf::11                        0                      
-system.physmem.rdQLenPdf::12                        0                      
-system.physmem.rdQLenPdf::13                        0                      
-system.physmem.rdQLenPdf::14                        0                      
-system.physmem.rdQLenPdf::15                        0                      
-system.physmem.rdQLenPdf::16                        0                      
-system.physmem.rdQLenPdf::17                        0                      
-system.physmem.rdQLenPdf::18                        0                      
-system.physmem.rdQLenPdf::19                        0                      
-system.physmem.rdQLenPdf::20                        0                      
-system.physmem.rdQLenPdf::21                        0                      
-system.physmem.rdQLenPdf::22                        0                      
-system.physmem.rdQLenPdf::23                        0                      
-system.physmem.rdQLenPdf::24                        0                      
-system.physmem.rdQLenPdf::25                        0                      
-system.physmem.rdQLenPdf::26                        0                      
-system.physmem.rdQLenPdf::27                        0                      
-system.physmem.rdQLenPdf::28                        0                      
-system.physmem.rdQLenPdf::29                        0                      
-system.physmem.rdQLenPdf::30                        0                      
-system.physmem.rdQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::0                         0                      
-system.physmem.wrQLenPdf::1                         0                      
-system.physmem.wrQLenPdf::2                         0                      
-system.physmem.wrQLenPdf::3                         0                      
-system.physmem.wrQLenPdf::4                         0                      
-system.physmem.wrQLenPdf::5                         0                      
-system.physmem.wrQLenPdf::6                         0                      
-system.physmem.wrQLenPdf::7                         0                      
-system.physmem.wrQLenPdf::8                         0                      
-system.physmem.wrQLenPdf::9                         0                      
-system.physmem.wrQLenPdf::10                        0                      
-system.physmem.wrQLenPdf::11                        0                      
-system.physmem.wrQLenPdf::12                        0                      
-system.physmem.wrQLenPdf::13                        0                      
-system.physmem.wrQLenPdf::14                        0                      
-system.physmem.wrQLenPdf::15                        0                      
-system.physmem.wrQLenPdf::16                        0                      
-system.physmem.wrQLenPdf::17                        0                      
-system.physmem.wrQLenPdf::18                        0                      
-system.physmem.wrQLenPdf::19                        0                      
-system.physmem.wrQLenPdf::20                        0                      
-system.physmem.wrQLenPdf::21                        0                      
-system.physmem.wrQLenPdf::22                        0                      
-system.physmem.wrQLenPdf::23                        0                      
-system.physmem.wrQLenPdf::24                        0                      
-system.physmem.wrQLenPdf::25                        0                      
-system.physmem.wrQLenPdf::26                        0                      
-system.physmem.wrQLenPdf::27                        0                      
-system.physmem.wrQLenPdf::28                        0                      
-system.physmem.wrQLenPdf::29                        0                      
-system.physmem.wrQLenPdf::30                        0                      
-system.physmem.wrQLenPdf::31                        0                      
-system.physmem.wrQLenPdf::32                        0                      
-system.physmem.wrQLenPdf::33                        0                      
-system.physmem.wrQLenPdf::34                        0                      
-system.physmem.wrQLenPdf::35                        0                      
-system.physmem.wrQLenPdf::36                        0                      
-system.physmem.wrQLenPdf::37                        0                      
-system.physmem.wrQLenPdf::38                        0                      
-system.physmem.wrQLenPdf::39                        0                      
-system.physmem.wrQLenPdf::40                        0                      
-system.physmem.wrQLenPdf::41                        0                      
-system.physmem.wrQLenPdf::42                        0                      
-system.physmem.wrQLenPdf::43                        0                      
-system.physmem.wrQLenPdf::44                        0                      
-system.physmem.wrQLenPdf::45                        0                      
-system.physmem.wrQLenPdf::46                        0                      
-system.physmem.wrQLenPdf::47                        0                      
-system.physmem.wrQLenPdf::48                        0                      
-system.physmem.wrQLenPdf::49                        0                      
-system.physmem.wrQLenPdf::50                        0                      
-system.physmem.wrQLenPdf::51                        0                      
-system.physmem.wrQLenPdf::52                        0                      
-system.physmem.wrQLenPdf::53                        0                      
-system.physmem.wrQLenPdf::54                        0                      
-system.physmem.wrQLenPdf::55                        0                      
-system.physmem.wrQLenPdf::56                        0                      
-system.physmem.wrQLenPdf::57                        0                      
-system.physmem.wrQLenPdf::58                        0                      
-system.physmem.wrQLenPdf::59                        0                      
-system.physmem.wrQLenPdf::60                        0                      
-system.physmem.wrQLenPdf::61                        0                      
-system.physmem.wrQLenPdf::62                        0                      
-system.physmem.wrQLenPdf::63                        0                      
-system.physmem.bytesPerActivate::samples           98                      
-system.physmem.bytesPerActivate::mean      239.673469                      
-system.physmem.bytesPerActivate::gmean     154.283411                      
-system.physmem.bytesPerActivate::stdev     255.721287                      
-system.physmem.bytesPerActivate::0-127             41     41.84%     41.84%
-system.physmem.bytesPerActivate::128-255           22     22.45%     64.29%
-system.physmem.bytesPerActivate::256-383           16     16.33%     80.61%
-system.physmem.bytesPerActivate::384-511            7      7.14%     87.76%
-system.physmem.bytesPerActivate::512-639            1      1.02%     88.78%
-system.physmem.bytesPerActivate::640-767            3      3.06%     91.84%
-system.physmem.bytesPerActivate::768-895            2      2.04%     93.88%
-system.physmem.bytesPerActivate::896-1023            2      2.04%     95.92%
-system.physmem.bytesPerActivate::1024-1151            4      4.08%    100.00%
-system.physmem.bytesPerActivate::total             98                      
-system.physmem.totQLat                        6651000                      
-system.physmem.totMemAccLat                  14469750                      
-system.physmem.totBusLat                      2085000                      
-system.physmem.avgQLat                       15949.64                      
-system.physmem.avgBusLat                      5000.00                      
-system.physmem.avgMemAccLat                  34699.64                      
-system.physmem.avgRdBW                        1185.26                      
-system.physmem.avgWrBW                           0.00                      
-system.physmem.avgRdBWSys                     1185.26                      
-system.physmem.avgWrBWSys                        0.00                      
-system.physmem.peakBW                        12800.00                      
-system.physmem.busUtil                           9.26                      
-system.physmem.busUtilRead                       9.26                      
-system.physmem.busUtilWrite                      0.00                      
-system.physmem.avgRdQLen                         1.67                      
-system.physmem.avgWrQLen                         0.00                      
-system.physmem.readRowHits                        307                      
-system.physmem.writeRowHits                         0                      
-system.physmem.readRowHitRate                   73.62                      
-system.physmem.writeRowHitRate                    nan                      
-system.physmem.avgGap                        53687.05                      
-system.physmem.pageHitRate                      73.62                      
-system.physmem_0.actEnergy                     307020                      
-system.physmem_0.preEnergy                     140415                      
-system.physmem_0.readEnergy                   1406580                      
-system.physmem_0.writeEnergy                        0                      
-system.physmem_0.refreshEnergy           1229280.000000                      
-system.physmem_0.actBackEnergy                2488050                      
-system.physmem_0.preBackEnergy                  28320                      
-system.physmem_0.actPowerDownEnergy           7581570                      
-system.physmem_0.prePowerDownEnergy            138720                      
-system.physmem_0.selfRefreshEnergy                  0                      
-system.physmem_0.totalEnergy                 13319955                      
-system.physmem_0.averagePower              591.537915                      
-system.physmem_0.totalIdleTime               16888750                      
-system.physmem_0.memoryStateTime::IDLE          17500                      
-system.physmem_0.memoryStateTime::REF          520000                      
-system.physmem_0.memoryStateTime::SREF              0                      
-system.physmem_0.memoryStateTime::PRE_PDN       361000                      
-system.physmem_0.memoryStateTime::ACT         4997500                      
-system.physmem_0.memoryStateTime::ACT_PDN     16620500                      
-system.physmem_1.actEnergy                     478380                      
-system.physmem_1.preEnergy                     231495                      
-system.physmem_1.readEnergy                   1570800                      
-system.physmem_1.writeEnergy                        0                      
-system.physmem_1.refreshEnergy           1229280.000000                      
-system.physmem_1.actBackEnergy                2961150                      
-system.physmem_1.preBackEnergy                  80160                      
-system.physmem_1.actPowerDownEnergy           7211640                      
-system.physmem_1.prePowerDownEnergy                 0                      
-system.physmem_1.selfRefreshEnergy                  0                      
-system.physmem_1.totalEnergy                 13762905                      
-system.physmem_1.averagePower              611.209282                      
-system.physmem_1.totalIdleTime               15691750                      
-system.physmem_1.memoryStateTime::IDLE         103000                      
-system.physmem_1.memoryStateTime::REF          520000                      
-system.physmem_1.memoryStateTime::SREF              0                      
-system.physmem_1.memoryStateTime::PRE_PDN            0                      
-system.physmem_1.memoryStateTime::ACT         6065500                      
-system.physmem_1.memoryStateTime::ACT_PDN     15828000                      
-system.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.cpu.branchPred.lookups                    3542                      
-system.cpu.branchPred.condPredicted              3542                      
-system.cpu.branchPred.condIncorrect               576                      
-system.cpu.branchPred.BTBLookups                 3006                      
-system.cpu.branchPred.BTBHits                       0                      
-system.cpu.branchPred.BTBCorrect                    0                      
-system.cpu.branchPred.BTBHitPct              0.000000                      
-system.cpu.branchPred.usedRAS                     386                      
-system.cpu.branchPred.RASInCorrect                 97                      
-system.cpu.branchPred.indirectLookups            3006                      
-system.cpu.branchPred.indirectHits                514                      
-system.cpu.branchPred.indirectMisses             2492                      
-system.cpu.branchPredindirectMispredicted          416                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.cpu.apic_clk_domain.clock                 8000                      
-system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.cpu.workload.numSyscalls                    11                      
-system.cpu.pwrStateResidencyTicks::ON        22516500                      
-system.cpu.numCycles                            45034                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.fetch.icacheStallCycles              12047                      
-system.cpu.fetch.Insts                          16169                      
-system.cpu.fetch.Branches                        3542                      
-system.cpu.fetch.predictedBranches                900                      
-system.cpu.fetch.Cycles                         10333                      
-system.cpu.fetch.SquashCycles                    1320                      
-system.cpu.fetch.MiscStallCycles                   74                      
-system.cpu.fetch.PendingTrapStallCycles          1582                      
-system.cpu.fetch.PendingQuiesceStallCycles           15                      
-system.cpu.fetch.IcacheWaitRetryStallCycles           26                      
-system.cpu.fetch.CacheLines                      2077                      
-system.cpu.fetch.IcacheSquashes                   274                      
-system.cpu.fetch.rateDist::samples              24737                      
-system.cpu.fetch.rateDist::mean              1.175931                      
-system.cpu.fetch.rateDist::stdev             2.701309                      
-system.cpu.fetch.rateDist::underflows               0      0.00%      0.00%
-system.cpu.fetch.rateDist::0                    20389     82.42%     82.42%
-system.cpu.fetch.rateDist::1                      178      0.72%     83.14%
-system.cpu.fetch.rateDist::2                      168      0.68%     83.82%
-system.cpu.fetch.rateDist::3                      246      0.99%     84.82%
-system.cpu.fetch.rateDist::4                      215      0.87%     85.69%
-system.cpu.fetch.rateDist::5                      220      0.89%     86.57%
-system.cpu.fetch.rateDist::6                      262      1.06%     87.63%
-system.cpu.fetch.rateDist::7                      167      0.68%     88.31%
-system.cpu.fetch.rateDist::8                     2892     11.69%    100.00%
-system.cpu.fetch.rateDist::overflows                0      0.00%    100.00%
-system.cpu.fetch.rateDist::min_value                0                      
-system.cpu.fetch.rateDist::max_value                8                      
-system.cpu.fetch.rateDist::total                24737                      
-system.cpu.fetch.branchRate                  0.078652                      
-system.cpu.fetch.rate                        0.359040                      
-system.cpu.decode.IdleCycles                    12032                      
-system.cpu.decode.BlockedCycles                  8141                      
-system.cpu.decode.RunCycles                      3437                      
-system.cpu.decode.UnblockCycles                   467                      
-system.cpu.decode.SquashCycles                    660                      
-system.cpu.decode.DecodedInsts                  26977                      
-system.cpu.rename.SquashCycles                    660                      
-system.cpu.rename.IdleCycles                    12302                      
-system.cpu.rename.BlockCycles                    2135                      
-system.cpu.rename.serializeStallCycles           1085                      
-system.cpu.rename.RunCycles                      3589                      
-system.cpu.rename.UnblockCycles                  4966                      
-system.cpu.rename.RenamedInsts                  25351                      
-system.cpu.rename.ROBFullEvents                    14                      
-system.cpu.rename.IQFullEvents                     77                      
-system.cpu.rename.SQFullEvents                   4831                      
-system.cpu.rename.RenamedOperands               28444                      
-system.cpu.rename.RenameLookups                 61768                      
-system.cpu.rename.int_rename_lookups            35524                      
-system.cpu.rename.fp_rename_lookups                 4                      
-system.cpu.rename.CommittedMaps                 11063                      
-system.cpu.rename.UndoneMaps                    17381                      
-system.cpu.rename.serializingInsts                 24                      
-system.cpu.rename.tempSerializingInsts             24                      
-system.cpu.rename.skidInsts                      1430                      
-system.cpu.memDep0.insertedLoads                 2685                      
-system.cpu.memDep0.insertedStores                1593                      
-system.cpu.memDep0.conflictingLoads                14                      
-system.cpu.memDep0.conflictingStores                8                      
-system.cpu.iq.iqInstsAdded                      22118                      
-system.cpu.iq.iqNonSpecInstsAdded                  22                      
-system.cpu.iq.iqInstsIssued                     18234                      
-system.cpu.iq.iqSquashedInstsIssued               157                      
-system.cpu.iq.iqSquashedInstsExamined           12392                      
-system.cpu.iq.iqSquashedOperandsExamined        17118                      
-system.cpu.iq.iqSquashedNonSpecRemoved             10                      
-system.cpu.iq.issued_per_cycle::samples         24737                      
-system.cpu.iq.issued_per_cycle::mean         0.737114                      
-system.cpu.iq.issued_per_cycle::stdev        1.712019                      
-system.cpu.iq.issued_per_cycle::underflows            0      0.00%      0.00%
-system.cpu.iq.issued_per_cycle::0               19548     79.02%     79.02%
-system.cpu.iq.issued_per_cycle::1                1204      4.87%     83.89%
-system.cpu.iq.issued_per_cycle::2                 865      3.50%     87.39%
-system.cpu.iq.issued_per_cycle::3                 579      2.34%     89.73%
-system.cpu.iq.issued_per_cycle::4                 831      3.36%     93.09%
-system.cpu.iq.issued_per_cycle::5                 615      2.49%     95.57%
-system.cpu.iq.issued_per_cycle::6                 628      2.54%     98.11%
-system.cpu.iq.issued_per_cycle::7                 340      1.37%     99.49%
-system.cpu.iq.issued_per_cycle::8                 127      0.51%    100.00%
-system.cpu.iq.issued_per_cycle::overflows            0      0.00%    100.00%
-system.cpu.iq.issued_per_cycle::min_value            0                      
-system.cpu.iq.issued_per_cycle::max_value            8                      
-system.cpu.iq.issued_per_cycle::total           24737                      
-system.cpu.iq.fu_full::No_OpClass                   0      0.00%      0.00%
-system.cpu.iq.fu_full::IntAlu                     218     79.85%     79.85%
-system.cpu.iq.fu_full::IntMult                      0      0.00%     79.85%
-system.cpu.iq.fu_full::IntDiv                       0      0.00%     79.85%
-system.cpu.iq.fu_full::FloatAdd                     0      0.00%     79.85%
-system.cpu.iq.fu_full::FloatCmp                     0      0.00%     79.85%
-system.cpu.iq.fu_full::FloatCvt                     0      0.00%     79.85%
-system.cpu.iq.fu_full::FloatMult                    0      0.00%     79.85%
-system.cpu.iq.fu_full::FloatMultAcc                 0      0.00%     79.85%
-system.cpu.iq.fu_full::FloatDiv                     0      0.00%     79.85%
-system.cpu.iq.fu_full::FloatMisc                    0      0.00%     79.85%
-system.cpu.iq.fu_full::FloatSqrt                    0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdAdd                      0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdAddAcc                   0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdAlu                      0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdCmp                      0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdCvt                      0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdMisc                     0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdMult                     0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdMultAcc                  0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdShift                    0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdShiftAcc                 0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdSqrt                     0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdFloatAdd                 0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdFloatAlu                 0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdFloatCmp                 0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdFloatCvt                 0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdFloatDiv                 0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdFloatMisc                0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdFloatMult                0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdFloatMultAcc             0      0.00%     79.85%
-system.cpu.iq.fu_full::SimdFloatSqrt                0      0.00%     79.85%
-system.cpu.iq.fu_full::MemRead                     40     14.65%     94.51%
-system.cpu.iq.fu_full::MemWrite                    15      5.49%    100.00%
-system.cpu.iq.fu_full::FloatMemRead                 0      0.00%    100.00%
-system.cpu.iq.fu_full::FloatMemWrite                0      0.00%    100.00%
-system.cpu.iq.fu_full::IprAccess                    0      0.00%    100.00%
-system.cpu.iq.fu_full::InstPrefetch                 0      0.00%    100.00%
-system.cpu.iq.FU_type_0::No_OpClass                 2      0.01%      0.01%
-system.cpu.iq.FU_type_0::IntAlu                 14605     80.10%     80.11%
-system.cpu.iq.FU_type_0::IntMult                    6      0.03%     80.14%
-system.cpu.iq.FU_type_0::IntDiv                     7      0.04%     80.18%
-system.cpu.iq.FU_type_0::FloatAdd                   0      0.00%     80.18%
-system.cpu.iq.FU_type_0::FloatCmp                   0      0.00%     80.18%
-system.cpu.iq.FU_type_0::FloatCvt                   0      0.00%     80.18%
-system.cpu.iq.FU_type_0::FloatMult                  0      0.00%     80.18%
-system.cpu.iq.FU_type_0::FloatMultAcc               0      0.00%     80.18%
-system.cpu.iq.FU_type_0::FloatDiv                   0      0.00%     80.18%
-system.cpu.iq.FU_type_0::FloatMisc                  0      0.00%     80.18%
-system.cpu.iq.FU_type_0::FloatSqrt                  0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdAdd                    0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdAddAcc                 0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdAlu                    0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdCmp                    0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdCvt                    0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdMisc                   0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdMult                   0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdMultAcc                0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdShift                  0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdShiftAcc               0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdSqrt                   0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdFloatAdd               0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdFloatAlu               0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdFloatCmp               0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdFloatCvt               0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdFloatDiv               0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdFloatMisc              0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdFloatMult              0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdFloatMultAcc            0      0.00%     80.18%
-system.cpu.iq.FU_type_0::SimdFloatSqrt              0      0.00%     80.18%
-system.cpu.iq.FU_type_0::MemRead                 2269     12.44%     92.62%
-system.cpu.iq.FU_type_0::MemWrite                1341      7.35%     99.98%
-system.cpu.iq.FU_type_0::FloatMemRead               0      0.00%     99.98%
-system.cpu.iq.FU_type_0::FloatMemWrite              4      0.02%    100.00%
-system.cpu.iq.FU_type_0::IprAccess                  0      0.00%    100.00%
-system.cpu.iq.FU_type_0::InstPrefetch               0      0.00%    100.00%
-system.cpu.iq.FU_type_0::total                  18234                      
-system.cpu.iq.rate                           0.404894                      
-system.cpu.iq.fu_busy_cnt                         273                      
-system.cpu.iq.fu_busy_rate                   0.014972                      
-system.cpu.iq.int_inst_queue_reads              61627                      
-system.cpu.iq.int_inst_queue_writes             34537                      
-system.cpu.iq.int_inst_queue_wakeup_accesses        16576                      
-system.cpu.iq.fp_inst_queue_reads                   8                      
-system.cpu.iq.fp_inst_queue_writes                  8                      
-system.cpu.iq.fp_inst_queue_wakeup_accesses            4                      
-system.cpu.iq.int_alu_accesses                  18501                      
-system.cpu.iq.fp_alu_accesses                       4                      
-system.cpu.iew.lsq.thread0.forwLoads              199                      
-system.cpu.iew.lsq.thread0.invAddrLoads             0                      
-system.cpu.iew.lsq.thread0.squashedLoads         1632                      
-system.cpu.iew.lsq.thread0.ignoredResponses           11                      
-system.cpu.iew.lsq.thread0.memOrderViolation           13                      
-system.cpu.iew.lsq.thread0.squashedStores          658                      
-system.cpu.iew.lsq.thread0.invAddrSwpfs             0                      
-system.cpu.iew.lsq.thread0.blockedLoads             0                      
-system.cpu.iew.lsq.thread0.rescheduledLoads            0                      
-system.cpu.iew.lsq.thread0.cacheBlocked             3                      
-system.cpu.iew.iewIdleCycles                        0                      
-system.cpu.iew.iewSquashCycles                    660                      
-system.cpu.iew.iewBlockCycles                    1518                      
-system.cpu.iew.iewUnblockCycles                   153                      
-system.cpu.iew.iewDispatchedInsts               22140                      
-system.cpu.iew.iewDispSquashedInsts                 9                      
-system.cpu.iew.iewDispLoadInsts                  2685                      
-system.cpu.iew.iewDispStoreInsts                 1593                      
-system.cpu.iew.iewDispNonSpecInsts                 22                      
-system.cpu.iew.iewIQFullEvents                      0                      
-system.cpu.iew.iewLSQFullEvents                   152                      
-system.cpu.iew.memOrderViolationEvents             13                      
-system.cpu.iew.predictedTakenIncorrect            127                      
-system.cpu.iew.predictedNotTakenIncorrect          676                      
-system.cpu.iew.branchMispredicts                  803                      
-system.cpu.iew.iewExecutedInsts                 17166                      
-system.cpu.iew.iewExecLoadInsts                  2051                      
-system.cpu.iew.iewExecSquashedInsts              1068                      
-system.cpu.iew.exec_swp                             0                      
-system.cpu.iew.exec_nop                             0                      
-system.cpu.iew.exec_refs                         3303                      
-system.cpu.iew.exec_branches                     1740                      
-system.cpu.iew.exec_stores                       1252                      
-system.cpu.iew.exec_rate                     0.381179                      
-system.cpu.iew.wb_sent                          16892                      
-system.cpu.iew.wb_count                         16580                      
-system.cpu.iew.wb_producers                     11141                      
-system.cpu.iew.wb_consumers                     17351                      
-system.cpu.iew.wb_rate                       0.368166                      
-system.cpu.iew.wb_fanout                     0.642096                      
-system.cpu.commit.commitSquashedInsts           12392                      
-system.cpu.commit.commitNonSpecStalls              12                      
-system.cpu.commit.branchMispredicts               648                      
-system.cpu.commit.committed_per_cycle::samples        22647                      
-system.cpu.commit.committed_per_cycle::mean     0.430388                      
-system.cpu.commit.committed_per_cycle::stdev     1.314193                      
-system.cpu.commit.committed_per_cycle::underflows            0      0.00%      0.00%
-system.cpu.commit.committed_per_cycle::0        19392     85.63%     85.63%
-system.cpu.commit.committed_per_cycle::1         1011      4.46%     90.09%
-system.cpu.commit.committed_per_cycle::2          560      2.47%     92.56%
-system.cpu.commit.committed_per_cycle::3          726      3.21%     95.77%
-system.cpu.commit.committed_per_cycle::4          383      1.69%     97.46%
-system.cpu.commit.committed_per_cycle::5          128      0.57%     98.03%
-system.cpu.commit.committed_per_cycle::6          118      0.52%     98.55%
-system.cpu.commit.committed_per_cycle::7           74      0.33%     98.87%
-system.cpu.commit.committed_per_cycle::8          255      1.13%    100.00%
-system.cpu.commit.committed_per_cycle::overflows            0      0.00%    100.00%
-system.cpu.commit.committed_per_cycle::min_value            0                      
-system.cpu.commit.committed_per_cycle::max_value            8                      
-system.cpu.commit.committed_per_cycle::total        22647                      
-system.cpu.commit.committedInsts                 5380                      
-system.cpu.commit.committedOps                   9747                      
-system.cpu.commit.swp_count                         0                      
-system.cpu.commit.refs                           1988                      
-system.cpu.commit.loads                          1053                      
-system.cpu.commit.membars                           0                      
-system.cpu.commit.branches                       1208                      
-system.cpu.commit.fp_insts                          0                      
-system.cpu.commit.int_insts                      9653                      
-system.cpu.commit.function_calls                  106                      
-system.cpu.commit.op_class_0::No_OpClass            1      0.01%      0.01%
-system.cpu.commit.op_class_0::IntAlu             7748     79.49%     79.50%
-system.cpu.commit.op_class_0::IntMult               3      0.03%     79.53%
-system.cpu.commit.op_class_0::IntDiv                7      0.07%     79.60%
-system.cpu.commit.op_class_0::FloatAdd              0      0.00%     79.60%
-system.cpu.commit.op_class_0::FloatCmp              0      0.00%     79.60%
-system.cpu.commit.op_class_0::FloatCvt              0      0.00%     79.60%
-system.cpu.commit.op_class_0::FloatMult             0      0.00%     79.60%
-system.cpu.commit.op_class_0::FloatMultAcc            0      0.00%     79.60%
-system.cpu.commit.op_class_0::FloatDiv              0      0.00%     79.60%
-system.cpu.commit.op_class_0::FloatMisc             0      0.00%     79.60%
-system.cpu.commit.op_class_0::FloatSqrt             0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdAdd               0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdAddAcc            0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdAlu               0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdCmp               0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdCvt               0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdMisc              0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdMult              0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdMultAcc            0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdShift             0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdShiftAcc            0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdSqrt              0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdFloatAdd            0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdFloatAlu            0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdFloatCmp            0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdFloatCvt            0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdFloatDiv            0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdFloatMisc            0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdFloatMult            0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdFloatMultAcc            0      0.00%     79.60%
-system.cpu.commit.op_class_0::SimdFloatSqrt            0      0.00%     79.60%
-system.cpu.commit.op_class_0::MemRead            1053     10.80%     90.41%
-system.cpu.commit.op_class_0::MemWrite            935      9.59%    100.00%
-system.cpu.commit.op_class_0::FloatMemRead            0      0.00%    100.00%
-system.cpu.commit.op_class_0::FloatMemWrite            0      0.00%    100.00%
-system.cpu.commit.op_class_0::IprAccess             0      0.00%    100.00%
-system.cpu.commit.op_class_0::InstPrefetch            0      0.00%    100.00%
-system.cpu.commit.op_class_0::total              9747                      
-system.cpu.commit.bw_lim_events                   255                      
-system.cpu.rob.rob_reads                        44531                      
-system.cpu.rob.rob_writes                       46400                      
-system.cpu.timesIdled                             157                      
-system.cpu.idleCycles                           20297                      
-system.cpu.committedInsts                        5380                      
-system.cpu.committedOps                          9747                      
-system.cpu.cpi                               8.370632                      
-system.cpu.cpi_total                         8.370632                      
-system.cpu.ipc                               0.119465                      
-system.cpu.ipc_total                         0.119465                      
-system.cpu.int_regfile_reads                    21947                      
-system.cpu.int_regfile_writes                   13377                      
-system.cpu.fp_regfile_reads                         4                      
-system.cpu.cc_regfile_reads                      8355                      
-system.cpu.cc_regfile_writes                     5130                      
-system.cpu.misc_regfile_reads                    7644                      
-system.cpu.misc_regfile_writes                      1                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.cpu.dcache.tags.replacements                 0                      
-system.cpu.dcache.tags.tagsinuse            81.908470                      
-system.cpu.dcache.tags.total_refs                2549                      
-system.cpu.dcache.tags.sampled_refs               140                      
-system.cpu.dcache.tags.avg_refs             18.207143                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data    81.908470                      
-system.cpu.dcache.tags.occ_percent::cpu.data     0.019997                      
-system.cpu.dcache.tags.occ_percent::total     0.019997                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024          140                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           45                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::1           95                      
-system.cpu.dcache.tags.occ_task_id_percent::1024     0.034180                      
-system.cpu.dcache.tags.tag_accesses              5608                      
-system.cpu.dcache.tags.data_accesses             5608                      
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.cpu.dcache.ReadReq_hits::cpu.data         1687                      
-system.cpu.dcache.ReadReq_hits::total            1687                      
-system.cpu.dcache.WriteReq_hits::cpu.data          862                      
-system.cpu.dcache.WriteReq_hits::total            862                      
-system.cpu.dcache.demand_hits::cpu.data          2549                      
-system.cpu.dcache.demand_hits::total             2549                      
-system.cpu.dcache.overall_hits::cpu.data         2549                      
-system.cpu.dcache.overall_hits::total            2549                      
-system.cpu.dcache.ReadReq_misses::cpu.data          112                      
-system.cpu.dcache.ReadReq_misses::total           112                      
-system.cpu.dcache.WriteReq_misses::cpu.data           73                      
-system.cpu.dcache.WriteReq_misses::total           73                      
-system.cpu.dcache.demand_misses::cpu.data          185                      
-system.cpu.dcache.demand_misses::total            185                      
-system.cpu.dcache.overall_misses::cpu.data          185                      
-system.cpu.dcache.overall_misses::total           185                      
-system.cpu.dcache.ReadReq_miss_latency::cpu.data      9812000                      
-system.cpu.dcache.ReadReq_miss_latency::total      9812000                      
-system.cpu.dcache.WriteReq_miss_latency::cpu.data      6772000                      
-system.cpu.dcache.WriteReq_miss_latency::total      6772000                      
-system.cpu.dcache.demand_miss_latency::cpu.data     16584000                      
-system.cpu.dcache.demand_miss_latency::total     16584000                      
-system.cpu.dcache.overall_miss_latency::cpu.data     16584000                      
-system.cpu.dcache.overall_miss_latency::total     16584000                      
-system.cpu.dcache.ReadReq_accesses::cpu.data         1799                      
-system.cpu.dcache.ReadReq_accesses::total         1799                      
-system.cpu.dcache.WriteReq_accesses::cpu.data          935                      
-system.cpu.dcache.WriteReq_accesses::total          935                      
-system.cpu.dcache.demand_accesses::cpu.data         2734                      
-system.cpu.dcache.demand_accesses::total         2734                      
-system.cpu.dcache.overall_accesses::cpu.data         2734                      
-system.cpu.dcache.overall_accesses::total         2734                      
-system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.062257                      
-system.cpu.dcache.ReadReq_miss_rate::total     0.062257                      
-system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.078075                      
-system.cpu.dcache.WriteReq_miss_rate::total     0.078075                      
-system.cpu.dcache.demand_miss_rate::cpu.data     0.067666                      
-system.cpu.dcache.demand_miss_rate::total     0.067666                      
-system.cpu.dcache.overall_miss_rate::cpu.data     0.067666                      
-system.cpu.dcache.overall_miss_rate::total     0.067666                      
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 87607.142857                      
-system.cpu.dcache.ReadReq_avg_miss_latency::total 87607.142857                      
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 92767.123288                      
-system.cpu.dcache.WriteReq_avg_miss_latency::total 92767.123288                      
-system.cpu.dcache.demand_avg_miss_latency::cpu.data 89643.243243                      
-system.cpu.dcache.demand_avg_miss_latency::total 89643.243243                      
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 89643.243243                      
-system.cpu.dcache.overall_avg_miss_latency::total 89643.243243                      
-system.cpu.dcache.blocked_cycles::no_mshrs          145                      
-system.cpu.dcache.blocked_cycles::no_targets            0                      
-system.cpu.dcache.blocked::no_mshrs                 5                      
-system.cpu.dcache.blocked::no_targets               0                      
-system.cpu.dcache.avg_blocked_cycles::no_mshrs           29                      
-system.cpu.dcache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.dcache.ReadReq_mshr_hits::cpu.data           45                      
-system.cpu.dcache.ReadReq_mshr_hits::total           45                      
-system.cpu.dcache.demand_mshr_hits::cpu.data           45                      
-system.cpu.dcache.demand_mshr_hits::total           45                      
-system.cpu.dcache.overall_mshr_hits::cpu.data           45                      
-system.cpu.dcache.overall_mshr_hits::total           45                      
-system.cpu.dcache.ReadReq_mshr_misses::cpu.data           67                      
-system.cpu.dcache.ReadReq_mshr_misses::total           67                      
-system.cpu.dcache.WriteReq_mshr_misses::cpu.data           73                      
-system.cpu.dcache.WriteReq_mshr_misses::total           73                      
-system.cpu.dcache.demand_mshr_misses::cpu.data          140                      
-system.cpu.dcache.demand_mshr_misses::total          140                      
-system.cpu.dcache.overall_mshr_misses::cpu.data          140                      
-system.cpu.dcache.overall_mshr_misses::total          140                      
-system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data      6419000                      
-system.cpu.dcache.ReadReq_mshr_miss_latency::total      6419000                      
-system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data      6699000                      
-system.cpu.dcache.WriteReq_mshr_miss_latency::total      6699000                      
-system.cpu.dcache.demand_mshr_miss_latency::cpu.data     13118000                      
-system.cpu.dcache.demand_mshr_miss_latency::total     13118000                      
-system.cpu.dcache.overall_mshr_miss_latency::cpu.data     13118000                      
-system.cpu.dcache.overall_mshr_miss_latency::total     13118000                      
-system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.037243                      
-system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.037243                      
-system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.078075                      
-system.cpu.dcache.WriteReq_mshr_miss_rate::total     0.078075                      
-system.cpu.dcache.demand_mshr_miss_rate::cpu.data     0.051207                      
-system.cpu.dcache.demand_mshr_miss_rate::total     0.051207                      
-system.cpu.dcache.overall_mshr_miss_rate::cpu.data     0.051207                      
-system.cpu.dcache.overall_mshr_miss_rate::total     0.051207                      
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 95805.970149                      
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 95805.970149                      
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 91767.123288                      
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 91767.123288                      
-system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data        93700                      
-system.cpu.dcache.demand_avg_mshr_miss_latency::total        93700                      
-system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data        93700                      
-system.cpu.dcache.overall_avg_mshr_miss_latency::total        93700                      
-system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.cpu.icache.tags.replacements                 0                      
-system.cpu.icache.tags.tagsinuse           130.523512                      
-system.cpu.icache.tags.total_refs                1695                      
-system.cpu.icache.tags.sampled_refs               278                      
-system.cpu.icache.tags.avg_refs              6.097122                      
-system.cpu.icache.tags.warmup_cycle                 0                      
-system.cpu.icache.tags.occ_blocks::cpu.inst   130.523512                      
-system.cpu.icache.tags.occ_percent::cpu.inst     0.063732                      
-system.cpu.icache.tags.occ_percent::total     0.063732                      
-system.cpu.icache.tags.occ_task_id_blocks::1024          278                      
-system.cpu.icache.tags.age_task_id_blocks_1024::0          137                      
-system.cpu.icache.tags.age_task_id_blocks_1024::1          141                      
-system.cpu.icache.tags.occ_task_id_percent::1024     0.135742                      
-system.cpu.icache.tags.tag_accesses              4432                      
-system.cpu.icache.tags.data_accesses             4432                      
-system.cpu.icache.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.cpu.icache.ReadReq_hits::cpu.inst         1695                      
-system.cpu.icache.ReadReq_hits::total            1695                      
-system.cpu.icache.demand_hits::cpu.inst          1695                      
-system.cpu.icache.demand_hits::total             1695                      
-system.cpu.icache.overall_hits::cpu.inst         1695                      
-system.cpu.icache.overall_hits::total            1695                      
-system.cpu.icache.ReadReq_misses::cpu.inst          382                      
-system.cpu.icache.ReadReq_misses::total           382                      
-system.cpu.icache.demand_misses::cpu.inst          382                      
-system.cpu.icache.demand_misses::total            382                      
-system.cpu.icache.overall_misses::cpu.inst          382                      
-system.cpu.icache.overall_misses::total           382                      
-system.cpu.icache.ReadReq_miss_latency::cpu.inst     30098500                      
-system.cpu.icache.ReadReq_miss_latency::total     30098500                      
-system.cpu.icache.demand_miss_latency::cpu.inst     30098500                      
-system.cpu.icache.demand_miss_latency::total     30098500                      
-system.cpu.icache.overall_miss_latency::cpu.inst     30098500                      
-system.cpu.icache.overall_miss_latency::total     30098500                      
-system.cpu.icache.ReadReq_accesses::cpu.inst         2077                      
-system.cpu.icache.ReadReq_accesses::total         2077                      
-system.cpu.icache.demand_accesses::cpu.inst         2077                      
-system.cpu.icache.demand_accesses::total         2077                      
-system.cpu.icache.overall_accesses::cpu.inst         2077                      
-system.cpu.icache.overall_accesses::total         2077                      
-system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.183919                      
-system.cpu.icache.ReadReq_miss_rate::total     0.183919                      
-system.cpu.icache.demand_miss_rate::cpu.inst     0.183919                      
-system.cpu.icache.demand_miss_rate::total     0.183919                      
-system.cpu.icache.overall_miss_rate::cpu.inst     0.183919                      
-system.cpu.icache.overall_miss_rate::total     0.183919                      
-system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 78791.884817                      
-system.cpu.icache.ReadReq_avg_miss_latency::total 78791.884817                      
-system.cpu.icache.demand_avg_miss_latency::cpu.inst 78791.884817                      
-system.cpu.icache.demand_avg_miss_latency::total 78791.884817                      
-system.cpu.icache.overall_avg_miss_latency::cpu.inst 78791.884817                      
-system.cpu.icache.overall_avg_miss_latency::total 78791.884817                      
-system.cpu.icache.blocked_cycles::no_mshrs          159                      
-system.cpu.icache.blocked_cycles::no_targets            0                      
-system.cpu.icache.blocked::no_mshrs                 3                      
-system.cpu.icache.blocked::no_targets               0                      
-system.cpu.icache.avg_blocked_cycles::no_mshrs           53                      
-system.cpu.icache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.icache.ReadReq_mshr_hits::cpu.inst          104                      
-system.cpu.icache.ReadReq_mshr_hits::total          104                      
-system.cpu.icache.demand_mshr_hits::cpu.inst          104                      
-system.cpu.icache.demand_mshr_hits::total          104                      
-system.cpu.icache.overall_mshr_hits::cpu.inst          104                      
-system.cpu.icache.overall_mshr_hits::total          104                      
-system.cpu.icache.ReadReq_mshr_misses::cpu.inst          278                      
-system.cpu.icache.ReadReq_mshr_misses::total          278                      
-system.cpu.icache.demand_mshr_misses::cpu.inst          278                      
-system.cpu.icache.demand_mshr_misses::total          278                      
-system.cpu.icache.overall_mshr_misses::cpu.inst          278                      
-system.cpu.icache.overall_mshr_misses::total          278                      
-system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst     23308500                      
-system.cpu.icache.ReadReq_mshr_miss_latency::total     23308500                      
-system.cpu.icache.demand_mshr_miss_latency::cpu.inst     23308500                      
-system.cpu.icache.demand_mshr_miss_latency::total     23308500                      
-system.cpu.icache.overall_mshr_miss_latency::cpu.inst     23308500                      
-system.cpu.icache.overall_mshr_miss_latency::total     23308500                      
-system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst     0.133847                      
-system.cpu.icache.ReadReq_mshr_miss_rate::total     0.133847                      
-system.cpu.icache.demand_mshr_miss_rate::cpu.inst     0.133847                      
-system.cpu.icache.demand_mshr_miss_rate::total     0.133847                      
-system.cpu.icache.overall_mshr_miss_rate::cpu.inst     0.133847                      
-system.cpu.icache.overall_mshr_miss_rate::total     0.133847                      
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 83843.525180                      
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 83843.525180                      
-system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 83843.525180                      
-system.cpu.icache.demand_avg_mshr_miss_latency::total 83843.525180                      
-system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 83843.525180                      
-system.cpu.icache.overall_avg_mshr_miss_latency::total 83843.525180                      
-system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.cpu.l2cache.tags.replacements                0                      
-system.cpu.l2cache.tags.tagsinuse          212.529421                      
-system.cpu.l2cache.tags.total_refs                  1                      
-system.cpu.l2cache.tags.sampled_refs              417                      
-system.cpu.l2cache.tags.avg_refs             0.002398                      
-system.cpu.l2cache.tags.warmup_cycle                0                      
-system.cpu.l2cache.tags.occ_blocks::cpu.inst   130.555666                      
-system.cpu.l2cache.tags.occ_blocks::cpu.data    81.973755                      
-system.cpu.l2cache.tags.occ_percent::cpu.inst     0.003984                      
-system.cpu.l2cache.tags.occ_percent::cpu.data     0.002502                      
-system.cpu.l2cache.tags.occ_percent::total     0.006486                      
-system.cpu.l2cache.tags.occ_task_id_blocks::1024          417                      
-system.cpu.l2cache.tags.age_task_id_blocks_1024::0          181                      
-system.cpu.l2cache.tags.age_task_id_blocks_1024::1          236                      
-system.cpu.l2cache.tags.occ_task_id_percent::1024     0.012726                      
-system.cpu.l2cache.tags.tag_accesses             3761                      
-system.cpu.l2cache.tags.data_accesses            3761                      
-system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.cpu.l2cache.ReadCleanReq_hits::cpu.inst            1                      
-system.cpu.l2cache.ReadCleanReq_hits::total            1                      
-system.cpu.l2cache.demand_hits::cpu.inst            1                      
-system.cpu.l2cache.demand_hits::total               1                      
-system.cpu.l2cache.overall_hits::cpu.inst            1                      
-system.cpu.l2cache.overall_hits::total              1                      
-system.cpu.l2cache.ReadExReq_misses::cpu.data           73                      
-system.cpu.l2cache.ReadExReq_misses::total           73                      
-system.cpu.l2cache.ReadCleanReq_misses::cpu.inst          277                      
-system.cpu.l2cache.ReadCleanReq_misses::total          277                      
-system.cpu.l2cache.ReadSharedReq_misses::cpu.data           67                      
-system.cpu.l2cache.ReadSharedReq_misses::total           67                      
-system.cpu.l2cache.demand_misses::cpu.inst          277                      
-system.cpu.l2cache.demand_misses::cpu.data          140                      
-system.cpu.l2cache.demand_misses::total           417                      
-system.cpu.l2cache.overall_misses::cpu.inst          277                      
-system.cpu.l2cache.overall_misses::cpu.data          140                      
-system.cpu.l2cache.overall_misses::total          417                      
-system.cpu.l2cache.ReadExReq_miss_latency::cpu.data      6589500                      
-system.cpu.l2cache.ReadExReq_miss_latency::total      6589500                      
-system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst     22879500                      
-system.cpu.l2cache.ReadCleanReq_miss_latency::total     22879500                      
-system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data      6317500                      
-system.cpu.l2cache.ReadSharedReq_miss_latency::total      6317500                      
-system.cpu.l2cache.demand_miss_latency::cpu.inst     22879500                      
-system.cpu.l2cache.demand_miss_latency::cpu.data     12907000                      
-system.cpu.l2cache.demand_miss_latency::total     35786500                      
-system.cpu.l2cache.overall_miss_latency::cpu.inst     22879500                      
-system.cpu.l2cache.overall_miss_latency::cpu.data     12907000                      
-system.cpu.l2cache.overall_miss_latency::total     35786500                      
-system.cpu.l2cache.ReadExReq_accesses::cpu.data           73                      
-system.cpu.l2cache.ReadExReq_accesses::total           73                      
-system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst          278                      
-system.cpu.l2cache.ReadCleanReq_accesses::total          278                      
-system.cpu.l2cache.ReadSharedReq_accesses::cpu.data           67                      
-system.cpu.l2cache.ReadSharedReq_accesses::total           67                      
-system.cpu.l2cache.demand_accesses::cpu.inst          278                      
-system.cpu.l2cache.demand_accesses::cpu.data          140                      
-system.cpu.l2cache.demand_accesses::total          418                      
-system.cpu.l2cache.overall_accesses::cpu.inst          278                      
-system.cpu.l2cache.overall_accesses::cpu.data          140                      
-system.cpu.l2cache.overall_accesses::total          418                      
-system.cpu.l2cache.ReadExReq_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.996403                      
-system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.996403                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadSharedReq_miss_rate::total            1                      
-system.cpu.l2cache.demand_miss_rate::cpu.inst     0.996403                      
-system.cpu.l2cache.demand_miss_rate::cpu.data            1                      
-system.cpu.l2cache.demand_miss_rate::total     0.997608                      
-system.cpu.l2cache.overall_miss_rate::cpu.inst     0.996403                      
-system.cpu.l2cache.overall_miss_rate::cpu.data            1                      
-system.cpu.l2cache.overall_miss_rate::total     0.997608                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 90267.123288                      
-system.cpu.l2cache.ReadExReq_avg_miss_latency::total 90267.123288                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 82597.472924                      
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 82597.472924                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 94291.044776                      
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 94291.044776                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 82597.472924                      
-system.cpu.l2cache.demand_avg_miss_latency::cpu.data 92192.857143                      
-system.cpu.l2cache.demand_avg_miss_latency::total 85818.944844                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 82597.472924                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data 92192.857143                      
-system.cpu.l2cache.overall_avg_miss_latency::total 85818.944844                      
-system.cpu.l2cache.blocked_cycles::no_mshrs            0                      
-system.cpu.l2cache.blocked_cycles::no_targets            0                      
-system.cpu.l2cache.blocked::no_mshrs                0                      
-system.cpu.l2cache.blocked::no_targets              0                      
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data           73                      
-system.cpu.l2cache.ReadExReq_mshr_misses::total           73                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst          277                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::total          277                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data           67                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::total           67                      
-system.cpu.l2cache.demand_mshr_misses::cpu.inst          277                      
-system.cpu.l2cache.demand_mshr_misses::cpu.data          140                      
-system.cpu.l2cache.demand_mshr_misses::total          417                      
-system.cpu.l2cache.overall_mshr_misses::cpu.inst          277                      
-system.cpu.l2cache.overall_mshr_misses::cpu.data          140                      
-system.cpu.l2cache.overall_mshr_misses::total          417                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data      5859500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total      5859500                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst     20109500                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total     20109500                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data      5647500                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      5647500                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     20109500                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data     11507000                      
-system.cpu.l2cache.demand_mshr_miss_latency::total     31616500                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     20109500                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data     11507000                      
-system.cpu.l2cache.overall_mshr_miss_latency::total     31616500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.996403                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.996403                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total            1                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.996403                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.demand_mshr_miss_rate::total     0.997608                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.996403                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data            1                      
-system.cpu.l2cache.overall_mshr_miss_rate::total     0.997608                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 80267.123288                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 80267.123288                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 72597.472924                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 72597.472924                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 84291.044776                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 84291.044776                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 72597.472924                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 82192.857143                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 75818.944844                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 72597.472924                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 82192.857143                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 75818.944844                      
-system.cpu.toL2Bus.snoop_filter.tot_requests          418                      
-system.cpu.toL2Bus.snoop_filter.hit_single_requests            1                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0                      
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.cpu.toL2Bus.trans_dist::ReadResp           345                      
-system.cpu.toL2Bus.trans_dist::ReadExReq           73                      
-system.cpu.toL2Bus.trans_dist::ReadExResp           73                      
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          278                      
-system.cpu.toL2Bus.trans_dist::ReadSharedReq           67                      
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          556                      
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          280                      
-system.cpu.toL2Bus.pkt_count::total               836                      
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        17792                      
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         8960                      
-system.cpu.toL2Bus.pkt_size::total              26752                      
-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples          418                      
-system.cpu.toL2Bus.snoop_fanout::mean        0.002392                      
-system.cpu.toL2Bus.snoop_fanout::stdev       0.048912                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0                417     99.76%     99.76%
-system.cpu.toL2Bus.snoop_fanout::1                  1      0.24%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            1                      
-system.cpu.toL2Bus.snoop_fanout::total            418                      
-system.cpu.toL2Bus.reqLayer0.occupancy         209000                      
-system.cpu.toL2Bus.reqLayer0.utilization          0.9                      
-system.cpu.toL2Bus.respLayer0.occupancy        417000                      
-system.cpu.toL2Bus.respLayer0.utilization          1.9                      
-system.cpu.toL2Bus.respLayer1.occupancy        210000                      
-system.cpu.toL2Bus.respLayer1.utilization          0.9                      
-system.membus.snoop_filter.tot_requests           417                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED     22516500                      
-system.membus.trans_dist::ReadResp                344                      
-system.membus.trans_dist::ReadExReq                73                      
-system.membus.trans_dist::ReadExResp               73                      
-system.membus.trans_dist::ReadSharedReq           344                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          834                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::total          834                      
-system.membus.pkt_count::total                    834                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        26688                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::total        26688                      
-system.membus.pkt_size::total                   26688                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples               417                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                     417    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                 417                      
-system.membus.reqLayer0.occupancy              504000                      
-system.membus.reqLayer0.utilization               2.2                      
-system.membus.respLayer1.occupancy            2226500                      
-system.membus.respLayer1.utilization              9.9                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini
deleted file mode 100644 (file)
index 8968a4e..0000000
+++ /dev/null
@@ -1,263 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-kvm_vm=Null
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=AtomicSimpleCPU
-children=apic_clk_domain dtb interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-width=1
-workload=system.cpu.workload
-dcache_port=system.membus.slave[2]
-icache_port=system.membus.slave[1]
-
-[system.cpu.apic_clk_domain]
-type=DerivedClockDomain
-clk_divider=16
-clk_domain=system.cpu_clk_domain
-eventq_index=0
-
-[system.cpu.dtb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-system=system
-port=system.membus.slave[4]
-
-[system.cpu.interrupts]
-type=X86LocalApic
-clk_domain=system.cpu.apic_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-int_latency=1000
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-pio_addr=2305843009213693952
-pio_latency=100000
-power_model=Null
-system=system
-int_master=system.membus.slave[5]
-int_slave=system.membus.master[2]
-pio=system.membus.master[1]
-
-[system.cpu.isa]
-type=X86ISA
-eventq_index=0
-
-[system.cpu.itb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-system=system
-port=system.membus.slave[3]
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/x86/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
-slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.int_master
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simerr b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simerr
deleted file mode 100755 (executable)
index c0b55d1..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout
deleted file mode 100755 (executable)
index 8dcc9cb..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic/simout
-Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 19:05:53
-gem5 started Apr  3 2017 19:06:21
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 87156
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/x86/linux/simple-atomic
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 5615000 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt
deleted file mode 100644 (file)
index 2360c7c..0000000
+++ /dev/null
@@ -1,145 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000006                      
-sim_ticks                                     5615000                      
-final_tick                                    5615000                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 289662                      
-host_op_rate                                   524226                      
-host_tick_rate                              301675446                      
-host_mem_usage                                 269844                      
-host_seconds                                     0.02                      
-sim_insts                                        5381                      
-sim_ops                                          9748                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED      5615000                      
-system.physmem.bytes_read::cpu.inst             54912                      
-system.physmem.bytes_read::cpu.data              7066                      
-system.physmem.bytes_read::total                61978                      
-system.physmem.bytes_inst_read::cpu.inst        54912                      
-system.physmem.bytes_inst_read::total           54912                      
-system.physmem.bytes_written::cpu.data           7112                      
-system.physmem.bytes_written::total              7112                      
-system.physmem.num_reads::cpu.inst               6864                      
-system.physmem.num_reads::cpu.data               1053                      
-system.physmem.num_reads::total                  7917                      
-system.physmem.num_writes::cpu.data               935                      
-system.physmem.num_writes::total                  935                      
-system.physmem.bw_read::cpu.inst           9779519145                      
-system.physmem.bw_read::cpu.data           1258414960                      
-system.physmem.bw_read::total             11037934105                      
-system.physmem.bw_inst_read::cpu.inst      9779519145                      
-system.physmem.bw_inst_read::total         9779519145                      
-system.physmem.bw_write::cpu.data          1266607302                      
-system.physmem.bw_write::total             1266607302                      
-system.physmem.bw_total::cpu.inst          9779519145                      
-system.physmem.bw_total::cpu.data          2525022262                      
-system.physmem.bw_total::total            12304541407                      
-system.pwrStateResidencyTicks::UNDEFINED      5615000                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED      5615000                      
-system.cpu.apic_clk_domain.clock                 8000                      
-system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED      5615000                      
-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED      5615000                      
-system.cpu.workload.numSyscalls                    11                      
-system.cpu.pwrStateResidencyTicks::ON         5615000                      
-system.cpu.numCycles                            11231                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        5381                      
-system.cpu.committedOps                          9748                      
-system.cpu.num_int_alu_accesses                  9654                      
-system.cpu.num_fp_alu_accesses                      0                      
-system.cpu.num_func_calls                         209                      
-system.cpu.num_conditional_control_insts          899                      
-system.cpu.num_int_insts                         9654                      
-system.cpu.num_fp_insts                             0                      
-system.cpu.num_int_register_reads               18335                      
-system.cpu.num_int_register_writes               7527                      
-system.cpu.num_fp_register_reads                    0                      
-system.cpu.num_fp_register_writes                   0                      
-system.cpu.num_cc_register_reads                 6487                      
-system.cpu.num_cc_register_writes                3536                      
-system.cpu.num_mem_refs                          1988                      
-system.cpu.num_load_insts                        1053                      
-system.cpu.num_store_insts                        935                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                      11231                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1208                      
-system.cpu.op_class::No_OpClass                     1      0.01%      0.01%
-system.cpu.op_class::IntAlu                      7749     79.49%     79.50%
-system.cpu.op_class::IntMult                        3      0.03%     79.53%
-system.cpu.op_class::IntDiv                         7      0.07%     79.61%
-system.cpu.op_class::FloatAdd                       0      0.00%     79.61%
-system.cpu.op_class::FloatCmp                       0      0.00%     79.61%
-system.cpu.op_class::FloatCvt                       0      0.00%     79.61%
-system.cpu.op_class::FloatMult                      0      0.00%     79.61%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     79.61%
-system.cpu.op_class::FloatDiv                       0      0.00%     79.61%
-system.cpu.op_class::FloatMisc                      0      0.00%     79.61%
-system.cpu.op_class::FloatSqrt                      0      0.00%     79.61%
-system.cpu.op_class::SimdAdd                        0      0.00%     79.61%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     79.61%
-system.cpu.op_class::SimdAlu                        0      0.00%     79.61%
-system.cpu.op_class::SimdCmp                        0      0.00%     79.61%
-system.cpu.op_class::SimdCvt                        0      0.00%     79.61%
-system.cpu.op_class::SimdMisc                       0      0.00%     79.61%
-system.cpu.op_class::SimdMult                       0      0.00%     79.61%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     79.61%
-system.cpu.op_class::SimdShift                      0      0.00%     79.61%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     79.61%
-system.cpu.op_class::SimdSqrt                       0      0.00%     79.61%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     79.61%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     79.61%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     79.61%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     79.61%
-system.cpu.op_class::MemRead                     1053     10.80%     90.41%
-system.cpu.op_class::MemWrite                     935      9.59%    100.00%
-system.cpu.op_class::FloatMemRead                   0      0.00%    100.00%
-system.cpu.op_class::FloatMemWrite                  0      0.00%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       9748                      
-system.membus.snoop_filter.tot_requests             0                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED      5615000                      
-system.membus.trans_dist::ReadReq                7917                      
-system.membus.trans_dist::ReadResp               7917                      
-system.membus.trans_dist::WriteReq                935                      
-system.membus.trans_dist::WriteResp               935                      
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port        13728                      
-system.membus.pkt_count_system.cpu.icache_port::total        13728                      
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port         3976                      
-system.membus.pkt_count_system.cpu.dcache_port::total         3976                      
-system.membus.pkt_count::total                  17704                      
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port        54912                      
-system.membus.pkt_size_system.cpu.icache_port::total        54912                      
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port        14178                      
-system.membus.pkt_size_system.cpu.dcache_port::total        14178                      
-system.membus.pkt_size::total                   69090                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples              8852                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                    8852    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                8852                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini
deleted file mode 100644 (file)
index 155aa9c..0000000
+++ /dev/null
@@ -1,1319 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000
-time_sync_spin_threshold=100000
-
-[system]
-type=System
-children=clk_domain cpu dvfs_handler mem_ctrls ruby sys_port_proxy voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-kvm_vm=Null
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=0:268435455:0:0:0:0
-memories=system.mem_ctrls
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.sys_port_proxy.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=apic_clk_domain clk_domain dtb interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu.clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-workload=system.cpu.workload
-dcache_port=system.ruby.l1_cntrl0.sequencer.slave[1]
-icache_port=system.ruby.l1_cntrl0.sequencer.slave[0]
-
-[system.cpu.apic_clk_domain]
-type=DerivedClockDomain
-clk_divider=16
-clk_domain=system.cpu.clk_domain
-eventq_index=0
-
-[system.cpu.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu.dtb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-system=system
-port=system.ruby.l1_cntrl0.sequencer.slave[3]
-
-[system.cpu.interrupts]
-type=X86LocalApic
-clk_domain=system.cpu.apic_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-int_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-pio_addr=2305843009213693952
-pio_latency=100
-power_model=Null
-system=system
-int_master=system.ruby.l1_cntrl0.sequencer.slave[4]
-int_slave=system.ruby.l1_cntrl0.sequencer.master[1]
-pio=system.ruby.l1_cntrl0.sequencer.master[0]
-
-[system.cpu.isa]
-type=X86ISA
-eventq_index=0
-
-[system.cpu.itb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-system=system
-port=system.ruby.l1_cntrl0.sequencer.slave[2]
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/x86/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000
-
-[system.mem_ctrls]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-page_policy=open_adaptive
-power_model=Null
-range=0:268435455:5:19:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10
-static_frontend_latency=10
-tBURST=5
-tCCD_L=0
-tCK=1
-tCL=14
-tCS=3
-tRAS=35
-tRCD=14
-tREFI=7800
-tRFC=260
-tRP=14
-tRRD=6
-tRRD_L=0
-tRTP=8
-tRTW=3
-tWR=15
-tWTR=8
-tXAW=30
-tXP=6
-tXPDLL=0
-tXS=270
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.ruby.dir_cntrl0.memory
-
-[system.ruby]
-type=RubySystem
-children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network
-access_backing_store=false
-all_instructions=false
-block_size_bytes=64
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-hot_lines=false
-memory_size_bits=48
-num_of_sequencers=1
-number_of_virtual_networks=5
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-phys_mem=Null
-power_model=Null
-randomization=false
-
-[system.ruby.clk_domain]
-type=SrcClockDomain
-clock=1
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.ruby.dir_cntrl0]
-type=Directory_Controller
-children=directory dmaRequestToDir dmaResponseFromDir forwardFromDir requestToDir responseFromDir responseFromMemory
-buffer_size=0
-clk_domain=system.ruby.clk_domain
-cluster_id=0
-default_p_state=UNDEFINED
-directory=system.ruby.dir_cntrl0.directory
-directory_latency=12
-dmaRequestToDir=system.ruby.dir_cntrl0.dmaRequestToDir
-dmaResponseFromDir=system.ruby.dir_cntrl0.dmaResponseFromDir
-eventq_index=0
-forwardFromDir=system.ruby.dir_cntrl0.forwardFromDir
-number_of_TBEs=256
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-recycle_latency=10
-requestToDir=system.ruby.dir_cntrl0.requestToDir
-responseFromDir=system.ruby.dir_cntrl0.responseFromDir
-responseFromMemory=system.ruby.dir_cntrl0.responseFromMemory
-ruby_system=system.ruby
-system=system
-to_memory_controller_latency=1
-transitions_per_cycle=4
-version=0
-memory=system.mem_ctrls.port
-
-[system.ruby.dir_cntrl0.directory]
-type=RubyDirectoryMemory
-eventq_index=0
-numa_high_bit=5
-size=268435456
-system=system
-version=0
-
-[system.ruby.dir_cntrl0.dmaRequestToDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[3]
-
-[system.ruby.dir_cntrl0.dmaResponseFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[3]
-
-[system.ruby.dir_cntrl0.forwardFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-master=system.ruby.network.slave[4]
-
-[system.ruby.dir_cntrl0.requestToDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[2]
-
-[system.ruby.dir_cntrl0.responseFromDir]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-master=system.ruby.network.slave[2]
-
-[system.ruby.dir_cntrl0.responseFromMemory]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-
-[system.ruby.l1_cntrl0]
-type=L1Cache_Controller
-children=cacheMemory forwardToCache mandatoryQueue requestFromCache responseFromCache responseToCache sequencer
-buffer_size=0
-cacheMemory=system.ruby.l1_cntrl0.cacheMemory
-cache_response_latency=12
-clk_domain=system.cpu.clk_domain
-cluster_id=0
-default_p_state=UNDEFINED
-eventq_index=0
-forwardToCache=system.ruby.l1_cntrl0.forwardToCache
-issue_latency=2
-mandatoryQueue=system.ruby.l1_cntrl0.mandatoryQueue
-number_of_TBEs=256
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-recycle_latency=10
-requestFromCache=system.ruby.l1_cntrl0.requestFromCache
-responseFromCache=system.ruby.l1_cntrl0.responseFromCache
-responseToCache=system.ruby.l1_cntrl0.responseToCache
-ruby_system=system.ruby
-send_evictions=true
-sequencer=system.ruby.l1_cntrl0.sequencer
-system=system
-transitions_per_cycle=4
-version=0
-
-[system.ruby.l1_cntrl0.cacheMemory]
-type=RubyCache
-children=replacement_policy
-assoc=2
-block_size=0
-dataAccessLatency=1
-dataArrayBanks=1
-eventq_index=0
-is_icache=false
-replacement_policy=system.ruby.l1_cntrl0.cacheMemory.replacement_policy
-resourceStalls=false
-ruby_system=system.ruby
-size=256
-start_index_bit=6
-tagAccessLatency=1
-tagArrayBanks=1
-
-[system.ruby.l1_cntrl0.cacheMemory.replacement_policy]
-type=PseudoLRUReplacementPolicy
-assoc=2
-block_size=64
-eventq_index=0
-size=256
-
-[system.ruby.l1_cntrl0.forwardToCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[0]
-
-[system.ruby.l1_cntrl0.mandatoryQueue]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=false
-randomization=false
-
-[system.ruby.l1_cntrl0.requestFromCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[0]
-
-[system.ruby.l1_cntrl0.responseFromCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-master=system.ruby.network.slave[1]
-
-[system.ruby.l1_cntrl0.responseToCache]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-slave=system.ruby.network.master[1]
-
-[system.ruby.l1_cntrl0.sequencer]
-type=RubySequencer
-clk_domain=system.cpu.clk_domain
-coreid=99
-dcache=system.ruby.l1_cntrl0.cacheMemory
-dcache_hit_latency=1
-deadlock_threshold=500000
-default_p_state=UNDEFINED
-eventq_index=0
-garnet_standalone=false
-icache=system.ruby.l1_cntrl0.cacheMemory
-icache_hit_latency=1
-is_cpu_sequencer=true
-max_outstanding_requests=16
-no_retry_on_stall=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-ruby_system=system.ruby
-support_data_reqs=true
-support_inst_reqs=true
-system=system
-using_ruby_tester=false
-version=0
-master=system.cpu.interrupts.pio system.cpu.interrupts.int_slave
-slave=system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.int_master
-
-[system.ruby.memctrl_clk_domain]
-type=DerivedClockDomain
-clk_divider=3
-clk_domain=system.ruby.clk_domain
-eventq_index=0
-
-[system.ruby.network]
-type=SimpleNetwork
-children=ext_links0 ext_links1 int_link_buffers00 int_link_buffers01 int_link_buffers02 int_link_buffers03 int_link_buffers04 int_link_buffers05 int_link_buffers06 int_link_buffers07 int_link_buffers08 int_link_buffers09 int_link_buffers10 int_link_buffers11 int_link_buffers12 int_link_buffers13 int_link_buffers14 int_link_buffers15 int_link_buffers16 int_link_buffers17 int_link_buffers18 int_link_buffers19 int_link_buffers20 int_link_buffers21 int_link_buffers22 int_link_buffers23 int_link_buffers24 int_link_buffers25 int_link_buffers26 int_link_buffers27 int_link_buffers28 int_link_buffers29 int_link_buffers30 int_link_buffers31 int_link_buffers32 int_link_buffers33 int_link_buffers34 int_link_buffers35 int_link_buffers36 int_link_buffers37 int_link_buffers38 int_link_buffers39 int_links0 int_links1 int_links2 int_links3 routers0 routers1 routers2
-adaptive_routing=false
-buffer_size=0
-clk_domain=system.ruby.clk_domain
-control_msg_size=8
-default_p_state=UNDEFINED
-endpoint_bandwidth=1000
-eventq_index=0
-ext_links=system.ruby.network.ext_links0 system.ruby.network.ext_links1
-int_link_buffers=system.ruby.network.int_link_buffers00 system.ruby.network.int_link_buffers01 system.ruby.network.int_link_buffers02 system.ruby.network.int_link_buffers03 system.ruby.network.int_link_buffers04 system.ruby.network.int_link_buffers05 system.ruby.network.int_link_buffers06 system.ruby.network.int_link_buffers07 system.ruby.network.int_link_buffers08 system.ruby.network.int_link_buffers09 system.ruby.network.int_link_buffers10 system.ruby.network.int_link_buffers11 system.ruby.network.int_link_buffers12 system.ruby.network.int_link_buffers13 system.ruby.network.int_link_buffers14 system.ruby.network.int_link_buffers15 system.ruby.network.int_link_buffers16 system.ruby.network.int_link_buffers17 system.ruby.network.int_link_buffers18 system.ruby.network.int_link_buffers19 system.ruby.network.int_link_buffers20 system.ruby.network.int_link_buffers21 system.ruby.network.int_link_buffers22 system.ruby.network.int_link_buffers23 system.ruby.network.int_link_buffers24 system.ruby.network.int_link_buffers25 system.ruby.network.int_link_buffers26 system.ruby.network.int_link_buffers27 system.ruby.network.int_link_buffers28 system.ruby.network.int_link_buffers29 system.ruby.network.int_link_buffers30 system.ruby.network.int_link_buffers31 system.ruby.network.int_link_buffers32 system.ruby.network.int_link_buffers33 system.ruby.network.int_link_buffers34 system.ruby.network.int_link_buffers35 system.ruby.network.int_link_buffers36 system.ruby.network.int_link_buffers37 system.ruby.network.int_link_buffers38 system.ruby.network.int_link_buffers39
-int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2 system.ruby.network.int_links3
-netifs=
-number_of_virtual_networks=5
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
-ruby_system=system.ruby
-topology=Crossbar
-master=system.ruby.l1_cntrl0.forwardToCache.slave system.ruby.l1_cntrl0.responseToCache.slave system.ruby.dir_cntrl0.requestToDir.slave system.ruby.dir_cntrl0.dmaRequestToDir.slave
-slave=system.ruby.l1_cntrl0.requestFromCache.master system.ruby.l1_cntrl0.responseFromCache.master system.ruby.dir_cntrl0.responseFromDir.master system.ruby.dir_cntrl0.dmaResponseFromDir.master system.ruby.dir_cntrl0.forwardFromDir.master
-
-[system.ruby.network.ext_links0]
-type=SimpleExtLink
-bandwidth_factor=16
-eventq_index=0
-ext_node=system.ruby.l1_cntrl0
-int_node=system.ruby.network.routers0
-latency=1
-link_id=0
-weight=1
-
-[system.ruby.network.ext_links1]
-type=SimpleExtLink
-bandwidth_factor=16
-eventq_index=0
-ext_node=system.ruby.dir_cntrl0
-int_node=system.ruby.network.routers1
-latency=1
-link_id=1
-weight=1
-
-[system.ruby.network.int_link_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers15]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers16]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers17]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers18]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers19]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers20]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers21]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers22]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers23]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers24]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers25]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers26]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers27]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers28]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers29]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers30]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers31]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers32]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers33]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers34]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers35]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers36]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers37]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers38]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_link_buffers39]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.int_links0]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers2
-eventq_index=0
-latency=1
-link_id=2
-src_node=system.ruby.network.routers0
-src_outport=
-weight=1
-
-[system.ruby.network.int_links1]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers2
-eventq_index=0
-latency=1
-link_id=3
-src_node=system.ruby.network.routers1
-src_outport=
-weight=1
-
-[system.ruby.network.int_links2]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers0
-eventq_index=0
-latency=1
-link_id=4
-src_node=system.ruby.network.routers2
-src_outport=
-weight=1
-
-[system.ruby.network.int_links3]
-type=SimpleIntLink
-bandwidth_factor=16
-dst_inport=
-dst_node=system.ruby.network.routers1
-eventq_index=0
-latency=1
-link_id=5
-src_node=system.ruby.network.routers2
-src_outport=
-weight=1
-
-[system.ruby.network.routers0]
-type=Switch
-children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14
-power_model=Null
-router_id=0
-virt_nets=5
-
-[system.ruby.network.routers0.port_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers0.port_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1]
-type=Switch
-children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14
-power_model=Null
-router_id=1
-virt_nets=5
-
-[system.ruby.network.routers1.port_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers1.port_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2]
-type=Switch
-children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14 port_buffers15 port_buffers16 port_buffers17 port_buffers18 port_buffers19
-clk_domain=system.ruby.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19
-power_model=Null
-router_id=2
-virt_nets=5
-
-[system.ruby.network.routers2.port_buffers00]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers01]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers02]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers03]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers04]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers05]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers06]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers07]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers08]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers09]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers10]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers11]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers12]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers13]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers14]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers15]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers16]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers17]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers18]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.ruby.network.routers2.port_buffers19]
-type=MessageBuffer
-buffer_size=0
-eventq_index=0
-ordered=true
-randomization=false
-
-[system.sys_port_proxy]
-type=RubyPortProxy
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_cpu_sequencer=true
-no_retry_on_stall=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000
-p_state_clk_gate_min=1
-power_model=Null
-ruby_system=system.ruby
-support_data_reqs=true
-support_inst_reqs=true
-system=system
-using_ruby_tester=false
-version=0
-slave=system.system_port
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simerr b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simerr
deleted file mode 100755 (executable)
index 95500d5..0000000
+++ /dev/null
@@ -1,11 +0,0 @@
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: rounding error > tolerance
-    1.250000 rounded to 1
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
-warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout
deleted file mode 100755 (executable)
index 18eac10..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simout
-Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 19:05:53
-gem5 started Apr  3 2017 19:06:22
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 87199
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/x86/linux/simple-timing-ruby
-
-Global frequency set at 1000000000 ticks per second
-Hello world!
-Exiting @ tick 91859 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt
deleted file mode 100644 (file)
index f79527e..0000000
+++ /dev/null
@@ -1,707 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000092                      
-sim_ticks                                       91859                      
-final_tick                                      91859                      
-sim_freq                                   1000000000                      
-host_inst_rate                                  44912                      
-host_op_rate                                    81347                      
-host_tick_rate                                 766447                      
-host_mem_usage                                 444688                      
-host_seconds                                     0.12                      
-sim_insts                                        5381                      
-sim_ops                                          9748                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                             1                      
-system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.mem_ctrls.bytes_read::ruby.dir_cntrl0        88128                      
-system.mem_ctrls.bytes_read::total              88128                      
-system.mem_ctrls.bytes_written::ruby.dir_cntrl0        87872                      
-system.mem_ctrls.bytes_written::total           87872                      
-system.mem_ctrls.num_reads::ruby.dir_cntrl0         1377                      
-system.mem_ctrls.num_reads::total                1377                      
-system.mem_ctrls.num_writes::ruby.dir_cntrl0         1373                      
-system.mem_ctrls.num_writes::total               1373                      
-system.mem_ctrls.bw_read::ruby.dir_cntrl0    959383403                      
-system.mem_ctrls.bw_read::total             959383403                      
-system.mem_ctrls.bw_write::ruby.dir_cntrl0    956596523                      
-system.mem_ctrls.bw_write::total            956596523                      
-system.mem_ctrls.bw_total::ruby.dir_cntrl0   1915979926                      
-system.mem_ctrls.bw_total::total           1915979926                      
-system.mem_ctrls.readReqs                        1377                      
-system.mem_ctrls.writeReqs                       1373                      
-system.mem_ctrls.readBursts                      1377                      
-system.mem_ctrls.writeBursts                     1373                      
-system.mem_ctrls.bytesReadDRAM                  41408                      
-system.mem_ctrls.bytesReadWrQ                   46720                      
-system.mem_ctrls.bytesWritten                   41728                      
-system.mem_ctrls.bytesReadSys                   88128                      
-system.mem_ctrls.bytesWrittenSys                87872                      
-system.mem_ctrls.servicedByWrQ                    730                      
-system.mem_ctrls.mergedWrBursts                   702                      
-system.mem_ctrls.neitherReadNorWriteReqs            0                      
-system.mem_ctrls.perBankRdBursts::0                60                      
-system.mem_ctrls.perBankRdBursts::1                 2                      
-system.mem_ctrls.perBankRdBursts::2                 6                      
-system.mem_ctrls.perBankRdBursts::3                10                      
-system.mem_ctrls.perBankRdBursts::4                51                      
-system.mem_ctrls.perBankRdBursts::5                53                      
-system.mem_ctrls.perBankRdBursts::6                39                      
-system.mem_ctrls.perBankRdBursts::7                57                      
-system.mem_ctrls.perBankRdBursts::8                28                      
-system.mem_ctrls.perBankRdBursts::9               129                      
-system.mem_ctrls.perBankRdBursts::10              115                      
-system.mem_ctrls.perBankRdBursts::11               24                      
-system.mem_ctrls.perBankRdBursts::12                2                      
-system.mem_ctrls.perBankRdBursts::13               28                      
-system.mem_ctrls.perBankRdBursts::14                8                      
-system.mem_ctrls.perBankRdBursts::15               35                      
-system.mem_ctrls.perBankWrBursts::0                55                      
-system.mem_ctrls.perBankWrBursts::1                 2                      
-system.mem_ctrls.perBankWrBursts::2                 6                      
-system.mem_ctrls.perBankWrBursts::3                 8                      
-system.mem_ctrls.perBankWrBursts::4                52                      
-system.mem_ctrls.perBankWrBursts::5                48                      
-system.mem_ctrls.perBankWrBursts::6                38                      
-system.mem_ctrls.perBankWrBursts::7                60                      
-system.mem_ctrls.perBankWrBursts::8                28                      
-system.mem_ctrls.perBankWrBursts::9               130                      
-system.mem_ctrls.perBankWrBursts::10              123                      
-system.mem_ctrls.perBankWrBursts::11               24                      
-system.mem_ctrls.perBankWrBursts::12                2                      
-system.mem_ctrls.perBankWrBursts::13               31                      
-system.mem_ctrls.perBankWrBursts::14                8                      
-system.mem_ctrls.perBankWrBursts::15               37                      
-system.mem_ctrls.numRdRetry                         0                      
-system.mem_ctrls.numWrRetry                         0                      
-system.mem_ctrls.totGap                         91773                      
-system.mem_ctrls.readPktSize::0                     0                      
-system.mem_ctrls.readPktSize::1                     0                      
-system.mem_ctrls.readPktSize::2                     0                      
-system.mem_ctrls.readPktSize::3                     0                      
-system.mem_ctrls.readPktSize::4                     0                      
-system.mem_ctrls.readPktSize::5                     0                      
-system.mem_ctrls.readPktSize::6                  1377                      
-system.mem_ctrls.writePktSize::0                    0                      
-system.mem_ctrls.writePktSize::1                    0                      
-system.mem_ctrls.writePktSize::2                    0                      
-system.mem_ctrls.writePktSize::3                    0                      
-system.mem_ctrls.writePktSize::4                    0                      
-system.mem_ctrls.writePktSize::5                    0                      
-system.mem_ctrls.writePktSize::6                 1373                      
-system.mem_ctrls.rdQLenPdf::0                     647                      
-system.mem_ctrls.rdQLenPdf::1                       0                      
-system.mem_ctrls.rdQLenPdf::2                       0                      
-system.mem_ctrls.rdQLenPdf::3                       0                      
-system.mem_ctrls.rdQLenPdf::4                       0                      
-system.mem_ctrls.rdQLenPdf::5                       0                      
-system.mem_ctrls.rdQLenPdf::6                       0                      
-system.mem_ctrls.rdQLenPdf::7                       0                      
-system.mem_ctrls.rdQLenPdf::8                       0                      
-system.mem_ctrls.rdQLenPdf::9                       0                      
-system.mem_ctrls.rdQLenPdf::10                      0                      
-system.mem_ctrls.rdQLenPdf::11                      0                      
-system.mem_ctrls.rdQLenPdf::12                      0                      
-system.mem_ctrls.rdQLenPdf::13                      0                      
-system.mem_ctrls.rdQLenPdf::14                      0                      
-system.mem_ctrls.rdQLenPdf::15                      0                      
-system.mem_ctrls.rdQLenPdf::16                      0                      
-system.mem_ctrls.rdQLenPdf::17                      0                      
-system.mem_ctrls.rdQLenPdf::18                      0                      
-system.mem_ctrls.rdQLenPdf::19                      0                      
-system.mem_ctrls.rdQLenPdf::20                      0                      
-system.mem_ctrls.rdQLenPdf::21                      0                      
-system.mem_ctrls.rdQLenPdf::22                      0                      
-system.mem_ctrls.rdQLenPdf::23                      0                      
-system.mem_ctrls.rdQLenPdf::24                      0                      
-system.mem_ctrls.rdQLenPdf::25                      0                      
-system.mem_ctrls.rdQLenPdf::26                      0                      
-system.mem_ctrls.rdQLenPdf::27                      0                      
-system.mem_ctrls.rdQLenPdf::28                      0                      
-system.mem_ctrls.rdQLenPdf::29                      0                      
-system.mem_ctrls.rdQLenPdf::30                      0                      
-system.mem_ctrls.rdQLenPdf::31                      0                      
-system.mem_ctrls.wrQLenPdf::0                       1                      
-system.mem_ctrls.wrQLenPdf::1                       1                      
-system.mem_ctrls.wrQLenPdf::2                       1                      
-system.mem_ctrls.wrQLenPdf::3                       1                      
-system.mem_ctrls.wrQLenPdf::4                       1                      
-system.mem_ctrls.wrQLenPdf::5                       1                      
-system.mem_ctrls.wrQLenPdf::6                       1                      
-system.mem_ctrls.wrQLenPdf::7                       1                      
-system.mem_ctrls.wrQLenPdf::8                       1                      
-system.mem_ctrls.wrQLenPdf::9                       1                      
-system.mem_ctrls.wrQLenPdf::10                      1                      
-system.mem_ctrls.wrQLenPdf::11                      1                      
-system.mem_ctrls.wrQLenPdf::12                      1                      
-system.mem_ctrls.wrQLenPdf::13                      1                      
-system.mem_ctrls.wrQLenPdf::14                      1                      
-system.mem_ctrls.wrQLenPdf::15                      6                      
-system.mem_ctrls.wrQLenPdf::16                      6                      
-system.mem_ctrls.wrQLenPdf::17                     33                      
-system.mem_ctrls.wrQLenPdf::18                     42                      
-system.mem_ctrls.wrQLenPdf::19                     42                      
-system.mem_ctrls.wrQLenPdf::20                     43                      
-system.mem_ctrls.wrQLenPdf::21                     44                      
-system.mem_ctrls.wrQLenPdf::22                     40                      
-system.mem_ctrls.wrQLenPdf::23                     40                      
-system.mem_ctrls.wrQLenPdf::24                     40                      
-system.mem_ctrls.wrQLenPdf::25                     40                      
-system.mem_ctrls.wrQLenPdf::26                     40                      
-system.mem_ctrls.wrQLenPdf::27                     40                      
-system.mem_ctrls.wrQLenPdf::28                     40                      
-system.mem_ctrls.wrQLenPdf::29                     40                      
-system.mem_ctrls.wrQLenPdf::30                     40                      
-system.mem_ctrls.wrQLenPdf::31                     40                      
-system.mem_ctrls.wrQLenPdf::32                     40                      
-system.mem_ctrls.wrQLenPdf::33                      0                      
-system.mem_ctrls.wrQLenPdf::34                      0                      
-system.mem_ctrls.wrQLenPdf::35                      0                      
-system.mem_ctrls.wrQLenPdf::36                      0                      
-system.mem_ctrls.wrQLenPdf::37                      0                      
-system.mem_ctrls.wrQLenPdf::38                      0                      
-system.mem_ctrls.wrQLenPdf::39                      0                      
-system.mem_ctrls.wrQLenPdf::40                      0                      
-system.mem_ctrls.wrQLenPdf::41                      0                      
-system.mem_ctrls.wrQLenPdf::42                      0                      
-system.mem_ctrls.wrQLenPdf::43                      0                      
-system.mem_ctrls.wrQLenPdf::44                      0                      
-system.mem_ctrls.wrQLenPdf::45                      0                      
-system.mem_ctrls.wrQLenPdf::46                      0                      
-system.mem_ctrls.wrQLenPdf::47                      0                      
-system.mem_ctrls.wrQLenPdf::48                      0                      
-system.mem_ctrls.wrQLenPdf::49                      0                      
-system.mem_ctrls.wrQLenPdf::50                      0                      
-system.mem_ctrls.wrQLenPdf::51                      0                      
-system.mem_ctrls.wrQLenPdf::52                      0                      
-system.mem_ctrls.wrQLenPdf::53                      0                      
-system.mem_ctrls.wrQLenPdf::54                      0                      
-system.mem_ctrls.wrQLenPdf::55                      0                      
-system.mem_ctrls.wrQLenPdf::56                      0                      
-system.mem_ctrls.wrQLenPdf::57                      0                      
-system.mem_ctrls.wrQLenPdf::58                      0                      
-system.mem_ctrls.wrQLenPdf::59                      0                      
-system.mem_ctrls.wrQLenPdf::60                      0                      
-system.mem_ctrls.wrQLenPdf::61                      0                      
-system.mem_ctrls.wrQLenPdf::62                      0                      
-system.mem_ctrls.wrQLenPdf::63                      0                      
-system.mem_ctrls.bytesPerActivate::samples          263                      
-system.mem_ctrls.bytesPerActivate::mean    304.669202                      
-system.mem_ctrls.bytesPerActivate::gmean   201.653389                      
-system.mem_ctrls.bytesPerActivate::stdev   284.735596                      
-system.mem_ctrls.bytesPerActivate::0-127           72     27.38%     27.38%
-system.mem_ctrls.bytesPerActivate::128-255           68     25.86%     53.23%
-system.mem_ctrls.bytesPerActivate::256-383           44     16.73%     69.96%
-system.mem_ctrls.bytesPerActivate::384-511           29     11.03%     80.99%
-system.mem_ctrls.bytesPerActivate::512-639           12      4.56%     85.55%
-system.mem_ctrls.bytesPerActivate::640-767            9      3.42%     88.97%
-system.mem_ctrls.bytesPerActivate::768-895            6      2.28%     91.25%
-system.mem_ctrls.bytesPerActivate::896-1023            3      1.14%     92.40%
-system.mem_ctrls.bytesPerActivate::1024-1151           20      7.60%    100.00%
-system.mem_ctrls.bytesPerActivate::total          263                      
-system.mem_ctrls.rdPerTurnAround::samples           40                      
-system.mem_ctrls.rdPerTurnAround::mean      16.100000                      
-system.mem_ctrls.rdPerTurnAround::gmean     15.846587                      
-system.mem_ctrls.rdPerTurnAround::stdev      3.484765                      
-system.mem_ctrls.rdPerTurnAround::12-13             3      7.50%      7.50%
-system.mem_ctrls.rdPerTurnAround::14-15            12     30.00%     37.50%
-system.mem_ctrls.rdPerTurnAround::16-17            19     47.50%     85.00%
-system.mem_ctrls.rdPerTurnAround::18-19             4     10.00%     95.00%
-system.mem_ctrls.rdPerTurnAround::20-21             1      2.50%     97.50%
-system.mem_ctrls.rdPerTurnAround::34-35             1      2.50%    100.00%
-system.mem_ctrls.rdPerTurnAround::total            40                      
-system.mem_ctrls.wrPerTurnAround::samples           40                      
-system.mem_ctrls.wrPerTurnAround::mean      16.300000                      
-system.mem_ctrls.wrPerTurnAround::gmean     16.281263                      
-system.mem_ctrls.wrPerTurnAround::stdev      0.822753                      
-system.mem_ctrls.wrPerTurnAround::16               35     87.50%     87.50%
-system.mem_ctrls.wrPerTurnAround::18                3      7.50%     95.00%
-system.mem_ctrls.wrPerTurnAround::19                2      5.00%    100.00%
-system.mem_ctrls.wrPerTurnAround::total            40                      
-system.mem_ctrls.totQLat                        12721                      
-system.mem_ctrls.totMemAccLat                   25014                      
-system.mem_ctrls.totBusLat                       3235                      
-system.mem_ctrls.avgQLat                        19.66                      
-system.mem_ctrls.avgBusLat                       5.00                      
-system.mem_ctrls.avgMemAccLat                   38.66                      
-system.mem_ctrls.avgRdBW                       450.78                      
-system.mem_ctrls.avgWrBW                       454.26                      
-system.mem_ctrls.avgRdBWSys                    959.38                      
-system.mem_ctrls.avgWrBWSys                    956.60                      
-system.mem_ctrls.peakBW                      12800.00                      
-system.mem_ctrls.busUtil                         7.07                      
-system.mem_ctrls.busUtilRead                     3.52                      
-system.mem_ctrls.busUtilWrite                    3.55                      
-system.mem_ctrls.avgRdQLen                       1.00                      
-system.mem_ctrls.avgWrQLen                      25.84                      
-system.mem_ctrls.readRowHits                      435                      
-system.mem_ctrls.writeRowHits                     591                      
-system.mem_ctrls.readRowHitRate                 67.23                      
-system.mem_ctrls.writeRowHitRate                88.08                      
-system.mem_ctrls.avgGap                         33.37                      
-system.mem_ctrls.pageHitRate                    77.85                      
-system.mem_ctrls_0.actEnergy                   664020                      
-system.mem_ctrls_0.preEnergy                   340032                      
-system.mem_ctrls_0.readEnergy                 3175872                      
-system.mem_ctrls_0.writeEnergy                2246688                      
-system.mem_ctrls_0.refreshEnergy         7375680.000000                      
-system.mem_ctrls_0.actBackEnergy             10273224                      
-system.mem_ctrls_0.preBackEnergy               269568                      
-system.mem_ctrls_0.actPowerDownEnergy        25208136                      
-system.mem_ctrls_0.prePowerDownEnergy         4818816                      
-system.mem_ctrls_0.selfRefreshEnergy     743760.000000                      
-system.mem_ctrls_0.totalEnergy               55115796                      
-system.mem_ctrls_0.averagePower            600.004311                      
-system.mem_ctrls_0.totalIdleTime                68393                      
-system.mem_ctrls_0.memoryStateTime::IDLE          346                      
-system.mem_ctrls_0.memoryStateTime::REF          3126                      
-system.mem_ctrls_0.memoryStateTime::SREF          798                      
-system.mem_ctrls_0.memoryStateTime::PRE_PDN        12549                      
-system.mem_ctrls_0.memoryStateTime::ACT         19759                      
-system.mem_ctrls_0.memoryStateTime::ACT_PDN        55281                      
-system.mem_ctrls_1.actEnergy                  1285200                      
-system.mem_ctrls_1.preEnergy                   676200                      
-system.mem_ctrls_1.readEnergy                 4215456                      
-system.mem_ctrls_1.writeEnergy                3198816                      
-system.mem_ctrls_1.refreshEnergy         6761040.000000                      
-system.mem_ctrls_1.actBackEnergy              9576912                      
-system.mem_ctrls_1.preBackEnergy               183552                      
-system.mem_ctrls_1.actPowerDownEnergy        28147512                      
-system.mem_ctrls_1.prePowerDownEnergy         3322368                      
-system.mem_ctrls_1.selfRefreshEnergy                0                      
-system.mem_ctrls_1.totalEnergy               57367056                      
-system.mem_ctrls_1.averagePower            624.512089                      
-system.mem_ctrls_1.totalIdleTime                70328                      
-system.mem_ctrls_1.memoryStateTime::IDLE          150                      
-system.mem_ctrls_1.memoryStateTime::REF          2866                      
-system.mem_ctrls_1.memoryStateTime::SREF            0                      
-system.mem_ctrls_1.memoryStateTime::PRE_PDN         8652                      
-system.mem_ctrls_1.memoryStateTime::ACT         18464                      
-system.mem_ctrls_1.memoryStateTime::ACT_PDN        61727                      
-system.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.cpu.clk_domain.clock                         1                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.cpu.apic_clk_domain.clock                   16                      
-system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.cpu.workload.numSyscalls                    11                      
-system.cpu.pwrStateResidencyTicks::ON           91859                      
-system.cpu.numCycles                            91859                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        5381                      
-system.cpu.committedOps                          9748                      
-system.cpu.num_int_alu_accesses                  9654                      
-system.cpu.num_fp_alu_accesses                      0                      
-system.cpu.num_func_calls                         209                      
-system.cpu.num_conditional_control_insts          899                      
-system.cpu.num_int_insts                         9654                      
-system.cpu.num_fp_insts                             0                      
-system.cpu.num_int_register_reads               18335                      
-system.cpu.num_int_register_writes               7527                      
-system.cpu.num_fp_register_reads                    0                      
-system.cpu.num_fp_register_writes                   0                      
-system.cpu.num_cc_register_reads                 6487                      
-system.cpu.num_cc_register_writes                3536                      
-system.cpu.num_mem_refs                          1988                      
-system.cpu.num_load_insts                        1053                      
-system.cpu.num_store_insts                        935                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                      91859                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1208                      
-system.cpu.op_class::No_OpClass                     1      0.01%      0.01%
-system.cpu.op_class::IntAlu                      7749     79.49%     79.50%
-system.cpu.op_class::IntMult                        3      0.03%     79.53%
-system.cpu.op_class::IntDiv                         7      0.07%     79.61%
-system.cpu.op_class::FloatAdd                       0      0.00%     79.61%
-system.cpu.op_class::FloatCmp                       0      0.00%     79.61%
-system.cpu.op_class::FloatCvt                       0      0.00%     79.61%
-system.cpu.op_class::FloatMult                      0      0.00%     79.61%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     79.61%
-system.cpu.op_class::FloatDiv                       0      0.00%     79.61%
-system.cpu.op_class::FloatMisc                      0      0.00%     79.61%
-system.cpu.op_class::FloatSqrt                      0      0.00%     79.61%
-system.cpu.op_class::SimdAdd                        0      0.00%     79.61%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     79.61%
-system.cpu.op_class::SimdAlu                        0      0.00%     79.61%
-system.cpu.op_class::SimdCmp                        0      0.00%     79.61%
-system.cpu.op_class::SimdCvt                        0      0.00%     79.61%
-system.cpu.op_class::SimdMisc                       0      0.00%     79.61%
-system.cpu.op_class::SimdMult                       0      0.00%     79.61%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     79.61%
-system.cpu.op_class::SimdShift                      0      0.00%     79.61%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     79.61%
-system.cpu.op_class::SimdSqrt                       0      0.00%     79.61%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     79.61%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     79.61%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     79.61%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     79.61%
-system.cpu.op_class::MemRead                     1053     10.80%     90.41%
-system.cpu.op_class::MemWrite                     935      9.59%    100.00%
-system.cpu.op_class::FloatMemRead                   0      0.00%    100.00%
-system.cpu.op_class::FloatMemWrite                  0      0.00%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       9748                      
-system.ruby.clk_domain.clock                        1                      
-system.ruby.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.ruby.delayHist::bucket_size                  1                      
-system.ruby.delayHist::max_bucket                   9                      
-system.ruby.delayHist::samples                   2750                      
-system.ruby.delayHist                    |        2750    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.delayHist::total                     2750                      
-system.ruby.outstanding_req_hist_seqr::bucket_size            1                      
-system.ruby.outstanding_req_hist_seqr::max_bucket            9                      
-system.ruby.outstanding_req_hist_seqr::samples         8853                      
-system.ruby.outstanding_req_hist_seqr::mean            1                      
-system.ruby.outstanding_req_hist_seqr::gmean            1                      
-system.ruby.outstanding_req_hist_seqr    |           0      0.00%      0.00% |        8853    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.outstanding_req_hist_seqr::total         8853                      
-system.ruby.latency_hist_seqr::bucket_size           64                      
-system.ruby.latency_hist_seqr::max_bucket          639                      
-system.ruby.latency_hist_seqr::samples           8852                      
-system.ruby.latency_hist_seqr::mean          9.377203                      
-system.ruby.latency_hist_seqr::gmean         1.827971                      
-system.ruby.latency_hist_seqr::stdev        23.652747                      
-system.ruby.latency_hist_seqr            |        8226     92.93%     92.93% |         589      6.65%     99.58% |          26      0.29%     99.88% |           4      0.05%     99.92% |           3      0.03%     99.95% |           4      0.05%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.latency_hist_seqr::total             8852                      
-system.ruby.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.hit_latency_hist_seqr::samples         7475                      
-system.ruby.hit_latency_hist_seqr::mean             1                      
-system.ruby.hit_latency_hist_seqr::gmean            1                      
-system.ruby.hit_latency_hist_seqr        |           0      0.00%      0.00% |        7475    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.hit_latency_hist_seqr::total         7475                      
-system.ruby.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.miss_latency_hist_seqr::samples         1377                      
-system.ruby.miss_latency_hist_seqr::mean    54.852578                      
-system.ruby.miss_latency_hist_seqr::gmean    48.312712                      
-system.ruby.miss_latency_hist_seqr::stdev    33.880423                      
-system.ruby.miss_latency_hist_seqr       |         751     54.54%     54.54% |         589     42.77%     97.31% |          26      1.89%     99.20% |           4      0.29%     99.49% |           3      0.22%     99.71% |           4      0.29%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.miss_latency_hist_seqr::total         1377                      
-system.ruby.Directory.incomplete_times_seqr         1376                      
-system.ruby.dir_cntrl0.forwardFromDir.avg_buf_msgs     0.014947                      
-system.ruby.dir_cntrl0.forwardFromDir.avg_stall_time     0.996691                      
-system.ruby.dir_cntrl0.requestToDir.avg_buf_msgs     0.029937                      
-system.ruby.dir_cntrl0.requestToDir.avg_stall_time    11.743740                      
-system.ruby.dir_cntrl0.responseFromDir.avg_buf_msgs     0.014990                      
-system.ruby.dir_cntrl0.responseFromDir.avg_stall_time     0.999249                      
-system.ruby.dir_cntrl0.responseFromMemory.avg_buf_msgs     0.029937                      
-system.ruby.dir_cntrl0.responseFromMemory.avg_stall_time     0.999260                      
-system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.ruby.l1_cntrl0.cacheMemory.demand_hits         7475                      
-system.ruby.l1_cntrl0.cacheMemory.demand_misses         1377                      
-system.ruby.l1_cntrl0.cacheMemory.demand_accesses         8852                      
-system.ruby.l1_cntrl0.forwardToCache.avg_buf_msgs     0.014947                      
-system.ruby.l1_cntrl0.forwardToCache.avg_stall_time     6.976377                      
-system.ruby.l1_cntrl0.mandatoryQueue.avg_buf_msgs     0.096375                      
-system.ruby.l1_cntrl0.mandatoryQueue.avg_stall_time     0.999989                      
-system.ruby.l1_cntrl0.requestFromCache.avg_buf_msgs     0.059874                      
-system.ruby.l1_cntrl0.requestFromCache.avg_stall_time     1.999935                      
-system.ruby.l1_cntrl0.responseToCache.avg_buf_msgs     0.014990                      
-system.ruby.l1_cntrl0.responseToCache.avg_stall_time     6.994285                      
-system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.ruby.memctrl_clk_domain.clock                3                      
-system.ruby.network.routers0.port_buffers03.avg_buf_msgs     0.014947                      
-system.ruby.network.routers0.port_buffers03.avg_stall_time     5.979817                      
-system.ruby.network.routers0.port_buffers04.avg_buf_msgs     0.014990                      
-system.ruby.network.routers0.port_buffers04.avg_stall_time     5.995167                      
-system.ruby.network.routers0.port_buffers07.avg_buf_msgs     0.089723                      
-system.ruby.network.routers0.port_buffers07.avg_stall_time     6.744611                      
-system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.ruby.network.routers0.percent_links_utilized     7.484297                      
-system.ruby.network.routers0.msg_count.Control::2         1377                      
-system.ruby.network.routers0.msg_count.Data::2         1373                      
-system.ruby.network.routers0.msg_count.Response_Data::4         1377                      
-system.ruby.network.routers0.msg_count.Writeback_Control::3         1373                      
-system.ruby.network.routers0.msg_bytes.Control::2        11016                      
-system.ruby.network.routers0.msg_bytes.Data::2        98856                      
-system.ruby.network.routers0.msg_bytes.Response_Data::4        99144                      
-system.ruby.network.routers0.msg_bytes.Writeback_Control::3        10984                      
-system.ruby.network.routers1.port_buffers02.avg_buf_msgs     0.029937                      
-system.ruby.network.routers1.port_buffers02.avg_stall_time    10.743958                      
-system.ruby.network.routers1.port_buffers06.avg_buf_msgs     0.014947                      
-system.ruby.network.routers1.port_buffers06.avg_stall_time     1.993359                      
-system.ruby.network.routers1.port_buffers07.avg_buf_msgs     0.014990                      
-system.ruby.network.routers1.port_buffers07.avg_stall_time     1.998476                      
-system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.ruby.network.routers1.percent_links_utilized     7.484297                      
-system.ruby.network.routers1.msg_count.Control::2         1377                      
-system.ruby.network.routers1.msg_count.Data::2         1373                      
-system.ruby.network.routers1.msg_count.Response_Data::4         1377                      
-system.ruby.network.routers1.msg_count.Writeback_Control::3         1373                      
-system.ruby.network.routers1.msg_bytes.Control::2        11016                      
-system.ruby.network.routers1.msg_bytes.Data::2        98856                      
-system.ruby.network.routers1.msg_bytes.Response_Data::4        99144                      
-system.ruby.network.routers1.msg_bytes.Writeback_Control::3        10984                      
-system.ruby.network.int_link_buffers02.avg_buf_msgs     0.029937                      
-system.ruby.network.int_link_buffers02.avg_stall_time     7.744481                      
-system.ruby.network.int_link_buffers08.avg_buf_msgs     0.014947                      
-system.ruby.network.int_link_buffers08.avg_stall_time     2.990007                      
-system.ruby.network.int_link_buffers09.avg_buf_msgs     0.014990                      
-system.ruby.network.int_link_buffers09.avg_stall_time     2.997681                      
-system.ruby.network.int_link_buffers13.avg_buf_msgs     0.014947                      
-system.ruby.network.int_link_buffers13.avg_stall_time     4.983235                      
-system.ruby.network.int_link_buffers14.avg_buf_msgs     0.014990                      
-system.ruby.network.int_link_buffers14.avg_stall_time     4.996027                      
-system.ruby.network.int_link_buffers17.avg_buf_msgs     0.029937                      
-system.ruby.network.int_link_buffers17.avg_stall_time     9.744154                      
-system.ruby.network.routers2.port_buffers03.avg_buf_msgs     0.014947                      
-system.ruby.network.routers2.port_buffers03.avg_stall_time     3.986632                      
-system.ruby.network.routers2.port_buffers04.avg_buf_msgs     0.014990                      
-system.ruby.network.routers2.port_buffers04.avg_stall_time     3.996865                      
-system.ruby.network.routers2.port_buffers07.avg_buf_msgs     0.029937                      
-system.ruby.network.routers2.port_buffers07.avg_stall_time     8.744328                      
-system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.ruby.network.routers2.percent_links_utilized     7.484297                      
-system.ruby.network.routers2.msg_count.Control::2         1377                      
-system.ruby.network.routers2.msg_count.Data::2         1373                      
-system.ruby.network.routers2.msg_count.Response_Data::4         1377                      
-system.ruby.network.routers2.msg_count.Writeback_Control::3         1373                      
-system.ruby.network.routers2.msg_bytes.Control::2        11016                      
-system.ruby.network.routers2.msg_bytes.Data::2        98856                      
-system.ruby.network.routers2.msg_bytes.Response_Data::4        99144                      
-system.ruby.network.routers2.msg_bytes.Writeback_Control::3        10984                      
-system.ruby.network.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.ruby.network.msg_count.Control            4131                      
-system.ruby.network.msg_count.Data               4119                      
-system.ruby.network.msg_count.Response_Data         4131                      
-system.ruby.network.msg_count.Writeback_Control         4119                      
-system.ruby.network.msg_byte.Control            33048                      
-system.ruby.network.msg_byte.Data              296568                      
-system.ruby.network.msg_byte.Response_Data       297432                      
-system.ruby.network.msg_byte.Writeback_Control        32952                      
-system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED        91859                      
-system.ruby.network.routers0.throttle0.link_utilization     7.493006                      
-system.ruby.network.routers0.throttle0.msg_count.Response_Data::4         1377                      
-system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3         1373                      
-system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4        99144                      
-system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3        10984                      
-system.ruby.network.routers0.throttle1.link_utilization     7.475588                      
-system.ruby.network.routers0.throttle1.msg_count.Control::2         1377                      
-system.ruby.network.routers0.throttle1.msg_count.Data::2         1373                      
-system.ruby.network.routers0.throttle1.msg_bytes.Control::2        11016                      
-system.ruby.network.routers0.throttle1.msg_bytes.Data::2        98856                      
-system.ruby.network.routers1.throttle0.link_utilization     7.475588                      
-system.ruby.network.routers1.throttle0.msg_count.Control::2         1377                      
-system.ruby.network.routers1.throttle0.msg_count.Data::2         1373                      
-system.ruby.network.routers1.throttle0.msg_bytes.Control::2        11016                      
-system.ruby.network.routers1.throttle0.msg_bytes.Data::2        98856                      
-system.ruby.network.routers1.throttle1.link_utilization     7.493006                      
-system.ruby.network.routers1.throttle1.msg_count.Response_Data::4         1377                      
-system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3         1373                      
-system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4        99144                      
-system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3        10984                      
-system.ruby.network.routers2.throttle0.link_utilization     7.493006                      
-system.ruby.network.routers2.throttle0.msg_count.Response_Data::4         1377                      
-system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3         1373                      
-system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4        99144                      
-system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3        10984                      
-system.ruby.network.routers2.throttle1.link_utilization     7.475588                      
-system.ruby.network.routers2.throttle1.msg_count.Control::2         1377                      
-system.ruby.network.routers2.throttle1.msg_count.Data::2         1373                      
-system.ruby.network.routers2.throttle1.msg_bytes.Control::2        11016                      
-system.ruby.network.routers2.throttle1.msg_bytes.Data::2        98856                      
-system.ruby.delayVCHist.vnet_1::bucket_size            1                      
-system.ruby.delayVCHist.vnet_1::max_bucket            9                      
-system.ruby.delayVCHist.vnet_1::samples          1377                      
-system.ruby.delayVCHist.vnet_1           |        1377    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.delayVCHist.vnet_1::total            1377                      
-system.ruby.delayVCHist.vnet_2::bucket_size            1                      
-system.ruby.delayVCHist.vnet_2::max_bucket            9                      
-system.ruby.delayVCHist.vnet_2::samples          1373                      
-system.ruby.delayVCHist.vnet_2           |        1373    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.delayVCHist.vnet_2::total            1373                      
-system.ruby.LD.latency_hist_seqr::bucket_size           32                      
-system.ruby.LD.latency_hist_seqr::max_bucket          319                      
-system.ruby.LD.latency_hist_seqr::samples         1045                      
-system.ruby.LD.latency_hist_seqr::mean      23.607656                      
-system.ruby.LD.latency_hist_seqr::gmean      6.057935                      
-system.ruby.LD.latency_hist_seqr::stdev     29.475705                      
-system.ruby.LD.latency_hist_seqr         |         546     52.25%     52.25% |         330     31.58%     83.83% |         162     15.50%     99.33% |           1      0.10%     99.43% |           4      0.38%     99.81% |           1      0.10%     99.90% |           0      0.00%     99.90% |           1      0.10%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.latency_hist_seqr::total          1045                      
-system.ruby.LD.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.LD.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.LD.hit_latency_hist_seqr::samples          546                      
-system.ruby.LD.hit_latency_hist_seqr::mean            1                      
-system.ruby.LD.hit_latency_hist_seqr::gmean            1                      
-system.ruby.LD.hit_latency_hist_seqr     |           0      0.00%      0.00% |         546    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.hit_latency_hist_seqr::total          546                      
-system.ruby.LD.miss_latency_hist_seqr::bucket_size           32                      
-system.ruby.LD.miss_latency_hist_seqr::max_bucket          319                      
-system.ruby.LD.miss_latency_hist_seqr::samples          499                      
-system.ruby.LD.miss_latency_hist_seqr::mean    48.344689                      
-system.ruby.LD.miss_latency_hist_seqr::gmean    43.484561                      
-system.ruby.LD.miss_latency_hist_seqr::stdev    25.453032                      
-system.ruby.LD.miss_latency_hist_seqr    |           0      0.00%      0.00% |         330     66.13%     66.13% |         162     32.46%     98.60% |           1      0.20%     98.80% |           4      0.80%     99.60% |           1      0.20%     99.80% |           0      0.00%     99.80% |           1      0.20%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.miss_latency_hist_seqr::total          499                      
-system.ruby.ST.latency_hist_seqr::bucket_size           64                      
-system.ruby.ST.latency_hist_seqr::max_bucket          639                      
-system.ruby.ST.latency_hist_seqr::samples          935                      
-system.ruby.ST.latency_hist_seqr::mean      16.455615                      
-system.ruby.ST.latency_hist_seqr::gmean      2.877223                      
-system.ruby.ST.latency_hist_seqr::stdev     34.720603                      
-system.ruby.ST.latency_hist_seqr         |         821     87.81%     87.81% |         102     10.91%     98.72% |           6      0.64%     99.36% |           2      0.21%     99.57% |           2      0.21%     99.79% |           2      0.21%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.latency_hist_seqr::total           935                      
-system.ruby.ST.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.ST.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.ST.hit_latency_hist_seqr::samples          681                      
-system.ruby.ST.hit_latency_hist_seqr::mean            1                      
-system.ruby.ST.hit_latency_hist_seqr::gmean            1                      
-system.ruby.ST.hit_latency_hist_seqr     |           0      0.00%      0.00% |         681    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.hit_latency_hist_seqr::total          681                      
-system.ruby.ST.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.ST.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.ST.miss_latency_hist_seqr::samples          254                      
-system.ruby.ST.miss_latency_hist_seqr::mean    57.893701                      
-system.ruby.ST.miss_latency_hist_seqr::gmean    48.924758                      
-system.ruby.ST.miss_latency_hist_seqr::stdev    45.645746                      
-system.ruby.ST.miss_latency_hist_seqr    |         140     55.12%     55.12% |         102     40.16%     95.28% |           6      2.36%     97.64% |           2      0.79%     98.43% |           2      0.79%     99.21% |           2      0.79%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.miss_latency_hist_seqr::total          254                      
-system.ruby.IFETCH.latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.latency_hist_seqr::samples         6864                      
-system.ruby.IFETCH.latency_hist_seqr::mean     6.251748                      
-system.ruby.IFETCH.latency_hist_seqr::gmean     1.432185                      
-system.ruby.IFETCH.latency_hist_seqr::stdev    19.434647                      
-system.ruby.IFETCH.latency_hist_seqr     |        6521     95.00%     95.00% |         324      4.72%     99.72% |          15      0.22%     99.94% |           1      0.01%     99.96% |           1      0.01%     99.97% |           2      0.03%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.latency_hist_seqr::total         6864                      
-system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.IFETCH.hit_latency_hist_seqr::samples         6241                      
-system.ruby.IFETCH.hit_latency_hist_seqr::mean            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr::gmean            1                      
-system.ruby.IFETCH.hit_latency_hist_seqr |           0      0.00%      0.00% |        6241    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.hit_latency_hist_seqr::total         6241                      
-system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.miss_latency_hist_seqr::samples          623                      
-system.ruby.IFETCH.miss_latency_hist_seqr::mean    58.861958                      
-system.ruby.IFETCH.miss_latency_hist_seqr::gmean    52.329270                      
-system.ruby.IFETCH.miss_latency_hist_seqr::stdev    33.443818                      
-system.ruby.IFETCH.miss_latency_hist_seqr |         280     44.94%     44.94% |         324     52.01%     96.95% |          15      2.41%     99.36% |           1      0.16%     99.52% |           1      0.16%     99.68% |           2      0.32%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.miss_latency_hist_seqr::total          623                      
-system.ruby.RMW_Read.latency_hist_seqr::bucket_size            4                      
-system.ruby.RMW_Read.latency_hist_seqr::max_bucket           39                      
-system.ruby.RMW_Read.latency_hist_seqr::samples            8                      
-system.ruby.RMW_Read.latency_hist_seqr::mean     4.875000                      
-system.ruby.RMW_Read.latency_hist_seqr::gmean     1.542211                      
-system.ruby.RMW_Read.latency_hist_seqr::stdev    10.960155                      
-system.ruby.RMW_Read.latency_hist_seqr   |           7     87.50%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           0      0.00%     87.50% |           1     12.50%    100.00% |           0      0.00%    100.00%
-system.ruby.RMW_Read.latency_hist_seqr::total            8                      
-system.ruby.RMW_Read.hit_latency_hist_seqr::bucket_size            1                      
-system.ruby.RMW_Read.hit_latency_hist_seqr::max_bucket            9                      
-system.ruby.RMW_Read.hit_latency_hist_seqr::samples            7                      
-system.ruby.RMW_Read.hit_latency_hist_seqr::mean            1                      
-system.ruby.RMW_Read.hit_latency_hist_seqr::gmean            1                      
-system.ruby.RMW_Read.hit_latency_hist_seqr |           0      0.00%      0.00% |           7    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.RMW_Read.hit_latency_hist_seqr::total            7                      
-system.ruby.RMW_Read.miss_latency_hist_seqr::bucket_size            4                      
-system.ruby.RMW_Read.miss_latency_hist_seqr::max_bucket           39                      
-system.ruby.RMW_Read.miss_latency_hist_seqr::samples            1                      
-system.ruby.RMW_Read.miss_latency_hist_seqr::mean           32                      
-system.ruby.RMW_Read.miss_latency_hist_seqr::gmean           32                      
-system.ruby.RMW_Read.miss_latency_hist_seqr::stdev          nan                      
-system.ruby.RMW_Read.miss_latency_hist_seqr |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           1    100.00%    100.00% |           0      0.00%    100.00%
-system.ruby.RMW_Read.miss_latency_hist_seqr::total            1                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::samples         1377                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::mean    54.852578                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::gmean    48.312712                      
-system.ruby.Directory.miss_mach_latency_hist_seqr::stdev    33.880423                      
-system.ruby.Directory.miss_mach_latency_hist_seqr |         751     54.54%     54.54% |         589     42.77%     97.31% |          26      1.89%     99.20% |           4      0.29%     99.49% |           3      0.22%     99.71% |           4      0.29%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_mach_latency_hist_seqr::total         1377                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket            9                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total            1                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size            8                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket           79                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples            1                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean           75                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean    75.000000                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev          nan                      
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           1    100.00%    100.00%
-system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total            1                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size           32                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket          319                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples          499                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean    48.344689                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean    43.484561                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev    25.453032                      
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr |           0      0.00%      0.00% |         330     66.13%     66.13% |         162     32.46%     98.60% |           1      0.20%     98.80% |           4      0.80%     99.60% |           1      0.20%     99.80% |           0      0.00%     99.80% |           1      0.20%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total          499                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples          254                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean    57.893701                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean    48.924758                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev    45.645746                      
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr |         140     55.12%     55.12% |         102     40.16%     95.28% |           6      2.36%     97.64% |           2      0.79%     98.43% |           2      0.79%     99.21% |           2      0.79%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total          254                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size           64                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket          639                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples          623                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean    58.861958                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean    52.329270                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev    33.443818                      
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr |         280     44.94%     44.94% |         324     52.01%     96.95% |          15      2.41%     99.36% |           1      0.16%     99.52% |           1      0.16%     99.68% |           2      0.32%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
-system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total          623                      
-system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::bucket_size            4                      
-system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::max_bucket           39                      
-system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::samples            1                      
-system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::mean           32                      
-system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::gmean           32                      
-system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::stdev          nan                      
-system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           1    100.00%    100.00% |           0      0.00%    100.00%
-system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::total            1                      
-system.ruby.Directory_Controller.GETX            1377      0.00%      0.00%
-system.ruby.Directory_Controller.PUTX            1373      0.00%      0.00%
-system.ruby.Directory_Controller.Memory_Data         1377      0.00%      0.00%
-system.ruby.Directory_Controller.Memory_Ack         1373      0.00%      0.00%
-system.ruby.Directory_Controller.I.GETX          1377      0.00%      0.00%
-system.ruby.Directory_Controller.M.PUTX          1373      0.00%      0.00%
-system.ruby.Directory_Controller.IM.Memory_Data         1377      0.00%      0.00%
-system.ruby.Directory_Controller.MI.Memory_Ack         1373      0.00%      0.00%
-system.ruby.L1Cache_Controller.Load              1045      0.00%      0.00%
-system.ruby.L1Cache_Controller.Ifetch            6864      0.00%      0.00%
-system.ruby.L1Cache_Controller.Store              943      0.00%      0.00%
-system.ruby.L1Cache_Controller.Data              1377      0.00%      0.00%
-system.ruby.L1Cache_Controller.Replacement         1373      0.00%      0.00%
-system.ruby.L1Cache_Controller.Writeback_Ack         1373      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Load             499      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Ifetch           623      0.00%      0.00%
-system.ruby.L1Cache_Controller.I.Store            255      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Load             546      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Ifetch          6241      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Store            688      0.00%      0.00%
-system.ruby.L1Cache_Controller.M.Replacement         1373      0.00%      0.00%
-system.ruby.L1Cache_Controller.MI.Writeback_Ack         1373      0.00%      0.00%
-system.ruby.L1Cache_Controller.IS.Data           1122      0.00%      0.00%
-system.ruby.L1Cache_Controller.IM.Data            255      0.00%      0.00%
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini
deleted file mode 100644 (file)
index 1bbdae2..0000000
+++ /dev/null
@@ -1,432 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-kvm_vm=Null
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=apic_clk_domain dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.apic_clk_domain]
-type=DerivedClockDomain
-clk_divider=16
-clk_domain=system.cpu_clk_domain
-eventq_index=0
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-system=system
-port=system.cpu.toL2Bus.slave[3]
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=X86LocalApic
-clk_domain=system.cpu.apic_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-int_latency=1000
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-pio_addr=2305843009213693952
-pio_latency=100000
-power_model=Null
-system=system
-int_master=system.membus.slave[2]
-int_slave=system.membus.master[2]
-pio=system.membus.master[1]
-
-[system.cpu.isa]
-type=X86ISA
-eventq_index=0
-
-[system.cpu.itb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-system=system
-port=system.cpu.toL2Bus.slave[2]
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/x86/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
-slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simerr b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simerr
deleted file mode 100755 (executable)
index c0b55d1..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout
deleted file mode 100755 (executable)
index 30d3fbf..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing/simout
-Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 19:05:53
-gem5 started Apr  3 2017 19:06:21
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 87155
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/x86/linux/simple-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 31247500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt
deleted file mode 100644 (file)
index e9a5f13..0000000
+++ /dev/null
@@ -1,501 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000031                      
-sim_ticks                                    31247500                      
-final_tick                                   31247500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 194718                      
-host_op_rate                                   352470                      
-host_tick_rate                             1129073998                      
-host_mem_usage                                 278812                      
-host_seconds                                     0.03                      
-sim_insts                                        5381                      
-sim_ops                                          9748                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED     31247500                      
-system.physmem.bytes_read::cpu.inst             14528                      
-system.physmem.bytes_read::cpu.data              8576                      
-system.physmem.bytes_read::total                23104                      
-system.physmem.bytes_inst_read::cpu.inst        14528                      
-system.physmem.bytes_inst_read::total           14528                      
-system.physmem.num_reads::cpu.inst                227                      
-system.physmem.num_reads::cpu.data                134                      
-system.physmem.num_reads::total                   361                      
-system.physmem.bw_read::cpu.inst            464933195                      
-system.physmem.bw_read::cpu.data            274453956                      
-system.physmem.bw_read::total               739387151                      
-system.physmem.bw_inst_read::cpu.inst       464933195                      
-system.physmem.bw_inst_read::total          464933195                      
-system.physmem.bw_total::cpu.inst           464933195                      
-system.physmem.bw_total::cpu.data           274453956                      
-system.physmem.bw_total::total              739387151                      
-system.pwrStateResidencyTicks::UNDEFINED     31247500                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED     31247500                      
-system.cpu.apic_clk_domain.clock                 8000                      
-system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED     31247500                      
-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED     31247500                      
-system.cpu.workload.numSyscalls                    11                      
-system.cpu.pwrStateResidencyTicks::ON        31247500                      
-system.cpu.numCycles                            62495                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                        5381                      
-system.cpu.committedOps                          9748                      
-system.cpu.num_int_alu_accesses                  9654                      
-system.cpu.num_fp_alu_accesses                      0                      
-system.cpu.num_func_calls                         209                      
-system.cpu.num_conditional_control_insts          899                      
-system.cpu.num_int_insts                         9654                      
-system.cpu.num_fp_insts                             0                      
-system.cpu.num_int_register_reads               18335                      
-system.cpu.num_int_register_writes               7527                      
-system.cpu.num_fp_register_reads                    0                      
-system.cpu.num_fp_register_writes                   0                      
-system.cpu.num_cc_register_reads                 6487                      
-system.cpu.num_cc_register_writes                3536                      
-system.cpu.num_mem_refs                          1988                      
-system.cpu.num_load_insts                        1053                      
-system.cpu.num_store_insts                        935                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                      62495                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                              1208                      
-system.cpu.op_class::No_OpClass                     1      0.01%      0.01%
-system.cpu.op_class::IntAlu                      7749     79.49%     79.50%
-system.cpu.op_class::IntMult                        3      0.03%     79.53%
-system.cpu.op_class::IntDiv                         7      0.07%     79.61%
-system.cpu.op_class::FloatAdd                       0      0.00%     79.61%
-system.cpu.op_class::FloatCmp                       0      0.00%     79.61%
-system.cpu.op_class::FloatCvt                       0      0.00%     79.61%
-system.cpu.op_class::FloatMult                      0      0.00%     79.61%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     79.61%
-system.cpu.op_class::FloatDiv                       0      0.00%     79.61%
-system.cpu.op_class::FloatMisc                      0      0.00%     79.61%
-system.cpu.op_class::FloatSqrt                      0      0.00%     79.61%
-system.cpu.op_class::SimdAdd                        0      0.00%     79.61%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     79.61%
-system.cpu.op_class::SimdAlu                        0      0.00%     79.61%
-system.cpu.op_class::SimdCmp                        0      0.00%     79.61%
-system.cpu.op_class::SimdCvt                        0      0.00%     79.61%
-system.cpu.op_class::SimdMisc                       0      0.00%     79.61%
-system.cpu.op_class::SimdMult                       0      0.00%     79.61%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     79.61%
-system.cpu.op_class::SimdShift                      0      0.00%     79.61%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     79.61%
-system.cpu.op_class::SimdSqrt                       0      0.00%     79.61%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     79.61%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     79.61%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     79.61%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     79.61%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     79.61%
-system.cpu.op_class::MemRead                     1053     10.80%     90.41%
-system.cpu.op_class::MemWrite                     935      9.59%    100.00%
-system.cpu.op_class::FloatMemRead                   0      0.00%    100.00%
-system.cpu.op_class::FloatMemWrite                  0      0.00%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                       9748                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     31247500                      
-system.cpu.dcache.tags.replacements                 0                      
-system.cpu.dcache.tags.tagsinuse            80.527852                      
-system.cpu.dcache.tags.total_refs                1854                      
-system.cpu.dcache.tags.sampled_refs               134                      
-system.cpu.dcache.tags.avg_refs             13.835821                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data    80.527852                      
-system.cpu.dcache.tags.occ_percent::cpu.data     0.019660                      
-system.cpu.dcache.tags.occ_percent::total     0.019660                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024          134                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0           31                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::1          103                      
-system.cpu.dcache.tags.occ_task_id_percent::1024     0.032715                      
-system.cpu.dcache.tags.tag_accesses              4110                      
-system.cpu.dcache.tags.data_accesses             4110                      
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     31247500                      
-system.cpu.dcache.ReadReq_hits::cpu.data          998                      
-system.cpu.dcache.ReadReq_hits::total             998                      
-system.cpu.dcache.WriteReq_hits::cpu.data          856                      
-system.cpu.dcache.WriteReq_hits::total            856                      
-system.cpu.dcache.demand_hits::cpu.data          1854                      
-system.cpu.dcache.demand_hits::total             1854                      
-system.cpu.dcache.overall_hits::cpu.data         1854                      
-system.cpu.dcache.overall_hits::total            1854                      
-system.cpu.dcache.ReadReq_misses::cpu.data           55                      
-system.cpu.dcache.ReadReq_misses::total            55                      
-system.cpu.dcache.WriteReq_misses::cpu.data           79                      
-system.cpu.dcache.WriteReq_misses::total           79                      
-system.cpu.dcache.demand_misses::cpu.data          134                      
-system.cpu.dcache.demand_misses::total            134                      
-system.cpu.dcache.overall_misses::cpu.data          134                      
-system.cpu.dcache.overall_misses::total           134                      
-system.cpu.dcache.ReadReq_miss_latency::cpu.data      3465000                      
-system.cpu.dcache.ReadReq_miss_latency::total      3465000                      
-system.cpu.dcache.WriteReq_miss_latency::cpu.data      4977000                      
-system.cpu.dcache.WriteReq_miss_latency::total      4977000                      
-system.cpu.dcache.demand_miss_latency::cpu.data      8442000                      
-system.cpu.dcache.demand_miss_latency::total      8442000                      
-system.cpu.dcache.overall_miss_latency::cpu.data      8442000                      
-system.cpu.dcache.overall_miss_latency::total      8442000                      
-system.cpu.dcache.ReadReq_accesses::cpu.data         1053                      
-system.cpu.dcache.ReadReq_accesses::total         1053                      
-system.cpu.dcache.WriteReq_accesses::cpu.data          935                      
-system.cpu.dcache.WriteReq_accesses::total          935                      
-system.cpu.dcache.demand_accesses::cpu.data         1988                      
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-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data        50500                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50501.385042                      
-system.cpu.toL2Bus.snoop_filter.tot_requests          362                      
-system.cpu.toL2Bus.snoop_filter.hit_single_requests            1                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0                      
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     31247500                      
-system.cpu.toL2Bus.trans_dist::ReadResp           283                      
-system.cpu.toL2Bus.trans_dist::ReadExReq           79                      
-system.cpu.toL2Bus.trans_dist::ReadExResp           79                      
-system.cpu.toL2Bus.trans_dist::ReadCleanReq          228                      
-system.cpu.toL2Bus.trans_dist::ReadSharedReq           55                      
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          456                      
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          268                      
-system.cpu.toL2Bus.pkt_count::total               724                      
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        14592                      
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         8576                      
-system.cpu.toL2Bus.pkt_size::total              23168                      
-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples          362                      
-system.cpu.toL2Bus.snoop_fanout::mean        0.002762                      
-system.cpu.toL2Bus.snoop_fanout::stdev       0.052559                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0                361     99.72%     99.72%
-system.cpu.toL2Bus.snoop_fanout::1                  1      0.28%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            1                      
-system.cpu.toL2Bus.snoop_fanout::total            362                      
-system.cpu.toL2Bus.reqLayer0.occupancy         181000                      
-system.cpu.toL2Bus.reqLayer0.utilization          0.6                      
-system.cpu.toL2Bus.respLayer0.occupancy        342000                      
-system.cpu.toL2Bus.respLayer0.utilization          1.1                      
-system.cpu.toL2Bus.respLayer1.occupancy        201000                      
-system.cpu.toL2Bus.respLayer1.utilization          0.6                      
-system.membus.snoop_filter.tot_requests           361                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED     31247500                      
-system.membus.trans_dist::ReadResp                282                      
-system.membus.trans_dist::ReadExReq                79                      
-system.membus.trans_dist::ReadExResp               79                      
-system.membus.trans_dist::ReadSharedReq           282                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          722                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::total          722                      
-system.membus.pkt_count::total                    722                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        23104                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::total        23104                      
-system.membus.pkt_size::total                   23104                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples               361                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                     361    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                 361                      
-system.membus.reqLayer0.occupancy              361500                      
-system.membus.reqLayer0.utilization               1.2                      
-system.membus.respLayer1.occupancy            1805000                      
-system.membus.respLayer1.utilization              5.8                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/00.hello/test.py b/tests/quick/se/00.hello/test.py
deleted file mode 100644 (file)
index 6698677..0000000
+++ /dev/null
@@ -1,32 +0,0 @@
-# Copyright (c) 2006 The Regents of The University of Michigan
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Steve Reinhardt
-
-root.system.cpu[0].workload = Process(cmd = 'hello',
-                                      executable = binpath('hello'))
-if root.system.cpu[0].checker != NULL:
-    root.system.cpu[0].checker.workload = root.system.cpu[0].workload