Makefile: depend on soc_extra_v
authorMatt Johnston <matt@codeconstruct.com.au>
Wed, 27 Oct 2021 10:43:13 +0000 (18:43 +0800)
committerMatt Johnston <matt@codeconstruct.com.au>
Fri, 4 Mar 2022 02:49:40 +0000 (10:49 +0800)
Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
Makefile

index 85a0fee7c3e1d468cf351f7311261c75bd4c7aec..dbe62bac26265ca4227840ad3554e8ec026b6d8e 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -232,7 +232,7 @@ fpga_files = fpga/soc_reset.vhdl \
 
 synth_files = $(core_files) $(soc_files) $(soc_extra_synth) $(fpga_files) $(clkgen) $(toplevel) $(dmi_dtm)
 
-microwatt.json: $(synth_files) $(RAM_INIT_FILE)
+microwatt.json: $(synth_files) $(RAM_INIT_FILE) $(soc_extra_v)
        $(YOSYS) $(GHDLSYNTH) -p "ghdl --std=08 --no-formal $(GHDL_IMAGE_GENERICS) $(synth_files) -e toplevel; read_verilog $(uart_files) $(soc_extra_v); synth_ecp5 -abc9 -nowidelut -json $@  $(SYNTH_ECP5_FLAGS)"
 
 microwatt.v: $(synth_files) $(RAM_INIT_FILE)