From: Luke Kenneth Casson Leighton Date: Thu, 28 Mar 2019 16:06:54 +0000 (+0000) Subject: use StageChain for SCDeNorm X-Git-Tag: ls180-24jan2020~1416 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=686582ca91aab408a7a81de18b1a0369df610d05;p=ieee754fpu.git use StageChain for SCDeNorm --- diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py index 5dcf71b0..126f147b 100644 --- a/src/add/nmigen_add_experiment.py +++ b/src/add/nmigen_add_experiment.py @@ -355,38 +355,36 @@ class FPAddSpecialCasesDeNorm(FPState, UnbufferedPipeline): def __init__(self, width, id_wid): FPState.__init__(self, "special_cases") - self.smod = FPAddSpecialCasesMod(width, id_wid) - self.dmod = FPAddDeNormMod(width, id_wid) + self.width = width + self.id_wid = id_wid UnbufferedPipeline.__init__(self, self) # pipe is its own stage self.out = self.ospec() def ispec(self): - return self.smod.ispec() + return FPADDBaseData(self.width, self.id_wid) # SpecialCases ispec def ospec(self): - return self.dmod.ospec() + return FPSCData(self.width, self.id_wid) # DeNorm ospec def setup(self, m, i): """ links module to inputs and outputs """ - # these only needed for break-out (early-out) - # out_z = self.smod.ospec() - # out_do_z = Signal(reset_less=True) - self.smod.setup(m, i) - self.dmod.setup(m, self.smod.o) - #m.d.comb += out_do_z.eq(self.smod.o.out_do_z) + smod = FPAddSpecialCasesMod(self.width, self.id_wid) + dmod = FPAddDeNormMod(self.width, self.id_wid) + + chain = StageChain([smod, dmod]) + chain.setup(m, i) - # out_do_z=True, only needed for early-out (split pipeline) - #m.d.sync += out_z.z.v.eq(self.smod.o.z.v) # only take output - #m.d.sync += out_z.mid.eq(self.smod.o.mid) # (and mid) + # only needed for break-out (early-out) + # self.out_do_z = smod.o.out_do_z - # out_do_z=False - self.o = self.dmod.o + self.o = dmod.o def process(self, i): return self.o def action(self, m): + # for break-out (early-out) #with m.If(self.out_do_z): # m.next = "put_z" #with m.Else(): @@ -408,6 +406,9 @@ class FPAddDeNormMod(FPState): def ospec(self): return FPSCData(self.width, self.id_wid) + def process(self, i): + return self.o + def setup(self, m, i): """ links module to inputs and outputs """ @@ -1519,6 +1520,7 @@ class FPPutZIdx(FPState): with m.Else(): m.d.sync += self.out_zs[self.in_mid].stb.eq(1) + class FPOpData: def __init__(self, width, id_wid): self.z = FPOp(width)