From: Ivan Grokhotkov Date: Mon, 8 Jun 2020 21:23:42 +0000 (+0200) Subject: [breaking-change] ice40_hx8k_b_evn: fix UART flow control pins. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=70897161bf7846d940490ebd5198aef1f6800919;p=nmigen-boards.git [breaking-change] ice40_hx8k_b_evn: fix UART flow control pins. RTS/CTS and DTR/DSR pairs have been swapped to work around the signal direction in UARTResource. Un-reverse the signals, making the names match the schematic. Fix the direction by setting role=dce. Ref. http://www.latticesemi.com/view_document?document_id=50373 --- diff --git a/nmigen_boards/ice40_hx8k_b_evn.py b/nmigen_boards/ice40_hx8k_b_evn.py index 07c5348..48d5d9e 100644 --- a/nmigen_boards/ice40_hx8k_b_evn.py +++ b/nmigen_boards/ice40_hx8k_b_evn.py @@ -23,8 +23,9 @@ class ICE40HX8KBEVNPlatform(LatticeICE40Platform): ), # D2..D9 UARTResource(0, - rx="B10", tx="B12", rts="A15", cts="B13", dtr="B14", dsr="A16", dcd="B15", - attrs=Attrs(IO_STANDARD="SB_LVCMOS", PULLUP=1) + rx="B10", tx="B12", rts="B13", cts="A15", dtr="A16", dsr="B14", dcd="B15", + attrs=Attrs(IO_STANDARD="SB_LVCMOS", PULLUP=1), + role="dce" ), *SPIFlashResources(0,