From: Palmer Dabbelt Date: Thu, 25 May 2017 19:14:06 +0000 (-0700) Subject: Merge pull request #53 from richardxia/fail-if-simulator-exits-early X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a9433c4daa287fbe101025f2a079261a10149225;hp=3cd7f374258f7c4ddaa4e0d835a149f185308d28;p=riscv-tests.git Merge pull request #53 from richardxia/fail-if-simulator-exits-early Fail if simulator exits early. --- diff --git a/isa/rv64ud/fmin.S b/isa/rv64ud/fmin.S index 64c4aac..55df33d 100644 --- a/isa/rv64ud/fmin.S +++ b/isa/rv64ud/fmin.S @@ -31,11 +31,17 @@ RVTEST_CODE_BEGIN TEST_FP_OP2_D(16, fmax.d, 0, 3.14159265, 3.14159265, 0.00000001 ); TEST_FP_OP2_D(17, fmax.d, 0, -1.0, -1.0, -2.0 ); - # FMIN(sNaN, x) = canonical NaN - TEST_FP_OP2_D(20, fmax.d, 0x10, qNaN, sNaN, 0); + # FMIN(sNaN, x) = x + TEST_FP_OP2_D(20, fmax.d, 0x10, 1.0, sNaN, 1.0); # FMIN(qNaN, qNaN) = canonical NaN TEST_FP_OP2_D(21, fmax.d, 0x00, qNaN, NaN, NaN); + # -0.0 < +0.0 + TEST_FP_OP2_D(30, fmin.d, 0, -0.0, -0.0, 0.0 ); + TEST_FP_OP2_D(31, fmin.d, 0, -0.0, 0.0, -0.0 ); + TEST_FP_OP2_D(32, fmax.d, 0, 0.0, -0.0, 0.0 ); + TEST_FP_OP2_D(33, fmax.d, 0, 0.0, 0.0, -0.0 ); + TEST_PASSFAIL RVTEST_CODE_END diff --git a/isa/rv64uf/fmin.S b/isa/rv64uf/fmin.S index 5bbbf3f..8c721aa 100644 --- a/isa/rv64uf/fmin.S +++ b/isa/rv64uf/fmin.S @@ -31,11 +31,17 @@ RVTEST_CODE_BEGIN TEST_FP_OP2_S(16, fmax.s, 0, 3.14159265, 3.14159265, 0.00000001 ); TEST_FP_OP2_S(17, fmax.s, 0, -1.0, -1.0, -2.0 ); - # FMIN(sNaN, x) = canonical NaN - TEST_FP_OP2_S(20, fmax.s, 0x10, qNaNf, sNaNf, 0); + # FMIN(sNaN, x) = x + TEST_FP_OP2_S(20, fmax.s, 0x10, 1.0, sNaNf, 1.0); # FMIN(qNaN, qNaN) = canonical NaN TEST_FP_OP2_S(21, fmax.s, 0x00, qNaNf, NaN, NaN); + # -0.0 < +0.0 + TEST_FP_OP2_S(30, fmin.s, 0, -0.0, -0.0, 0.0 ); + TEST_FP_OP2_S(31, fmin.s, 0, -0.0, 0.0, -0.0 ); + TEST_FP_OP2_S(32, fmax.s, 0, 0.0, -0.0, 0.0 ); + TEST_FP_OP2_S(33, fmax.s, 0, 0.0, 0.0, -0.0 ); + TEST_PASSFAIL RVTEST_CODE_END