From: Andrew Waterman <andrew@sifive.com>
Date: Tue, 21 Aug 2018 21:24:23 +0000 (-0700)
Subject: Instantiate disassembler after max_xlen is known
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b6ec196e9efe33d29d0c9fb80202737719c7730f;p=riscv-isa-sim.git

Instantiate disassembler after max_xlen is known

This fixes RVC disassembly.

It's done in a way that doesn't break 2cd60b277e909a5599ca48e4561cbfbc61460186
---

diff --git a/riscv/processor.cc b/riscv/processor.cc
index ecbe3ef..8bcd8e2 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -24,12 +24,16 @@ processor_t::processor_t(const char* isa, simif_t* sim, uint32_t id,
   : debug(false), halt_request(false), sim(sim), ext(NULL), id(id),
   halt_on_reset(halt_on_reset), last_pc(1), executions(1)
 {
-  disassembler = new disassembler_t(max_xlen);
   parse_isa_string(isa);
   register_base_instructions();
 
   mmu = new mmu_t(sim, this);
 
+  disassembler = new disassembler_t(max_xlen);
+  if (ext)
+    for (auto disasm_insn : ext->get_disasms())
+      disassembler->add_insn(disasm_insn);
+
   reset();
 }