From: Luke Kenneth Casson Leighton Date: Fri, 15 Mar 2019 08:47:21 +0000 (+0000) Subject: add extra comment block explaining pipe stage example X-Git-Tag: ls180-24jan2020~1658 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b90c533476affe63a34292bfe54dde62a105bed8;p=ieee754fpu.git add extra comment block explaining pipe stage example --- diff --git a/src/add/example_buf_pipe.py b/src/add/example_buf_pipe.py index 0f2c9746..8f374225 100644 --- a/src/add/example_buf_pipe.py +++ b/src/add/example_buf_pipe.py @@ -69,7 +69,17 @@ class ExampleStage: def __init__(self): """ i_data can be a DIFFERENT type from everything else - o_data, r_data and result must be of the same type + o_data, r_data and result are best of the same type. + however this is not strictly the case. an intermediate + transformation process could hypothetically be applied, however + it is result and r_data that definitively need to be of the same + (intermediary) type, as it is both result and r_data that + are transferred into o_data: + + i_data -> process() -> result --> o_data + | ^ + | | + +-> r_data -+ """ self.i_data = Signal(16) self.r_data = Signal(16)