From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 24 Jul 2018 04:03:53 +0000 (+0100)
Subject: pep8 cleanup
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d66fd51d2f9d18a8899573d497dde8a4bfcc817e;p=pinmux.git

pep8 cleanup
---

diff --git a/src/bsv/interface_decl.py b/src/bsv/interface_decl.py
index e535db1..f697fda 100644
--- a/src/bsv/interface_decl.py
+++ b/src/bsv/interface_decl.py
@@ -20,7 +20,7 @@ class Pin(object):
     """
 
     def __init__(self, name,
-                 name_ = None,
+                 name_=None,
                  idx=None,
                  ready=True,
                  enabled=True,
@@ -121,7 +121,7 @@ class Pin(object):
     def ifacedef2(self, fmtoutfn, fmtinfn, fmtdecfn):
         if self.action:
             fmtname = fmtinfn(self.name)
-            res =  "            interface %s = interface Put\n" % self.name_
+            res = "            interface %s = interface Put\n" % self.name_
             res += '              method '
             res += "Action put"
             #res += fmtdecfn(self.name)
@@ -131,7 +131,7 @@ class Pin(object):
             res += '            endinterface;'
         else:
             fmtname = fmtoutfn(self.name)
-            res =  "            interface %s = interface Get\n" % self.name_
+            res = "            interface %s = interface Get\n" % self.name_
             res += '              method ActionValue#'
             res += '(%s) get;\n' % self.bitspec
             res += "                return %s;\n" % (fmtname)
@@ -153,6 +153,7 @@ class Pin(object):
             name = 'tget'
         return (name, res)
 
+
 class Interface(PeripheralIface):
     """ create an interface from a list of pinspecs.
         each pinspec is a dictionary, see Pin class arguments
@@ -195,7 +196,7 @@ class Interface(PeripheralIface):
                     # NOTice - outen key is removed
             else:
                 name = p['name']
-                if name.isdigit(): # HACK!  deals with EINT case
+                if name.isdigit():  # HACK!  deals with EINT case
                     name = self.pname(name)
                 _p['name_'] = name
                 _p['idx'] = idx
@@ -334,7 +335,7 @@ class Interface(PeripheralIface):
             decfn = self.ifacefmtdecfn3
             outfn = self.ifacefmtoutenfn
         return pin.ifacedef2(outfn, self.ifacefmtinfn,
-                            decfn)
+                             decfn)
 
     def ifacedef(self, *args):
         res = '\n'.join(map(self.ifacefmtpin, self.pins))
@@ -368,6 +369,7 @@ class IOInterface(Interface):
     def wirefmt(self, *args):
         return generic_io.format(*args)
 
+
 class InterfaceGPIO(Interface):
 
     def ifacepfmt(self, *args):
@@ -421,7 +423,7 @@ class InterfaceGPIO(Interface):
             decfn = self.ifacefmtdecfn3
             outfn = self.ifacefmtoutenfn
         return pin.ifacedef3(outfn, self.ifacefmtinfn,
-                            decfn)
+                             decfn)
 
 
 class Interfaces(InterfacesBase, PeripheralInterfaces):
@@ -430,7 +432,7 @@ class Interfaces(InterfacesBase, PeripheralInterfaces):
 
     def __init__(self, pth=None):
         InterfacesBase.__init__(self, Interface, pth,
-                                            {'gpio': InterfaceGPIO })
+                                {'gpio': InterfaceGPIO})
         PeripheralInterfaces.__init__(self)
 
     def ifacedef(self, f, *args):
diff --git a/src/bsv/peripheral_gen/base.py b/src/bsv/peripheral_gen/base.py
index f40e4de..90aae7d 100644
--- a/src/bsv/peripheral_gen/base.py
+++ b/src/bsv/peripheral_gen/base.py
@@ -1,5 +1,6 @@
 import types
 
+
 class PBase(object):
     def __init__(self, name):
         self.name = name
@@ -85,8 +86,8 @@ class PBase(object):
                         ps_ = ps + '_out'
                     else:
                         ps_ = ps
-                    ret.append("      mkConnection({0},\n\t\t\t{1}.{2});" \
-                                .format(ps_, n_, fname))
+                    ret.append("      mkConnection({0},\n\t\t\t{1}.{2});"
+                               .format(ps_, n_, fname))
                 fname = None
                 if p.get('outen'):
                     fname = self.pinname_outen(pname)
@@ -94,8 +95,8 @@ class PBase(object):
                     if isinstance(fname, str):
                         fname = "{0}.{1}".format(n_, fname)
                     fname = self.pinname_tweak(pname, 'outen', fname)
-                    ret.append("      mkConnection({0}_outen,\n\t\t\t{1});"\
-                                .format(ps, fname))
+                    ret.append("      mkConnection({0}_outen,\n\t\t\t{1});"
+                               .format(ps, fname))
             if typ == 'in' or typ == 'inout':
                 fname = self.pinname_in(pname)
                 if fname:
@@ -172,7 +173,7 @@ class PBase(object):
             print "plic_obj", name, idx, plic_obj
             plic = mkplic_rule.format(name, plic_obj, irq_offs)
             res.append(plic)
-            irq_offs += 1 # increment to next irq
+            irq_offs += 1  # increment to next irq
         return ('\n'.join(res), irq_offs)
 
     def mk_ext_ifacedef(self, iname, inum):
@@ -228,7 +229,7 @@ class PeripheralIface(object):
         if slow:
             self.slow = slow(ifacename)
             self.slow.peripheral = self
-        for fname in ['slowimport', 
+        for fname in ['slowimport',
                       'slowifinstance', 'slowifdecl', 'slowifdeclmux',
                       'mkslow_peripheral', 'mk_plic', 'mk_ext_ifacedef',
                       'mk_connection', 'mk_cellconn', 'mk_pincon']:
@@ -375,10 +376,9 @@ class PeripheralInterfaces(object):
                 ret.append(txt)
         return '\n'.join(list(filter(None, ret)))
 
-
     def mk_plic(self):
         ret = []
-        irq_offs = 8 # XXX: DMA scovers 0-7?
+        irq_offs = 8  # XXX: DMA scovers 0-7?
         for (name, count) in self.ifacecount:
             for i in range(count):
                 res = self.data[name].mk_plic(i, irq_offs)
@@ -426,6 +426,7 @@ class PFactory(object):
                 return v
         return None
 
+
 slowfactory = PFactory()
 
 if __name__ == '__main__':
diff --git a/src/bsv/peripheral_gen/eint.py b/src/bsv/peripheral_gen/eint.py
index cd3be2c..f5a6e86 100644
--- a/src/bsv/peripheral_gen/eint.py
+++ b/src/bsv/peripheral_gen/eint.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class eint(PBase):
 
     def slowimport(self):
diff --git a/src/bsv/peripheral_gen/gpio.py b/src/bsv/peripheral_gen/gpio.py
index 8678b48..9419f1c 100644
--- a/src/bsv/peripheral_gen/gpio.py
+++ b/src/bsv/peripheral_gen/gpio.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class gpio(PBase):
 
     def slowimport(self):
diff --git a/src/bsv/peripheral_gen/jtag.py b/src/bsv/peripheral_gen/jtag.py
index 09c049d..0592b38 100644
--- a/src/bsv/peripheral_gen/jtag.py
+++ b/src/bsv/peripheral_gen/jtag.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class jtag(PBase):
 
     def axi_slave_name(self, name, ifacenum):
@@ -18,7 +19,8 @@ class jtag(PBase):
                "        method  Action jtag_ck (Bit#(1) in);"
 
     def slowifinstance(self):
-        return jtag_method_template # bit of a lazy hack this...
+        return jtag_method_template  # bit of a lazy hack this...
+
 
 jtag_method_template = """\
         method  Action jtag_ms (Bit#(1) in);
diff --git a/src/bsv/peripheral_gen/pwm.py b/src/bsv/peripheral_gen/pwm.py
index 1a43c13..b5354f6 100644
--- a/src/bsv/peripheral_gen/pwm.py
+++ b/src/bsv/peripheral_gen/pwm.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class pwm(PBase):
 
     def slowimport(self):
diff --git a/src/bsv/peripheral_gen/qspi.py b/src/bsv/peripheral_gen/qspi.py
index 0ed26b3..462b57b 100644
--- a/src/bsv/peripheral_gen/qspi.py
+++ b/src/bsv/peripheral_gen/qspi.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class qspi(PBase):
 
     def slowimport(self):
diff --git a/src/bsv/peripheral_gen/quart.py b/src/bsv/peripheral_gen/quart.py
index 5850b8e..36ddaba 100644
--- a/src/bsv/peripheral_gen/quart.py
+++ b/src/bsv/peripheral_gen/quart.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class quart(PBase):
 
     def slowimport(self):
@@ -21,14 +22,14 @@ class quart(PBase):
         return "quart{0}.slave_axi_uart"
 
     def pinname_out(self, pname):
-        return {'tx' : 'coe_rs232.stx_out',
+        return {'tx': 'coe_rs232.stx_out',
                 'rts': 'coe_rs232.rts_out',
-               }.get(pname, '')
+                }.get(pname, '')
 
     def pinname_in(self, pname):
-        return {'rx': 'coe_rs232.srx_in', 
+        return {'rx': 'coe_rs232.srx_in',
                 'cts': 'coe_rs232.cts_in'
-               }.get(pname, '')
+                }.get(pname, '')
 
     def __disabled_mk_pincon(self, name, count):
         ret = [PBase.mk_pincon(self, name, count)]
@@ -64,6 +65,7 @@ class quart(PBase):
     def slowifdeclmux(self):
         return "        method Bit#(1) {1}{0}_intr;"
 
+
 uart_plic_template = """\
      // PLIC {0} synchronisation with irq {1}
      SyncBitIfc#(Bit#(1)) {0}_interrupt <-
@@ -72,4 +74,3 @@ uart_plic_template = """\
          {0}_interrupt.send({0}.irq);
      endrule
 """
-
diff --git a/src/bsv/peripheral_gen/rgbttl.py b/src/bsv/peripheral_gen/rgbttl.py
index 874c625..e350e65 100644
--- a/src/bsv/peripheral_gen/rgbttl.py
+++ b/src/bsv/peripheral_gen/rgbttl.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class rgbttl(PBase):
 
     def slowimport(self):
@@ -9,7 +10,7 @@ class rgbttl(PBase):
         return 10
 
     def mkslow_peripheral(self):
-        sz = len(self.peripheral.pinspecs) - 4 # subtract CK, DE, HS, VS
+        sz = len(self.peripheral.pinspecs) - 4  # subtract CK, DE, HS, VS
         return "        Ifc_rgbttl_dummy lcd{0} <-  mkrgbttl_dummy();"
 
     def _mk_connection(self, name=None, count=0):
diff --git a/src/bsv/peripheral_gen/rs232.py b/src/bsv/peripheral_gen/rs232.py
index 597ad3e..2882c25 100644
--- a/src/bsv/peripheral_gen/rs232.py
+++ b/src/bsv/peripheral_gen/rs232.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class rs232(PBase):
 
     def slowimport(self):
diff --git a/src/bsv/peripheral_gen/sdmmc.py b/src/bsv/peripheral_gen/sdmmc.py
index 00407ec..74db274 100644
--- a/src/bsv/peripheral_gen/sdmmc.py
+++ b/src/bsv/peripheral_gen/sdmmc.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class sdmmc(PBase):
 
     def slowimport(self):
diff --git a/src/bsv/peripheral_gen/spi.py b/src/bsv/peripheral_gen/spi.py
index be51297..1725d00 100644
--- a/src/bsv/peripheral_gen/spi.py
+++ b/src/bsv/peripheral_gen/spi.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class spi(PBase):
 
     def slowimport(self):
@@ -56,5 +57,3 @@ class spi(PBase):
 
     def slowifdeclmux(self):
         return "        method Bit#(1) {1}{0}_isint;"
-
-
diff --git a/src/bsv/peripheral_gen/twi.py b/src/bsv/peripheral_gen/twi.py
index 2fcd6fe..e20ea4c 100644
--- a/src/bsv/peripheral_gen/twi.py
+++ b/src/bsv/peripheral_gen/twi.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class twi(PBase):
 
     def slowimport(self):
@@ -37,7 +38,7 @@ class twi(PBase):
         return ["{0}.isint()",
                 "{0}.timerint()",
                 "{0}.isber()"
-               ][idx].format(pname)
+                ][idx].format(pname)
 
     def mk_ext_ifacedef(self, iname, inum):
         name = self.get_iname(inum)
@@ -45,5 +46,3 @@ class twi(PBase):
 
     def slowifdeclmux(self):
         return "        method Bit#(1) {1}{0}_isint;"
-
-
diff --git a/src/bsv/peripheral_gen/uart.py b/src/bsv/peripheral_gen/uart.py
index 1533d7f..a5eaacd 100644
--- a/src/bsv/peripheral_gen/uart.py
+++ b/src/bsv/peripheral_gen/uart.py
@@ -1,5 +1,6 @@
 from bsv.peripheral_gen.base import PBase
 
+
 class uart(PBase):
 
     def slowimport(self):
diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py
index 881f99b..bf4bfa6 100644
--- a/src/bsv/pinmux_generator.py
+++ b/src/bsv/pinmux_generator.py
@@ -75,7 +75,7 @@ def pinmuxgen(pth=None, verify=True):
     shutil.copyfile(os.path.join(cwd, 'Makefile.template'),
                     os.path.join(bp, 'Makefile'))
     cwd = os.path.join(cwd, 'bsv_lib')
-    for fname in [ ]:
+    for fname in []:
         shutil.copyfile(os.path.join(cwd, fname),
                         os.path.join(bl, fname))
 
@@ -117,9 +117,9 @@ def write_slow(slow, slowt, p, ifaces, iocells):
     ifacedef = ifaces.mk_ext_ifacedef()
     with open(slow, "w") as bsv_file:
         bsv_file.write(slowt.format(imports, ifdecl, regdef, slavedecl,
-                                       fnaddrmap, mkslow, mkcon, mkcellcon,
-                                       pincon, inst, mkplic,
-                                       numsloirqs, ifacedef))
+                                    fnaddrmap, mkslow, mkcon, mkcellcon,
+                                    pincon, inst, mkplic,
+                                    numsloirqs, ifacedef))
 
 
 def write_bus(bus, p, ifaces):