From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 6 Dec 2023 14:44:03 +0000 (+0000)
Subject: add funding link to nlnet bug #672
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e847546098beb2748ff0da139cfa143f25eb2751;p=libreriscv.git

add funding link to nlnet bug #672
---

diff --git a/openpower/sv/cookbook/pospopcnt.mdwn b/openpower/sv/cookbook/pospopcnt.mdwn
index d3db8bb42..bf638c2a4 100644
--- a/openpower/sv/cookbook/pospopcnt.mdwn
+++ b/openpower/sv/cookbook/pospopcnt.mdwn
@@ -1,10 +1,21 @@
 # Positional popcount SVP64
 
+**Links**
+
 * <https://bugs.libre-soc.org/show_bug.cgi?id=672>
 * <https://github.com/clausecker/pospop/blob/master/countsse2_amd64.s>
 * RISC-V Bitmanip Extension Document Version 0.94-draft Editor: Claire Wolf Symbiotic GmbH
 <https://raw.githubusercontent.com/riscv/riscv-bitmanip/master/bitmanip-draft.pdf>
 
+**Funding**
+
+This project is funded through the [NGI Assure Fund](https://nlnet.nl/assure), a fund established by [NLnet](https://nlnet.nl) with financial support from the European Commission's [Next Generation Internet](https://ngi.eu) program. Learn more at the [NLnet project page](https://nlnet.nl/project/Libre-SOC-OpenPOWER-ISA).
+
+[<img src="https://nlnet.nl/logo/banner.png" alt="NLnet foundation logo" width="20%" />](https://nlnet.nl)
+[<img src="https://nlnet.nl/image/logos/NGIAssure_tag.svg" alt="NGI Assure Logo" width="20%" />](https://nlnet.nl/assure)
+
+**Introduction**
+
 Positional popcount in optimised assembler is typically done on SIMD ISAs in
 around 500 lines.  Power ISA thanks to `bpermd` can be much more efficient:
 with SVP64 even more so.  The reference implementation showing the concept