From: Luke Kenneth Casson Leighton Date: Thu, 2 May 2019 23:43:30 +0000 (+0100) Subject: get test_fpadd_pipe.py working X-Git-Tag: ls180-24jan2020~1053 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fe8def53014d725fe6cc716858aa9a640c7db582;p=ieee754fpu.git get test_fpadd_pipe.py working --- diff --git a/src/ieee754/fpadd/test/test_fpadd_pipe.py b/src/ieee754/fpadd/test/test_fpadd_pipe.py index ca469dc1..2b021924 100644 --- a/src/ieee754/fpadd/test/test_fpadd_pipe.py +++ b/src/ieee754/fpadd/test/test_fpadd_pipe.py @@ -37,7 +37,7 @@ class InputTest: def send(self, mid): for i in range(self.tlen): op1, op2 = self.di[mid][i] - rs = dut.p[mid] + rs = self.dut.p[mid] yield rs.valid_i.eq(1) yield rs.data_i.a.eq(op1) yield rs.data_i.b.eq(op2) @@ -108,8 +108,7 @@ class InputTest: print ("recv ended", mid) - -if __name__ == '__main__': +def test1(): dut = FPADDMuxInOut(32, 4) vl = rtlil.convert(dut, ports=dut.ports()) with open("test_fpadd_pipe.il", "w") as f: @@ -124,3 +123,5 @@ if __name__ == '__main__': ], vcd_name="test_fpadd_pipe.vcd") +if __name__ == '__main__': + test1()