Correct comment in Cam to reflect changes
[soc.git] / TLB / src / Cam.py
2019-03-09 Daniel BenusovichCorrect comment in Cam to reflect changes
2019-03-09 Daniel BenusovichAdd VectorAssembler to accept match results from CamEnt...
2019-03-09 Daniel BenusovichModify Cam to use AddressEncoder instead of two encoders
2019-03-07 Daniel BenusovichAdd submodule names explicitly for easier yosys graph...
2019-03-06 Daniel BenusovichAdd todo for encoder. To create a new encoder module...
2019-03-06 Daniel BenusovichAdd logic for multiple match line.
2019-03-05 Luke Kenneth Casso... whoops move comment
2019-03-05 Luke Kenneth Casso... moved code (hardware) which doesnt depend on the index...
2019-03-05 Luke Kenneth Casso... use binary-invert rather than == 0 comparison
2019-03-05 Luke Kenneth Casso... use binary test rather than comparison against 1,
2019-03-05 Luke Kenneth Casso... remove whitespace (again)
2019-03-05 Daniel BenusovichAdjust main function port declarations
2019-03-05 Daniel BenusovichUpdate CAM to follow Xilinx interface.
2019-03-05 Daniel BenusovichCorrect main of CamEntry
2019-03-05 Daniel BenusovichAdd comma. woops
2019-03-05 Daniel BenusovichUpdate CAM to represent and actual CAM. No more key!
2019-03-04 Luke Kenneth Casso... add Makefile to generate Cam.v verilog
2019-03-04 Luke Kenneth Casso... comments and whitespace cleanup
2019-02-25 Daniel BenusovichA few more comments for the src
2019-02-25 Daniel BenusovichAdding Reset. Cleaning Logic for CAM. Still needs tests
2019-02-23 Daniel BenusovichUpdating CAM to (hopefully) full functionality. Needs...
2019-02-23 Daniel BenusovichUpdating CAM so that the submodules actually work....
2019-02-23 Daniel Benusovichmoving Cam to src