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add dummy/fake/ghost PLL blackbox cell
[soclayout.git]
/
experiments9
/
coriolis2
/
settings.py
2021-05-24
Luke Kenneth Casso...
add dummy/fake/ghost PLL blackbox cell
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2021-04-30
Luke Kenneth Casso...
enabling experiments9 new LibreSOCMem fake blackbox...
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2021-04-28
Luke Kenneth Casso...
first experiment creating a LibreSOCMem library with...
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2021-04-28
Luke Kenneth Casso...
name everything back to spblock_512w64b8w now that...
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2020-11-08
Luke Kenneth Casso...
start conversion of ls180 to new niolib
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2020-10-01
Luke Kenneth Casso...
add I2C, allow sys_clk_i and sys_pll_48_o out
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2020-09-29
Luke Kenneth Casso...
add cki and ck to clock settings
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2020-09-28
Luke Kenneth Casso...
cut definition of clocks back to minimum
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2020-08-13
Luke Kenneth Casso...
whitespace cleanup
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2020-08-13
Luke Kenneth Casso...
whoops must use "with" on CfgCache
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2020-08-12
Jean-Paul Chaput
Added doDesignFlat.py to P&R issuer in a flat way.
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2020-08-11
Jean-Paul Chaput
Correct taking in accounts of the parameters settings.
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2020-08-11
Luke Kenneth Casso...
fix coriolis2 settings to use new CfgCache
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2020-08-07
Jean-Paul Chaput
Merge branch 'master' of ssh://libre-riscv.org:922...
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2020-08-07
Jean-Paul Chaput
Use of CfgCache. Little beautificaton of doDesign.py
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2020-06-30
Jean-Paul Chaput
Added experments9, a first taste at the full scale...
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