sys_clk renamed to sys_pllclk, iopads load from copy of auto-generated
[soclayout.git] / experiments9 / tsmc_c018 / coriolis2 / settings.py
2021-06-09 Luke Kenneth Casso... sys_clk renamed to sys_pllclk, iopads load from copy...
2021-06-04 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-06-04 Jean-Paul ChaputUpdated configuration suited for experiment9/tsmc_c018.
2021-05-27 Luke Kenneth Casso... add TODO into tsmc_c018 coriolis2 settings.py
2021-04-28 Luke Kenneth Casso... create function which pre-creates the blackbox cells
2021-04-28 Luke Kenneth Casso... name everything back to spblock_512w64b8w now that...
2021-04-28 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-04-28 Jean-Paul ChaputManagement of SRAMs block at Coriolis devel.
2021-04-24 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-04-24 Jean-Paul ChaputKeep in synch with the latest Coriolis. SRAM models...
2021-03-23 Jean-Paul ChaputUodated doDesign for the latest ls180 (sram variant).
2021-03-09 Jean-Paul ChaputFirst working version of the Flexlib + P&R flow for...
2021-03-05 Jean-Paul ChaputAdded support files for ls180+SRAM on TSMC 180nm.