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sys_clk renamed to sys_pllclk, iopads load from copy of auto-generated
[soclayout.git]
/
experiments9
/
tsmc_c018
/
coriolis2
/
settings.py
2021-06-09
Luke Kenneth Casso...
sys_clk renamed to sys_pllclk, iopads load from copy...
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2021-06-04
Jean-Paul Chaput
Merge branch 'master' of ssh://libre-riscv.org:922...
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2021-06-04
Jean-Paul Chaput
Updated configuration suited for experiment9/tsmc_c018.
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2021-05-27
Luke Kenneth Casso...
add TODO into tsmc_c018 coriolis2 settings.py
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2021-04-28
Luke Kenneth Casso...
create function which pre-creates the blackbox cells
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2021-04-28
Luke Kenneth Casso...
name everything back to spblock_512w64b8w now that...
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2021-04-28
Jean-Paul Chaput
Merge branch 'master' of ssh://libre-riscv.org:922...
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2021-04-28
Jean-Paul Chaput
Management of SRAMs block at Coriolis devel.
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2021-04-24
Jean-Paul Chaput
Merge branch 'master' of ssh://libre-riscv.org:922...
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2021-04-24
Jean-Paul Chaput
Keep in synch with the latest Coriolis. SRAM models...
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2021-03-23
Jean-Paul Chaput
Uodated doDesign for the latest ls180 (sram variant).
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2021-03-09
Jean-Paul Chaput
First working version of the Flexlib + P&R flow for...
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2021-03-05
Jean-Paul Chaput
Added support files for ls180+SRAM on TSMC 180nm.
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