map memory location to wire value, if memory is converted to FFs
[yosys.git] / kernel / fstdata.cc
2022-05-04 Miodrag Milanovicmap memory location to wire value, if memory is convert...
2022-05-04 Miodrag MilanovicStart restoring memory state from VCD/FST
2022-04-25 Jannis HarderMerge pull request #3287 from jix/smt2-conditional...
2022-04-25 Jannis HarderMerge pull request #3257 from jix/tribuf-formal
2022-04-25 Miodrag MilanovićMerge pull request #3290 from mpasternacki/bugfix/freeb...
2022-04-25 Miodrag MilanovićMerge pull request #3289 from YosysHQ/micko/sim_improve
2022-04-22 Miodrag MilanovicIgnore change on last edge
2022-03-30 Miodrag MilanovićMerge pull request #3259 from YosysHQ/micko/verific_val...
2022-03-30 Miodrag MilanovićMerge pull request #3260 from YosysHQ/micko/proper_scop...
2022-03-30 Miodrag MilanovicProper scope naming from FST
2022-03-28 LoftyMerge pull request #3194 from Ravenslofty/abc9-flow3mfs
2022-03-18 Miodrag MilanovicMore verbose warnings
2022-03-17 Miodrag MilanovićMerge pull request #3236 from YosysHQ/micko/tb_initial
2022-03-16 Miodrag MilanovicRecognize registers and set initial state for them...
2022-03-14 Claire XenMerge pull request #3213 from antonblanchard/abc-typo
2022-03-07 Miodrag MilanovićMerge pull request #3210 from rqou/json-signed
2022-03-04 Miodrag MilanovićMerge pull request #3186 from nakengelhardt/smtbmc_sby_...
2022-03-04 Miodrag MilanovićMerge pull request #3206 from YosysHQ/micko/quote_remove
2022-03-04 Miodrag MilanovićMerge pull request #3207 from nakengelhardt/json_escape...
2022-03-04 Miodrag MilanovićMerge pull request #3219 from YosysHQ/micko/quick_vcd
2022-02-28 Miodrag MilanovicVCD reader support by using external tool
2022-02-28 Miodrag MilanovićMerge pull request #3216 from YosysHQ/claire/simstuff
2022-02-25 Miodrag MilanovicFix for last clock edge data
2022-02-22 Claire XenMerge pull request #3211 from YosysHQ/micko/witness
2022-02-22 Claire XenMerge pull request #3197 from YosysHQ/claire/smtbmcfix
2022-02-21 Miodrag MilanovićMerge pull request #3203 from YosysHQ/micko/sim_ff
2022-02-18 Miodrag MilanovicChanged error message
2022-02-16 Miodrag MilanovicAdd support for various ff/latch cells simulation
2022-02-11 Miodrag MilanovićMerge pull request #3164 from zachjs/fix-ast-warn
2022-02-11 Claire XenMerge branch 'master' into clk2ff-better-names
2022-02-11 Claire XenMerge pull request #2019 from boqwxp/glift
2022-02-07 Miodrag MilanovićMerge pull request #3185 from YosysHQ/micko/co_sim
2022-02-04 Miodrag MilanovicError detection for co-simulation
2022-02-04 Miodrag Milanovicbug fix and cleanups
2022-01-31 Miodrag MilanovicCleanup
2022-01-31 Miodrag MilanovicDisplay simulation time data
2022-01-28 Miodrag Milanovicignore not found private signals
2022-01-28 Miodrag Milanovicpreserve VCD mangled names
2022-01-28 Miodrag Milanovicdetect edges even when x
2022-01-28 Miodrag Milanoviccleanup
2022-01-28 Miodrag MilanovicDo actual compare
2022-01-28 Miodrag MilanovicAdd more options and time handling
2022-01-26 Miodrag MilanovicAdd fstdata helper class