projects / nmigen.git / history
| 2020-08-27 | whitequark | sim: split into base, core, and engines. | blob | commitdiff | raw |
| 2020-08-27 | whitequark | sim.pysim: in write_vcd(), close files if an exception... | blob | commitdiff | raw | diff to current |
| 2020-08-27 | whitequark | sim._pyclock: new type of process. | blob | commitdiff | raw | diff to current |
| 2020-07-13 | Jacob Lifshay | sim.pysim: write the next, not curr signal value to... | blob | commitdiff | raw | diff to current |
| 2020-07-11 | whitequark | sim.pysim: use VCD aliases to reduce space and time... | blob | commitdiff | raw | diff to current |
| 2020-07-08 | whitequark | sim: simplify. NFC. | blob | commitdiff | raw | diff to current |
| 2020-07-08 | whitequark | back.pysim→sim.pysim; split into more manageable parts. | blob | commitdiff | raw | diff to current |