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add litex wishbone interconnect to 4x 4k SRAMs
[soc.git]
/
src
/
soc
/
litex
/
florent
/
Makefile
2021-02-20
Luke Kenneth Casso...
add litex wishbone interconnect to 4x 4k SRAMs
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2020-12-03
Luke Kenneth Casso...
add 3 more 4k SRAMs, change WB bus width to 64 in ls180...
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2020-11-10
Luke Kenneth Casso...
add build commands to Makefile for versa ecp5
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2020-09-28
Luke Kenneth Casso...
rewrite ilang file after litex ls180 build
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2020-09-27
Luke Kenneth Casso...
add Makefile for creating ls180.il
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