sf2: fix name of AND modules
[yosys.git] / techlibs /
2021-04-09 Stefan Riesenbergersf2: fix name of AND modules ls180
2021-03-30 Eddie Hungabc9: fix SCC issues (#2694)
2021-03-19 Miodrag MilanovićMerge pull request #2681 from msinger/fix-issue2606
2021-03-18 Loftyquicklogic: PolarPro 3 support
2021-03-17 gatecatBlackbox all whiteboxes after synthesis
2021-03-11 whitequarkMerge pull request #2642 from whitequark/cxxrtl-noproc...
2021-03-09 whitequarkMerge pull request #2643 from zachjs/fix-param-no-defau...
2021-03-08 Marcelina Kościelnickamemory_dff: Remove now-useless write port handling. working-ls180
2021-03-01 Claire XenMerge pull request #2523 from tomverbeure/define_synthesis
2021-03-01 Claire XenMerge pull request #2524 from bkbncn/patch-1
2021-02-25 whitequarkMerge pull request #2554 from hzeller/master
2021-02-24 Marcelina KościelnickaFix syntax error in adff2dff.v
2021-02-23 whitequarkMerge pull request #2594 from zachjs/func-arg-width
2021-02-23 William D. Jonesmachxo2: Switch to LUT4 sim model which propagates...
2021-02-23 William D. Jonesmachxo2: Add experimental status to help.
2021-02-23 William D. Jonesmachxo2: Add DCCA and DCMA blackbox primitives.
2021-02-23 William D. Jonesmachxo2: Fix reversed interpretation of REG_SD config...
2021-02-23 William D. Jonesmachxo2: Tristate is active-low.
2021-02-23 William D. Jonesmachxo2: Fix typos in FACADE_FF sim model.
2021-02-23 William D. Jonesmachxo2: Fix naming of TRELLIS_IO ports to match PIO...
2021-02-23 William D. Jonesmachxo2: Improve help_mode output in synth_machxo2.
2021-02-23 William D. Jonesmachxo2: Use attrmvcp pass to move LOC and src attribut...
2021-02-23 William D. Jonesmachxo2: Add missing OSCH oscillator primitive.
2021-02-23 William D. Jonesmachxo2: Add -noiopad option to synth_machxo2.
2021-02-23 William D. Jonesmachxo2: Use correct INITVAL for LUT1 in FACADE_SLICE.
2021-02-23 William D. Jonesmachxo2: Fix cells_sim typo where OFX1 was multiply...
2021-02-23 William D. Jonesmachxo2: synth_machxo2 now maps ports to FACADE_IO.
2021-02-23 William D. Jonesmachxo2: Add initial value for Q in FACADE_FF.
2021-02-23 William D. Jonesmachxo2: Add FACADE_IO simulation model. More comments...
2021-02-23 William D. Jonesmachxo2: Add FACADE_SLICE simulation model.
2021-02-23 William D. Jonesmachxo2: Improve FACADE_FF simulation model.
2021-02-23 William D. Jonesmachxo2: Improve LUT4 techmap. Use same output port...
2021-02-23 William D. Jonesmachxo2: Add dff.ys test, fix another cells_map.v typo.
2021-02-23 William D. Jonesmachxo2: Fix more oversights in machxo2 models. logic...
2021-02-23 William D. Jonesmachxo2: Fix typos. test/arch/run-test.sh passes.
2021-02-23 William D. Jonesmachxo2: Create basic techlibs and synth_machxo2 pass.
2021-02-15 Claire XenMerge pull request #2574 from dh73/master
2021-02-12 gatecatMerge pull request #2585 from YosysHQ/dave/nexus-dotproduct
2021-02-04 whitequarkMerge pull request #2529 from zachjs/unnamed-genblk
2021-02-03 whitequarkMerge pull request #2436 from dalance/fix_generate
2021-01-31 Zachary Snowverilog: significant block scoping improvements
2021-01-29 whitequarkMerge pull request #2564 from whitequark/flatten-improv...
2021-01-28 Claire XenMerge pull request #2535 from Ravenslofty/scc-specify
2021-01-26 Marcelina Kościelnickaxilinx_dffopt: Don't crash on missing IS_*_INVERTED.
2021-01-26 Marcelina Kościelnickaxilinx: Add FDRSE_1, FDCPE_1.
2021-01-04 whitequarkMerge pull request #2522 from tomverbeure/simlib_typos2
2021-01-04 Tom VerbeureFix some trivial typos.
2021-01-01 whitequarkMerge pull request #2480 from YosysHQ/dave/nexus-lram
2020-12-23 whitequarkMerge pull request #2476 from zachjs/const-arg-width
2020-12-22 whitequarkMerge pull request #2497 from whitequark/cxxrtl-reflow
2020-12-22 whitequarkMerge pull request #2479 from zachjs/const-arg-hint
2020-12-22 whitequarkMerge pull request #2491 from zachjs/port-bind-sign
2020-12-21 Marcelina Kościelnickaxilinx: Add some missing blackbox cells.
2020-12-21 Marcelina Kościelnickaxilinx: Regenerate cells_xtra.v using Vivado 2020.2
2020-12-19 whitequarkMerge pull request #2487 from whitequark/cxxrtl-outlining
2020-12-17 Marcelina Kościelnickaxilinx: Add FDDRCPE and FDDRRSE blackbox cells.
2020-12-08 David Shahnexus: Add MULTADDSUB9X9WIDE sim model
2020-12-07 David Shahnexus: Add LRAM inference
2020-12-02 whitequarkMerge pull request #2468 from whitequark/cxxrtl-assert
2020-12-02 whitequarkMerge pull request #2469 from whitequark/cxxrtl-no-clk
2020-12-02 whitequarkMerge pull request #2466 from whitequark/cxxrtl-reset
2020-12-02 whitequarkMerge pull request #2456 from Zottel/master
2020-12-02 whitequarkMerge pull request #2455 from gsomlo/gls-fedpkg-fixes
2020-12-02 David ShahMerge pull request #2467 from YosysHQ/dave/nexus-carry-fix
2020-12-02 whitequarkMerge pull request #2446 from RobertBaruch/rtlil_format
2020-12-02 David Shahnexus: More efficient CO mapping
2020-12-01 Claire XenMerge pull request #2463 from georgerennie/fix_verilog_...
2020-12-01 Miodrag MilanovićMerge pull request #2460 from pepijndevos/simple-gowin
2020-11-30 Pepijn de Vosadd -noalu and -json option for apicula
2020-11-25 whitequarkMerge pull request #2452 from whitequark/rtlil-remove...
2020-11-25 Claire XenMerge pull request #2133 from dh73/nodev_head
2020-11-25 whitequarkMerge pull request #2442 from cr1901/sccache
2020-11-24 whitequarkMerge pull request #2428 from whitequark/check-processes
2020-11-24 Miodrag MilanovićMerge pull request #2295 from epfl-vlsc/firrtl_blackbox...
2020-11-20 Miodrag MilanovićMerge pull request #2443 from YosysHQ/dave/nexus-mult...
2020-11-20 David Shahnexus: DSP inference support
2020-11-18 Miodrag MilanovićMerge pull request #2441 from YosysHQ/dave/nexus_dsp_sim
2020-11-18 David Shahnexus: Add DSP simulation model
2020-11-18 Miodrag MilanovicFix duplicated parameter name typo
2020-11-16 Miodrag MilanovićMerge pull request #2438 from kbeckmann/gowin_rpll
2020-11-11 Konrad Beckmannsynth_gowin: Add rPLL blackbox
2020-10-22 David Shahnexus: Add make_transp to BRAMs
2020-10-22 N. EngelhardtMerge pull request #2403 from nakengelhardt/sim_timescale
2020-10-20 clairexenMerge pull request #2405 from byuccl/fix_xilinx_cells
2020-10-19 Jeff GoedersMove signal declarations to before first use
2020-10-19 Miodrag MilanovićMerge pull request #2397 from daveshah1/nexus
2020-10-15 David Shahsynth_nexus: Initial implementation
2020-10-01 clairexenMerge pull request #2378 from udif/pr_dollar_high_low
2020-10-01 clairexenMerge pull request #2380 from Xiretza/parallel-tests
2020-09-23 Eddie Hung xilinx: do not make DSP48E1 a whitebox for ABC9 by...
2020-09-17 clairexenMerge pull request #2329 from antmicro/arrays-fix-multi...
2020-09-17 clairexenMerge pull request #2330 from antmicro/arrays-fix-multi...
2020-09-01 clairexenMerge pull request #2352 from zachjs/const-func-localparam
2020-09-01 clairexenMerge pull request #2366 from zachjs/library-format
2020-09-01 clairexenMerge pull request #2353 from zachjs/top-scope
2020-09-01 clairexenMerge pull request #2365 from zachjs/const-arg-loop...
2020-08-28 Dan Ravensloftintel_alm: better map wide but shallow multiplies
2020-08-27 whitequarkMerge pull request #2357 from whitequark/cxxflags-MP
2020-08-27 whitequarkMerge pull request #2356 from whitequark/flatten-techma...
2020-08-27 whitequarkMerge pull request #2358 from whitequark/rename-ilang...
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