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soc/integration/csr_bridge: use registered version only when SDRAM is present.
[litex.git]
/
test
/
test_packet.py
2019-11-20
enjoy-digital
Merge pull request #309 from antmicro/mmcm-fix
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2019-11-16
Florent Kermarrec
test/test_packet: add randomness on ready output, fix...
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2019-11-16
Florent Kermarrec
test/test_packet: add randomness on valid input, fix...
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2019-11-15
Florent Kermarrec
test/test_packet: add 32/64/128-bit loopback tests...
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2019-11-15
Florent Kermarrec
test/test_packet: prepare for testing dw > 8-bit
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2019-11-15
Florent Kermarrec
test: add initial test_packet
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