adding more tests
[nmigen.git] / tests /
2022-05-20 Jacob Lifshayadding more tests smtlib2-expr-support
2022-05-20 Jacob Lifshaymake assertFormal work with smtlib2 types other than...
2022-05-20 Jacob Lifshayworking on implementing smtlib2
2022-05-20 Jacob LifshayMerge branch 'add-missing-prst-pins' into smtlib2-expr...
2022-05-20 Jacob Lifshayadd missing *_prst pins
2021-12-31 Iridessim.pysim: use "bench" as a top level root for testbenc...
2021-12-31 modwizcodesim: represent time internally as 1ps units
2021-12-31 whitequarkbuild.dsl: check type of resource number.
2021-12-31 whitequarksim.core: warn when driving a clock domain not in the...
2021-12-31 whitequarkhdl.ir: reject elaboratables that elaborate to themselves.
2021-12-31 whitequarksim._pyrtl: reject very large values.
2021-12-31 whitequarksim.pysim: refuse to write VCD files with whitespace...
2021-12-31 whitequarkhdl.ast: support division and modulo with negative...
2021-12-31 whitequarkhdl.ast: warn on bare integer value used in Cat()/Repl().
2021-12-31 whitequark_utils: don't crash trying to flatten() strings.
2021-12-31 whitequarkhdl.ast: improve interaction of ValueCastable with...
2021-12-31 luke leightonMerge branch 'update_to_2021oct08' into 'master'
2021-12-31 luke leightonMerge branch 'master' into 'update_to_2021oct08'
2021-12-31 whitequarkhdl.ast: simplify Mux implementation.
2021-12-31 whitequarkhdl.ast: add tests for casting bare integers in {Cat...
2021-12-31 Robin Ole Heinemanntest.test_hdl_ast.OperatorTestCase: remove duplicate...
2021-12-31 Robin Ole Heinemanntests: rename tests with duplicate names
2021-12-31 Robin Ole Heinemanntests.test_hdl_cd.ClockDomainTestCase.test_name: actual...
2021-12-31 Robin Ole Heinemann*: remove unused imports
2021-12-31 Thomas Watsontests.hdl.dsl: add tests for mis-nested Switch/Case...
2021-12-31 Thomas Watsonhdl.dsl: raise SyntaxError for mis-nested If/Elif/Else...
2021-12-31 whitequarkhdl.ast: handle int subclasses as slice start/stop...
2021-12-31 Robin Ole Heinemannlib.fifo.AsyncFIFOBuffered: fix output register accounting
2021-12-31 Robin Ole Heinemannlib.fifo.AsyncFIFOBuffered: fix FFSynchronizer latency
2021-12-31 Robin Ole Heinemannlib.fifo: use proper clock domains in AsyncFIFO tests
2021-12-31 whitequarkhdl.ast: normalize case values to two's complement...
2021-12-31 awyglenmigen.hdl.rec: restore Record.shape().
2021-12-31 Marcelina Kościelnickasim._pyrtl: mask Mux selection operand.
2021-12-31 whitequarkbuild.plat: TemplatedPlatform.iter_extra_files→Platform...
2021-12-31 awyglehdl.rec: proxy operators correctly.
2021-12-31 whitequarkhdl.ast: deprecate UserValue in favor of ValueCastable.
2021-12-31 whitequarkCI: run testsuite with -Werror.
2021-12-31 awyglehdl.rec: migrate Record from UserValue to ValueCastable.
2021-12-31 awyglehdl.ast: implement ValueCastable.
2021-12-31 Jaro Habigerlib.fifo: fix {r,w}_level in AsyncFIFOBuffered
2021-12-31 Jaro Habigerlib.fifo: fix level on fifo full
2021-12-31 Robin Ole Heinemannlib.fifo.AsyncFFSynchronizer: check input and output...
2021-12-31 whitequarkbuild.dsl: clean up inversion logic.
2021-12-31 anuejnlib.fifo.AsyncFIFO: fix incorrect latency of r_level.
2021-12-31 anuejntests: make spec directory name unique per test method.
2021-12-31 whitequarksim._pyrtl: sign extend RHS of assignment.
2021-12-31 whitequarkhdl.dsl: error on Elif immediately nested in an If.
2021-12-31 Xiretzahdl.ir: Update error message for Instance arguments
2021-12-31 whitequarktests: keep comments up to date. NFC.
2021-12-31 whitequarksim: split into base, core, and engines.
2021-12-31 whitequark_toolchain.cxx: new toolchain.
2021-12-31 whitequarkhdl.ast: clarify exception message for out of bounds...
2021-12-31 whitequarktests: move out of the main package.