Shriya Sharma [Wed, 29 Nov 2023 15:48:21 +0000 (15:48 +0000)]
Added English language description for Negate instruction
Shriya Sharma [Wed, 29 Nov 2023 11:23:11 +0000 (11:23 +0000)]
Added English language description for addze instruction
Shriya Sharma [Wed, 29 Nov 2023 11:22:24 +0000 (11:22 +0000)]
Added English language description for subfze instruction
Shriya Sharma [Wed, 29 Nov 2023 11:19:38 +0000 (11:19 +0000)]
Added English language description for addex instruction
Shriya Sharma [Fri, 24 Nov 2023 20:44:27 +0000 (20:44 +0000)]
added english language description for Subtract from Minus One Extended instruction
Shriya Sharma [Fri, 24 Nov 2023 20:43:24 +0000 (20:43 +0000)]
added english language description for Add to Minus One Extended instruction
Shriya Sharma [Fri, 24 Nov 2023 20:41:49 +0000 (20:41 +0000)]
added english language description for Subtract From Extended instruction
Shriya Sharma [Fri, 24 Nov 2023 20:32:39 +0000 (20:32 +0000)]
added english language description for Add Extended instruction
Shriya Sharma [Wed, 22 Nov 2023 14:32:44 +0000 (14:32 +0000)]
Added English language description for sub from carrying instruction
Shriya Sharma [Wed, 22 Nov 2023 14:18:58 +0000 (14:18 +0000)]
Added English language description for add carrying instruction
Shriya Sharma [Wed, 22 Nov 2023 14:18:03 +0000 (14:18 +0000)]
Added English language description for subfic instruction
Shriya Sharma [Wed, 22 Nov 2023 14:17:03 +0000 (14:17 +0000)]
Added English language description for addic instruction
Shriya Sharma [Wed, 22 Nov 2023 14:13:45 +0000 (14:13 +0000)]
Added English language description for addic instruction
Shriya Sharma [Wed, 22 Nov 2023 14:12:02 +0000 (14:12 +0000)]
Added English language description for add, subtract form instruction
Shriya Sharma [Wed, 22 Nov 2023 14:10:23 +0000 (14:10 +0000)]
Added English language description for addi, addis and addpcis instruction
Shriya Sharma [Wed, 22 Nov 2023 14:05:30 +0000 (14:05 +0000)]
Added English language description for cbsdtd instruction
Shriya Sharma [Wed, 22 Nov 2023 14:03:58 +0000 (14:03 +0000)]
Added English language description for addg6s instruction
Shriya Sharma [Wed, 22 Nov 2023 14:02:28 +0000 (14:02 +0000)]
Added English language description for cdtbcd instruction
Shriya Sharma [Wed, 22 Nov 2023 11:04:46 +0000 (11:04 +0000)]
paranthesized the instructions in pifpstore files
Shriya Sharma [Wed, 22 Nov 2023 10:59:41 +0000 (10:59 +0000)]
paranthesized lfsupsx and lfdupsx instructions
Shriya Sharma [Tue, 21 Nov 2023 12:47:38 +0000 (12:47 +0000)]
Added brackets for lwasux instruction in the fixedloadshift.mdwm file
Shriya Sharma [Tue, 21 Nov 2023 12:40:54 +0000 (12:40 +0000)]
Added brackets for stdsux instruction in the fixedloadshift.mdwm file
Shriya Sharma [Tue, 21 Nov 2023 12:39:55 +0000 (12:39 +0000)]
Added brackets for fixedloadshift.mdwm file
Shriya Sharma [Tue, 21 Nov 2023 12:34:16 +0000 (12:34 +0000)]
Added brackets for fixedloadshift.mdwm file
Shriya Sharma [Tue, 21 Nov 2023 12:28:24 +0000 (12:28 +0000)]
Added brackets for fixedstoreshift.mdwm file
Shriya Sharma [Tue, 21 Nov 2023 12:26:06 +0000 (12:26 +0000)]
Added brackets for pifploadshift.mdwm file
Shriya Sharma [Tue, 21 Nov 2023 12:25:16 +0000 (12:25 +0000)]
Added brackets for pifixedloadshift.mdwm file
Shriya Sharma [Tue, 21 Nov 2023 12:23:50 +0000 (12:23 +0000)]
Added brackets for pifixedstoreshift.mdwm file
Luke Kenneth Casson Leighton [Mon, 20 Nov 2023 15:03:10 +0000 (15:03 +0000)]
sum RA+RB<<sh not RA<<sh+RB
https://bugs.libre-soc.org/show_bug.cgi?id=1055
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 15:42:07 +0000 (15:42 +0000)]
add Z-23 to RT FRS FRT
Shriya Sharma [Fri, 17 Nov 2023 15:38:47 +0000 (15:38 +0000)]
Added English language description for stdupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:38:13 +0000 (15:38 +0000)]
Added English language description for sthupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:36:11 +0000 (15:36 +0000)]
Added English language description for sthupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:35:39 +0000 (15:35 +0000)]
Added English language description for stbupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:34:20 +0000 (15:34 +0000)]
Added English language description for ldupsx instruction
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 15:30:33 +0000 (15:30 +0000)]
add RS/FRT/FRS to Z-23 Form for ls004
https://bugs.libre-soc.org/show_bug.cgi?id=1055
Shriya Sharma [Fri, 17 Nov 2023 15:33:42 +0000 (15:33 +0000)]
Added English language description for lwaupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:32:56 +0000 (15:32 +0000)]
Added English language description for lwzupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:32:18 +0000 (15:32 +0000)]
Added English language description for lhaupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:31:08 +0000 (15:31 +0000)]
Added English language description for lhzupsx instruction
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 15:27:48 +0000 (15:27 +0000)]
change ld/st shift to Z23-Form
Shriya Sharma [Fri, 17 Nov 2023 15:29:12 +0000 (15:29 +0000)]
Added English language description for lfdupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:27:31 +0000 (15:27 +0000)]
Added English language description for lbzupsx instruction
Shriya Sharma [Fri, 17 Nov 2023 15:24:36 +0000 (15:24 +0000)]
Added English language description for stfdux instruction
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 15:20:37 +0000 (15:20 +0000)]
add comment/header on ld/st shift instructions
Shriya Sharma [Fri, 17 Nov 2023 13:11:09 +0000 (13:11 +0000)]
Test case (all same nos) for maxloc
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 13:02:10 +0000 (13:02 +0000)]
add asserts to check results
Luke Kenneth Casson Leighton [Fri, 17 Nov 2023 13:01:22 +0000 (13:01 +0000)]
whitespace
Shriya Sharma [Fri, 17 Nov 2023 12:02:01 +0000 (12:02 +0000)]
Test case (all zeroes) for maxloc
Jacob Lifshay [Thu, 16 Nov 2023 03:31:32 +0000 (19:31 -0800)]
msr and svstate default to None in TestCase, they're replaced with actual values in ISACaller
Luke Kenneth Casson Leighton [Wed, 15 Nov 2023 14:34:38 +0000 (14:34 +0000)]
no point defining nm=-1
Luke Kenneth Casson Leighton [Wed, 15 Nov 2023 14:33:03 +0000 (14:33 +0000)]
add 2nd maxloc case
Luke Kenneth Casson Leighton [Wed, 15 Nov 2023 14:18:20 +0000 (14:18 +0000)]
move maxloc to isacaller directory
Luke Kenneth Casson Leighton [Wed, 15 Nov 2023 14:17:09 +0000 (14:17 +0000)]
python conversion of maxloc.c
Jacob Lifshay [Thu, 9 Nov 2023 02:27:34 +0000 (18:27 -0800)]
add TRAP docs
Jacob Lifshay [Tue, 7 Nov 2023 04:54:52 +0000 (20:54 -0800)]
misc fixes for fallout of copying insn inputs
Jacob Lifshay [Tue, 7 Nov 2023 04:38:18 +0000 (20:38 -0800)]
System Call Interrupts do *not* set SRR1[TRAP]
See PowerISA v3.1B Book III 7.5.14
Jacob Lifshay [Tue, 7 Nov 2023 04:37:07 +0000 (20:37 -0800)]
support TRAP being called without setting a trap_bit
Jacob Lifshay [Tue, 7 Nov 2023 04:54:05 +0000 (20:54 -0800)]
only write outputs that have .ok == True
Jacob Lifshay [Tue, 7 Nov 2023 04:49:19 +0000 (20:49 -0800)]
use create_full_args to generate insn arg list
Jacob Lifshay [Tue, 7 Nov 2023 04:46:03 +0000 (20:46 -0800)]
add SelectableInt.ok
Jacob Lifshay [Tue, 7 Nov 2023 04:43:13 +0000 (20:43 -0800)]
helper for one-source-of-truth for insn argument list for ISACaller and parser
Jacob Lifshay [Tue, 7 Nov 2023 04:41:11 +0000 (20:41 -0800)]
copy_assign_rhs must retain subclasses of SelectableInt
Jacob Lifshay [Mon, 6 Nov 2023 02:14:29 +0000 (18:14 -0800)]
log load/stores to InstrInOuts
Jacob Lifshay [Thu, 2 Nov 2023 01:36:10 +0000 (18:36 -0700)]
format code
Jacob Lifshay [Wed, 1 Nov 2023 05:50:40 +0000 (22:50 -0700)]
misc AST correctness fixes
Luke Kenneth Casson Leighton [Tue, 14 Nov 2023 11:58:09 +0000 (11:58 +0000)]
fix maxloc
Luke Kenneth Casson Leighton [Wed, 8 Nov 2023 20:25:09 +0000 (20:25 +0000)]
add debug print
Luke Kenneth Casson Leighton [Wed, 8 Nov 2023 20:21:42 +0000 (20:21 +0000)]
whoole stack of whitespace corrections
Luke Kenneth Casson Leighton [Wed, 8 Nov 2023 20:17:54 +0000 (20:17 +0000)]
more crap removed
Luke Kenneth Casson Leighton [Wed, 8 Nov 2023 20:14:32 +0000 (20:14 +0000)]
remove unnecessary cruft from Makefile
Andrey Miroshnikov [Wed, 8 Nov 2023 16:37:57 +0000 (16:37 +0000)]
Removed unused include: bug #676
Andrey Miroshnikov [Wed, 8 Nov 2023 16:17:59 +0000 (16:17 +0000)]
Adding fortran C example for Shriya, bug #676
Jacob Lifshay [Mon, 6 Nov 2023 03:07:57 +0000 (19:07 -0800)]
rename all load/store update-shifted-post-increment to *upsx
https://bugs.libre-soc.org/show_bug.cgi?id=1048#c21
Jacob Lifshay [Mon, 6 Nov 2023 02:20:42 +0000 (18:20 -0800)]
fix instruction name conflicts
Jacob Lifshay [Mon, 6 Nov 2023 02:18:08 +0000 (18:18 -0800)]
remove lhaup from pifixedloadshift -- all pi-shift instructions are indexed X-Form rather than D-Form
Jacob Lifshay [Mon, 6 Nov 2023 02:15:03 +0000 (18:15 -0800)]
detect duplicate instructions
Luke Kenneth Casson Leighton [Mon, 6 Nov 2023 02:46:09 +0000 (02:46 +0000)]
rename pifpstore instructions, add "p" into names
Luke Kenneth Casson Leighton [Thu, 2 Nov 2023 07:27:50 +0000 (07:27 +0000)]
use of the word "Kind" is too irritating. replace all occurrences with "Type".
cannot replace lowercase "kind" with "type" as it is a python keyword.
have to think of a better (*short*) argument name
Luke Kenneth Casson Leighton [Thu, 2 Nov 2023 07:14:58 +0000 (07:14 +0000)]
comment on rfid doing a swap-backup of the program, must find
out why and fix it so that is not necessary
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 14:46:12 +0000 (15:46 +0100)]
add LSHIFT and RSHIFT operators to parser. reluctantly
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 14:45:52 +0000 (15:45 +0100)]
look for and allow blank lines in pseudocode as well
as english description. remove use of regex (too complex to understand)
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 14:31:12 +0000 (15:31 +0100)]
missing colon on end of "Description"
Luke Kenneth Casson Leighton [Fri, 27 Oct 2023 14:00:43 +0000 (15:00 +0100)]
remove use of regex (this code is REQUIRED to be SIMPLE)
Jacob Lifshay [Thu, 26 Oct 2023 22:44:27 +0000 (15:44 -0700)]
move DEFAULT_MSR handling from add_case to ISACaller
Dmitry Selyutin [Wed, 25 Oct 2023 19:49:11 +0000 (22:49 +0300)]
syscall: improve architecture detection
Jacob Lifshay [Wed, 25 Oct 2023 03:18:48 +0000 (20:18 -0700)]
install pytest-subtests==0.11.0
Jacob Lifshay [Wed, 25 Oct 2023 03:18:27 +0000 (20:18 -0700)]
generate syscalls.json
Luke Kenneth Casson Leighton [Tue, 24 Oct 2023 17:16:06 +0000 (18:16 +0100)]
whitespace cleanup
Jacob Lifshay [Fri, 20 Oct 2023 01:57:00 +0000 (18:57 -0700)]
Revert "skip broken test"
requested by luke:
https://bugs.libre-soc.org/show_bug.cgi?id=1193#c1
This reverts commit
e0a4f19b2c90be84a77a4aa584c6d60e508d92f5.
Jacob Lifshay [Fri, 20 Oct 2023 01:18:51 +0000 (18:18 -0700)]
Revert "Revert "fix bug where pseudo-code assignments modify more than just the variable being assigned to""
we need copy_assign_rhs
See https://bugs.libre-soc.org/show_bug.cgi?id=1066
This reverts commit
bd3b54e83101217dc32da09083c6a3858fd7c600.
Jacob Lifshay [Fri, 20 Oct 2023 01:17:20 +0000 (18:17 -0700)]
Revert "fix bug introduced by having to revert unauthorized addition of"
we need copy_assign_rhs
See https://bugs.libre-soc.org/show_bug.cgi?id=1066
This reverts commit
9dab88318a2938f14873804d83bf85ef9ae2fb93.
Jacob Lifshay [Fri, 20 Oct 2023 01:00:55 +0000 (18:00 -0700)]
skip broken test
it wasn't obvious how to fix it, see https://bugs.libre-soc.org/show_bug.cgi?id=1193
Jacob Lifshay [Fri, 20 Oct 2023 00:49:04 +0000 (17:49 -0700)]
fill in manually verified expected state for TrapTestCase.case_2_kaivb_test
based on the Programming Note on left side of PowerISA v3.1B page 1289 (1315)
Jacob Lifshay [Fri, 20 Oct 2023 00:37:34 +0000 (17:37 -0700)]
format code
Jacob Lifshay [Mon, 23 Oct 2023 23:09:51 +0000 (16:09 -0700)]
reduce mmap BLOCK_SIZE to 1 << 28 so it works on armv7a
Dmitry Selyutin [Mon, 23 Oct 2023 20:32:57 +0000 (23:32 +0300)]
syscall: handle architecture aliases
Dmitry Selyutin [Mon, 23 Oct 2023 20:23:08 +0000 (23:23 +0300)]
syscall: handle arm and aarch64 architectures
Dmitry Selyutin [Mon, 23 Oct 2023 06:17:55 +0000 (09:17 +0300)]
test_syscall: hardcode MSR validation
Dmitry Selyutin [Sun, 22 Oct 2023 13:14:55 +0000 (16:14 +0300)]
test_syscall: check MSR; update expected PC