From 1ec40c7408c1357fcff904a7043f81aea9dcc281 Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 14 Apr 2022 16:16:37 +0100
Subject: [PATCH] wrap QSPI exploration in SYSCON check for QSPI

---
 coldboot/coldboot.c | 96 +++++++++++++++++++++++----------------------
 1 file changed, 50 insertions(+), 46 deletions(-)

diff --git a/coldboot/coldboot.c b/coldboot/coldboot.c
index f2cbbf3..260974b 100644
--- a/coldboot/coldboot.c
+++ b/coldboot/coldboot.c
@@ -260,61 +260,65 @@ int main(void) {
 
 #if 1
 #if 1
-    // print out configuration parameters for QSPI
-	volatile uint32_t *qspi_cfg = (uint32_t*)SPI_FCTRL_BASE;
-    for (int k=0; k < 2; k++) {
-        tmp = readl((unsigned long)&(qspi_cfg[k]));
-        puts("cfg");
-        uart_writeuint32(k);
-        puts(" ");
-        uart_writeuint32(tmp);
-        puts("\n");
+    if (ftr & SYS_REG_INFO_HAS_SPI_FLASH) {
+        // print out configuration parameters for QSPI
+        volatile uint32_t *qspi_cfg = (uint32_t*)SPI_FCTRL_BASE;
+        for (int k=0; k < 2; k++) {
+            tmp = readl((unsigned long)&(qspi_cfg[k]));
+            puts("cfg");
+            uart_writeuint32(k);
+            puts(" ");
+            uart_writeuint32(tmp);
+            puts("\n");
+        }
     }
 #endif
-	volatile uint32_t *qspi = (uint32_t*)SPI_FLASH_BASE+0x600000;
-    //volatile uint8_t *qspi_bytes = (uint8_t*)spi_offs;
-     // let's not, eh? writel(0xDEAF0123, (unsigned long)&(qspi[0]));
-     // tmp = readl((unsigned long)&(qspi[0]));
-    for (int i=0;i<256;i++) {
-      tmp = readl((unsigned long)&(qspi[i]));
-      uart_writeuint32(tmp);
-      puts(" ");
-      if ((i & 0x7) == 0x7) puts("\r\n");
-    }
-    puts("\r\n");
-    /*
-    for (i=0;i<256;i++) {
-      tmp = readb((unsigned long)&(qspi_bytes[i]));
-      uart_writeuint32(tmp);
-      puts(" ");
-    }
-    */
+    if (ftr & SYS_REG_INFO_HAS_SPI_FLASH) {
+        volatile uint32_t *qspi = (uint32_t*)SPI_FLASH_BASE+0x600000;
+        //volatile uint8_t *qspi_bytes = (uint8_t*)spi_offs;
+         // let's not, eh? writel(0xDEAF0123, (unsigned long)&(qspi[0]));
+         // tmp = readl((unsigned long)&(qspi[0]));
+        for (int i=0;i<256;i++) {
+          tmp = readl((unsigned long)&(qspi[i]));
+          uart_writeuint32(tmp);
+          puts(" ");
+          if ((i & 0x7) == 0x7) puts("\r\n");
+        }
+        puts("\r\n");
+        /*
+        for (i=0;i<256;i++) {
+          tmp = readb((unsigned long)&(qspi_bytes[i]));
+          uart_writeuint32(tmp);
+          puts(" ");
+        }
+        */
 #if 0
-    while (1) {
-        // quick read
-        tmp = readl((unsigned long)&(qspi[0x1000/4]));
-        puts("read 0x1000");
-        uart_writeuint32(tmp);
-        putchar(10);
-    }
-    while (1) {
-        unsigned char c = getchar();
-        putchar(c);
-        if (c == 13) { // if CR send LF
-
+        while (1) {
             // quick read
-            tmp = readl((unsigned long)&(qspi[1<<i]));
-            puts("read ");
-            uart_writeuint32(1<<i);
-            puts(" ");
+            tmp = readl((unsigned long)&(qspi[0x1000/4]));
+            puts("read 0x1000");
             uart_writeuint32(tmp);
             putchar(10);
-            i++;
         }
-    }
+        while (1) {
+            unsigned char c = getchar();
+            putchar(c);
+            if (c == 13) { // if CR send LF
+
+                // quick read
+                tmp = readl((unsigned long)&(qspi[1<<i]));
+                puts("read ");
+                uart_writeuint32(1<<i);
+                puts(" ");
+                uart_writeuint32(tmp);
+                putchar(10);
+                i++;
+            }
+        }
 
-    return 0;
+        return 0;
 #endif
+    }
 #endif
 #if 0
 	volatile uint32_t *hyperram = (uint32_t*)0xa0000000;
-- 
2.30.2