From 3198081936cde0efa0934a3948b9f14023cf436a Mon Sep 17 00:00:00 2001 From: Daniel Benusovich Date: Sun, 21 Apr 2019 13:45:41 -0700 Subject: [PATCH] Add external access to table size to plru --- TLB/src/ariane/plru.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/TLB/src/ariane/plru.py b/TLB/src/ariane/plru.py index c8b26031..50951c1f 100644 --- a/TLB/src/ariane/plru.py +++ b/TLB/src/ariane/plru.py @@ -22,8 +22,8 @@ class PLRU: self.replace_en_o = Signal(entries) self.lu_access_i = Signal() # Tree (bit per entry) - TLBSZ = 2*(self.entries-1) - self.plru_tree = Signal(TLBSZ) + self.TLBSZ = 2*(self.entries-1) + self.plru_tree = Signal(self.TLBSZ) def elaborate(self, platform): m = Module() -- 2.30.2