From 345e87790bb340c4b087e62b559e8938d6eabc63 Mon Sep 17 00:00:00 2001 From: Tobias Platen Date: Tue, 23 Nov 2021 18:42:22 +0100 Subject: [PATCH] fix test_loadstore1.py --- src/soc/experiment/test/test_loadstore1.py | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/src/soc/experiment/test/test_loadstore1.py b/src/soc/experiment/test/test_loadstore1.py index 16137813..9c646b87 100644 --- a/src/soc/experiment/test/test_loadstore1.py +++ b/src/soc/experiment/test/test_loadstore1.py @@ -8,6 +8,7 @@ from nmigen.sim import Simulator, Delay, Settle from nmutil.util import wrap from soc.config.test.test_pi2ls import pi_ld, pi_st, pi_ldst, wait_busy +#from soc.config.test.test_pi2ls import pi_st_debug from soc.config.test.test_loadstore import TestMemPspec from soc.config.loadstore import ConfigMemoryPortInterface @@ -161,12 +162,14 @@ def _test_loadstore1(dut, mem): yield from wait_busy(pi, debug="pi_st_E_alignment_error") # wait is only needed in case of in exception here print("=== alignment error test passed (st) ===") + yield # IMPORTANT: wait one clock cycle after failed st + + print("=== no error ===") + addr = 0x100e0 + ld_data, exc = yield from pi_ld(pi, addr, 8, msr_pr=1) + print("ld_data",ld_data,exc) + print("=== no error done ===") - ##TODO - ##addr = 0xFF100e000 - ##ld_data, exc = yield from pi_ld(pi, addr, 8, msr_pr=1) - ##print("ld_data",ld_data,exc) - ##print("=== done ===") stop = True def test_loadstore1(): -- 2.30.2