From 347b76c4d5842e1f4898943553687d1dece6db3f Mon Sep 17 00:00:00 2001
From: Jacob Lifshay <programmerjake@gmail.com>
Date: Wed, 3 May 2023 14:34:55 -0700
Subject: [PATCH] x86 insn is shld/shrd not dsld

---
 conferences/siliconsalon2023/siliconsalon2023.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/conferences/siliconsalon2023/siliconsalon2023.tex b/conferences/siliconsalon2023/siliconsalon2023.tex
index 09782cb13..cfd2a66d5 100644
--- a/conferences/siliconsalon2023/siliconsalon2023.tex
+++ b/conferences/siliconsalon2023/siliconsalon2023.tex
@@ -241,7 +241,7 @@
 \begin{frame}[fragile]\frametitle{Draft Double-Shift}
 
  \begin{itemize}
-   \item Remarkably similar to x86 dsld
+   \item Remarkably similar to x86's shld/shrd
    \item Does not need 128-bit ROT: simple mod to existing hardware
    \item Hardware may macro-op fuse Vector-shift for better efficiency
    \item Chainable and in-place (no copy of vector needed).
-- 
2.30.2