From 6443f501b07ae5b5987db8c37fbe85035aa060e8 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 1 Aug 2018 10:07:19 +0100 Subject: [PATCH] AddingPeripherals.mdwn --- docs/AddingPeripherals.mdwn | 17 +++++++++++++++-- src/bsv/bsv_lib/soc_template.bsv | 6 ------ 2 files changed, 15 insertions(+), 8 deletions(-) diff --git a/docs/AddingPeripherals.mdwn b/docs/AddingPeripherals.mdwn index cbe2c30..e905a4a 100644 --- a/docs/AddingPeripherals.mdwn +++ b/docs/AddingPeripherals.mdwn @@ -424,8 +424,7 @@ now they are to be connected *automatically* (on the peripheral side) to the IO pads in the pinmux. However, at the time of writing this is not fully understood by the author, so the fastifdecl and extfastifinstance functions are modified to generate the correct output but the code is -*commented out*, and the corresponding manual declarations of sdram_out -removed. +*commented out* def extfastifinstance(self, name, count): return "// TODO" + self._extifinstance(name, count, "_out", "", True, @@ -435,6 +434,20 @@ removed. return "// (*always_ready*) interface " + \ "Ifc_sdram_out sdr{0}_out;".format(count) +Also the corresponding (old) manual declarations of sdram\_out +removed from the template: + + `ifdef SDRAM <-- xxxx + (*always_ready*) interface Ifc_sdram_out sdram_out; <-- xxxx + `endif <-- xxxx + ... + ... + `ifdef SDRAM <--- xxxx + interface sdram_out=sdram.ifc_sdram_out; <--- xxxx + `endif <--- xxxx + + + Next, again searching for signs of the "hand-written" code, we encounter the fabric connectivity, which wires the SDRAM to the AXI4. We note however that there is not just one AXI slave device but *two*: one for the SDRAM diff --git a/src/bsv/bsv_lib/soc_template.bsv b/src/bsv/bsv_lib/soc_template.bsv index 3d33f8e..285ef0f 100644 --- a/src/bsv/bsv_lib/soc_template.bsv +++ b/src/bsv/bsv_lib/soc_template.bsv @@ -89,9 +89,6 @@ package socgen; (*always_ready,always_enabled*) method Action boot_sequence(Bit#(1) bootseq); - `ifdef SDRAM - (*always_ready*) interface Ifc_sdram_out sdram_out; - `endif `ifdef DDR (*prefix="M_AXI"*) interface AXI4_Master_IFC#(`PADDR, `DATA, `USERSPACE) master; @@ -299,9 +296,6 @@ package socgen; `endif method Action boot_sequence(Bit#(1) bootseq) = core.boot_sequence(bootseq); - `ifdef SDRAM - interface sdram_out=sdram.ifc_sdram_out; - `endif `ifdef DDR interface master=fabric.v_to_slaves [fromInteger(valueOf(Sdram_slave_num))]; -- 2.30.2