From 81d267598a931153815db6cbf0e44f86973575aa Mon Sep 17 00:00:00 2001 From: Jean-Paul Chaput Date: Thu, 1 Jul 2021 14:03:34 +0200 Subject: [PATCH] Enable the heavy leaf load on the main clock. --- experiments9/tsmc_c018/doDesign.py | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/experiments9/tsmc_c018/doDesign.py b/experiments9/tsmc_c018/doDesign.py index 199869b..82a9720 100644 --- a/experiments9/tsmc_c018/doDesign.py +++ b/experiments9/tsmc_c018/doDesign.py @@ -20,6 +20,7 @@ from plugins.alpha.macro.macro import Macro from plugins.alpha.block.iospecs import IoSpecs from plugins.alpha.block.block import Block from plugins.alpha.block.configuration import IoPin, GaugeConf +from plugins.alpha.block.spares import Spares from plugins.alpha.core2chip.libresocio import CoreToChip from plugins.alpha.chip.configuration import ChipConf from plugins.alpha.chip.chip import Chip @@ -226,9 +227,9 @@ def scriptMain (**kw): ls180Conf.cfg.anabatic.globalIterations = 20 ls180Conf.cfg.anabatic.topRoutingLayer = 'METAL5' ls180Conf.cfg.katana.hTracksReservedLocal = 11 - ls180Conf.cfg.katana.vTracksReservedLocal = 7 + ls180Conf.cfg.katana.vTracksReservedLocal = 8 ls180Conf.cfg.katana.hTracksReservedMin = 9 - ls180Conf.cfg.katana.vTracksReservedMin = 5 + ls180Conf.cfg.katana.vTracksReservedMin = 6 ls180Conf.cfg.katana.runRealignStage = True ls180Conf.cfg.katana.trackFill = 2 ls180Conf.cfg.block.spareSide = u(7*13) @@ -249,7 +250,7 @@ def scriptMain (**kw): , 'sorbonne_logo_norm' , 'lip6_norm' ] - ls180Conf.useHTree( 'core.pll_clk' ) + ls180Conf.useHTree( 'core.pll_clk', Spares.HEAVY_LEAF_LOAD ) ls180Conf.useHTree( 'jtag_tck_from_pad' ) tiPath = 'test_issuer.ti.' -- 2.30.2