From 8a026921aa7220d989843c4400fc3b2c152576f6 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 6 May 2019 05:10:18 +0100 Subject: [PATCH] update docstrings --- src/scoreboard/ldst_dep_cell.py | 7 +++++++ src/scoreboard/ldst_matrix.py | 16 ++++++++++------ 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/src/scoreboard/ldst_dep_cell.py b/src/scoreboard/ldst_dep_cell.py index f1264bd2..ee998e91 100644 --- a/src/scoreboard/ldst_dep_cell.py +++ b/src/scoreboard/ldst_dep_cell.py @@ -1,3 +1,10 @@ +""" Mitch Alsup 6600-style LD/ST scoreboard Dependency Cell + +Relevant bugreports: +* http://bugs.libre-riscv.org/show_bug.cgi?id=81 + +""" + from nmigen.compat.sim import run_simulation from nmigen.cli import verilog, rtlil from nmigen import Module, Signal, Elaboratable diff --git a/src/scoreboard/ldst_matrix.py b/src/scoreboard/ldst_matrix.py index 563490f1..b9a197ac 100644 --- a/src/scoreboard/ldst_matrix.py +++ b/src/scoreboard/ldst_matrix.py @@ -1,15 +1,19 @@ +""" Mitch Alsup 6600-style LD/ST Memory Scoreboard Matrix (sparse vector) + +6600 LD/ST Dependency Table Matrix inputs / outputs +--------------------------------------------------- + +Relevant bugreports: +* http://bugs.libre-riscv.org/show_bug.cgi?id=81 + +""" + from nmigen.compat.sim import run_simulation from nmigen.cli import verilog, rtlil from nmigen import Module, Signal, Elaboratable, Array, Cat, Const from ldst_dep_cell import LDSTDepCell -""" - - 6600 LD/ST Dependency Table Matrix inputs / outputs - --------------------------------------------------- - -""" class LDSTDepMatrix(Elaboratable): """ implements 11.4.12 mitch alsup LD/ST Dependency Matrix, p46 -- 2.30.2