From 9b2ce502a7b2acf0a6fd9dc65868240d08d96efc Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 25 May 2021 11:32:58 +0000 Subject: [PATCH] rename PLL out to out_v in test_issuer --- experiments9/non_generated/full_core_4_4ksram_libresoc.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/experiments9/non_generated/full_core_4_4ksram_libresoc.v b/experiments9/non_generated/full_core_4_4ksram_libresoc.v index 4b619e0..17b2605 100644 --- a/experiments9/non_generated/full_core_4_4ksram_libresoc.v +++ b/experiments9/non_generated/full_core_4_4ksram_libresoc.v @@ -216847,7 +216847,7 @@ module wrappll(clk_24_i, pll_test_o, pll_vco_o, clk_sel_i, clk_pll_o); .a0(clk_sel_i[0]), .a1(clk_sel_i[1]), .div_out_test(pll_test_o), - .out(clk_pll_o), + .out_v(clk_pll_o), .\ref (clk_24_i), .vco_test_ana(pll_vco_o) ); -- 2.30.2