From afc35a74b3c08f11391a77ee9755315cf0c65f60 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 29 Mar 2019 12:14:19 +0000 Subject: [PATCH] split out addstages to separate module --- src/add/fpadd/addstages.py | 61 ++++++++++++++++++++++++++++++++ src/add/nmigen_add_experiment.py | 38 +------------------- 2 files changed, 62 insertions(+), 37 deletions(-) create mode 100644 src/add/fpadd/addstages.py diff --git a/src/add/fpadd/addstages.py b/src/add/fpadd/addstages.py new file mode 100644 index 00000000..39888148 --- /dev/null +++ b/src/add/fpadd/addstages.py @@ -0,0 +1,61 @@ +# IEEE Floating Point Adder (Single Precision) +# Copyright (C) Jonathan P Dawson 2013 +# 2013-12-12 + +from nmigen import Module, Signal, Cat, Mux, Array, Const +from nmigen.lib.coding import PriorityEncoder +from nmigen.cli import main, verilog +from math import log + +from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase, FPNumBase +from fpbase import MultiShiftRMerge, Trigger +from singlepipe import (ControlBase, StageChain, UnbufferedPipeline, + PassThroughStage) +from multipipe import CombMuxOutPipe +from multipipe import PriorityCombMuxInPipe + +from fpbase import FPState, FPID +from fpcommon.denorm import FPSCData +from fpcommon.postcalc import FPAddStage1Data +from fpadd.align import FPAddAlignSingleMod +from fpadd.add0 import (FPAddStage0Data, FPAddStage0Mod, FPAddStage0) +from fpadd.add1 import (FPAddStage1Mod, FPAddStage1) + + +class FPAddAlignSingleAdd(FPState, UnbufferedPipeline): + + def __init__(self, width, id_wid): + FPState.__init__(self, "align") + self.width = width + self.id_wid = id_wid + UnbufferedPipeline.__init__(self, self) # pipeline is its own stage + self.a1o = self.ospec() + + def ispec(self): + return FPSCData(self.width, self.id_wid) + + def ospec(self): + return FPAddStage1Data(self.width, self.id_wid) # AddStage1 ospec + + def setup(self, m, i): + """ links module to inputs and outputs + """ + + # chain AddAlignSingle, AddStage0 and AddStage1 + mod = FPAddAlignSingleMod(self.width, self.id_wid) + a0mod = FPAddStage0Mod(self.width, self.id_wid) + a1mod = FPAddStage1Mod(self.width, self.id_wid) + + chain = StageChain([mod, a0mod, a1mod]) + chain.setup(m, i) + + self.o = a1mod.o + + def process(self, i): + return self.o + + def action(self, m): + m.d.sync += self.a1o.eq(self.process(None)) + m.next = "normalise_1" + + diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py index bffd4b22..a80b5a7c 100644 --- a/src/add/nmigen_add_experiment.py +++ b/src/add/nmigen_add_experiment.py @@ -33,43 +33,7 @@ from fpadd.align import (FPAddAlignMulti, FPAddAlignMultiMod, FPNumIn2Ops, FPAddAlignSingleMod, FPAddAlignSingle) from fpadd.add0 import (FPAddStage0Data, FPAddStage0Mod, FPAddStage0) from fpadd.add1 import (FPAddStage1Mod, FPAddStage1) - - -class FPAddAlignSingleAdd(FPState, UnbufferedPipeline): - - def __init__(self, width, id_wid): - FPState.__init__(self, "align") - self.width = width - self.id_wid = id_wid - UnbufferedPipeline.__init__(self, self) # pipeline is its own stage - self.a1o = self.ospec() - - def ispec(self): - return FPSCData(self.width, self.id_wid) - - def ospec(self): - return FPAddStage1Data(self.width, self.id_wid) # AddStage1 ospec - - def setup(self, m, i): - """ links module to inputs and outputs - """ - - # chain AddAlignSingle, AddStage0 and AddStage1 - mod = FPAddAlignSingleMod(self.width, self.id_wid) - a0mod = FPAddStage0Mod(self.width, self.id_wid) - a1mod = FPAddStage1Mod(self.width, self.id_wid) - - chain = StageChain([mod, a0mod, a1mod]) - chain.setup(m, i) - - self.o = a1mod.o - - def process(self, i): - return self.o - - def action(self, m): - m.d.sync += self.a1o.eq(self.process(None)) - m.next = "normalise_1" +from fpadd.addstages import FPAddAlignSingleAdd class FPOpData: -- 2.30.2