From c12e077bc44ccb4b41330f03782ef2edce307be3 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Fri, 22 Mar 2019 18:11:41 -0700 Subject: [PATCH] add more code --- nmigen/back/pysim.pyi | 4 +-- nmigen/{cli.py => cli.pyi} | 0 nmigen/hdl/ast.pyi | 55 +++++++++++++++++++++++++++++----- nmigen/hdl/dsl.pyi | 3 +- nmigen/hdl/ir.pyi | 5 +++- nmigen/hdl/mem.pyi | 3 +- nmigen/{tools.py => tools.pyi} | 0 7 files changed, 58 insertions(+), 12 deletions(-) rename nmigen/{cli.py => cli.pyi} (100%) rename nmigen/{tools.py => tools.pyi} (100%) diff --git a/nmigen/back/pysim.pyi b/nmigen/back/pysim.pyi index e797b5f..b0254ea 100644 --- a/nmigen/back/pysim.pyi +++ b/nmigen/back/pysim.pyi @@ -1,8 +1,8 @@ -from ..hdl.ast import (Signal, Statement, Delay as Delay, +from ..hdl.ast import (Signal, Delay as Delay, Tick as Tick, Passive as Passive, Assign, Value) from typing import Any, Iterable, Generator, Union, Callable, Optional -__all__ = ["Simulator", "Delay", "Tick", "Passive", "DeadlineError"] +__all__ = ["Simulator", "Delay", "Tick", "Passive"] ProcessCommand = Union[Delay, Tick, Passive, Assign, Value] ProcessGenerator = Generator[ProcessCommand, Union[int, None], None] diff --git a/nmigen/cli.py b/nmigen/cli.pyi similarity index 100% rename from nmigen/cli.py rename to nmigen/cli.pyi diff --git a/nmigen/hdl/ast.pyi b/nmigen/hdl/ast.pyi index b978956..fbcb478 100644 --- a/nmigen/hdl/ast.pyi +++ b/nmigen/hdl/ast.pyi @@ -1,13 +1,12 @@ from abc import ABCMeta, abstractmethod -from typing import Union, Tuple, Any, Iterable, Optional, Mapping +from typing import (Union, Tuple, Any, Iterable, Optional, Mapping, overload, + List) from collections.abc import MutableSequence __all__ = [ - "Value", "Const", "C", "AnyConst", "AnySeq", "Operator", "Mux", "Part", - "Slice", "Cat", "Repl", "Array", "ArrayProxy", "Sample", "Past", "Stable", - "Rose", "Fell", "Signal", "ClockSignal", "ResetSignal", "Statement", - "Assign", "Assert", "Assume", "Switch", "Delay", "Tick", "Passive", - "ValueKey", "ValueDict", "ValueSet", "SignalKey", "SignalDict", "SignalSet" + "Value", "Const", "C", "Mux", "Cat", "Repl", "Array", "ArrayProxy", + "Signal", "ClockSignal", "ResetSignal", "Statement", "Assign", "Assert", + "Assume", "Switch", "Delay", "Tick", "Passive" ] ValueOrLiteral = Union[int, bool, 'Value'] @@ -16,7 +15,7 @@ ShapeResult = Tuple[int, bool] class Value(metaclass=ABCMeta): @staticmethod - def wrap(obj: Any) -> 'Value': + def wrap(obj: ValueOrLiteral) -> 'Value': ... def __invert__(self) -> 'Value': @@ -112,6 +111,7 @@ class Value(metaclass=ABCMeta): def bool(self) -> 'Value': ... + # noinspection PyMethodParameters def implies(premise: ValueOrLiteral, conclusion: ValueOrLiteral) -> 'Value': ... @@ -149,6 +149,7 @@ class Const(Value): C = Const +# noinspection PyPep8Naming def Mux(sel: ValueOrLiteral, val1: ValueOrLiteral, val0: ValueOrLiteral) -> Value: @@ -175,6 +176,7 @@ class Repl(Value): ... +# noinspection PyShadowingBuiltins class Signal(Value): nbits: int signed: bool @@ -272,3 +274,42 @@ class Tick(Statement): class Passive(Property): pass + + +class Array(MutableSequence): + def __init__(self, iterable: Iterable = ()): + ... + + @overload + def __getitem__(self, index: int) -> Any: + ... + + @overload + def __getitem__(self, index: Value) -> 'ArrayProxy': + ... + + def __len__(self) -> int: + ... + + def __setitem__(self, index: int, value: Any) -> None: + ... + + def __delitem__(self, index: int) -> None: + ... + + def insert(self, index: int, value: Any) -> None: + ... + + +class ArrayProxy(Value): + def __init__(self, elems: Union[Array, List[Any]], index: ValueOrLiteral): + ... + + def __getattr__(self, attr: Any) -> Any: + ... + + def __getitem__(self, index: Any) -> Any: + ... + + def shape(self) -> Tuple[int, bool]: + ... diff --git a/nmigen/hdl/dsl.pyi b/nmigen/hdl/dsl.pyi index cb22701..2806994 100644 --- a/nmigen/hdl/dsl.pyi +++ b/nmigen/hdl/dsl.pyi @@ -1,6 +1,6 @@ +# noinspection PyProtectedMember from .ast import Statement, ValueOrLiteral, Signal from typing import Iterable, Union, Any, Mapping -from contextlib import ContextDecorator __all__ = ["Module"] @@ -50,6 +50,7 @@ class FSM: ... +# noinspection PyPep8Naming class Module(_ModuleBuilderRoot): submodules: Any diff --git a/nmigen/hdl/ir.pyi b/nmigen/hdl/ir.pyi index b62b8f2..6ae482f 100644 --- a/nmigen/hdl/ir.pyi +++ b/nmigen/hdl/ir.pyi @@ -1,6 +1,7 @@ -from typing import Optional, Generator, Any, Tuple, Iterable, Union, List +from typing import Optional, Generator, Any, Tuple, Iterable, Union from .ast import Signal, Statement from .cd import ClockDomain +# noinspection PyProtectedMember from .dsl import FSM __all__ = ["Fragment", "Instance", "DriverConflict"] @@ -10,6 +11,7 @@ class DriverConflict(UserWarning): pass +# noinspection PyShadowingBuiltins class Fragment: @staticmethod def get(obj: Any, platform: Any) -> 'Fragment': @@ -73,5 +75,6 @@ class Fragment: class Instance(Fragment): + # noinspection PyShadowingBuiltins def __init__(self, type: str, **kwargs: Any): ... diff --git a/nmigen/hdl/mem.pyi b/nmigen/hdl/mem.pyi index 8ebdff0..4dc8caf 100644 --- a/nmigen/hdl/mem.pyi +++ b/nmigen/hdl/mem.pyi @@ -1,7 +1,7 @@ from typing import Optional, Iterable, List, Union from .ast import Signal, Const -__all__ = ["Memory", "ReadPort", "WritePort", "DummyPort"] +__all__ = ["Memory", "ReadPort", "WritePort"] class ReadPort: @@ -37,6 +37,7 @@ class Memory: simulate: bool = True): ... + # noinspection PyPropertyDefinition @property def init(self) -> List[int]: ... diff --git a/nmigen/tools.py b/nmigen/tools.pyi similarity index 100% rename from nmigen/tools.py rename to nmigen/tools.pyi -- 2.30.2