From c7853d0232db590cf828b8d009eb4deab817a182 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 13 May 2019 22:07:38 +0100 Subject: [PATCH] return to latch on src for oper --- src/experiment/compalu.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/experiment/compalu.py b/src/experiment/compalu.py index a240a6b4..6209ae0e 100644 --- a/src/experiment/compalu.py +++ b/src/experiment/compalu.py @@ -60,7 +60,7 @@ class ComputationUnitNoDelay(Elaboratable): # m.d.comb += self.alu.op.eq(self.oper_i) # create a latch/register for the operand - latchregister(m, self.oper_i, self.alu.op, opc_l.q) + latchregister(m, self.oper_i, self.alu.op, src_l.q) # and one for the output from the ALU data_o = Signal(self.rwid, reset_less=True) # Dest register -- 2.30.2