From f68cdfc2008ccd3b078d6d76de56435b885f7b77 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Mon, 6 Dec 2021 19:26:40 -0800 Subject: [PATCH] format code --- src/soc/fu/shift_rot/test/test_pipe_caller.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/fu/shift_rot/test/test_pipe_caller.py b/src/soc/fu/shift_rot/test/test_pipe_caller.py index ea1aba38..c0e16ba6 100644 --- a/src/soc/fu/shift_rot/test/test_pipe_caller.py +++ b/src/soc/fu/shift_rot/test/test_pipe_caller.py @@ -174,13 +174,13 @@ class TestRunner(unittest.TestCase): yield from ALUHelpers.get_xer_ca(res, alu, dec2) yield from ALUHelpers.get_int_o(res, alu, dec2) - print ("hw outputs", res) + print("hw outputs", res) yield from ALUHelpers.get_sim_int_o(sim_o, sim, dec2) yield from ALUHelpers.get_wr_sim_cr_a(sim_o, sim, dec2) yield from ALUHelpers.get_wr_sim_xer_ca(sim_o, sim, dec2) - print ("sim outputs", sim_o) + print("sim outputs", sim_o) ALUHelpers.check_cr_a(self, res, sim_o, "CR%d %s" % (cridx, code)) ALUHelpers.check_xer_ca(self, res, sim_o, code) -- 2.30.2