git.libre-soc.org Git - ls2.git/search

2022-04-09	Raptor Engineering...	Wire up missing CRG / DDR3 clock control / reset signals	commit \| commitdiff \| tree
2022-04-07	Raptor Engineering...	Update coldboot DDR3 init firmware to work with latest...	commit \| commitdiff \| tree
2022-04-07	Raptor Engineering...	Add an asm dump with source to the coldboot makefile	commit \| commitdiff \| tree
2022-04-07	Raptor Engineering...	Enable DDR3 using a 50MHz clock on Versa 85	commit \| commitdiff \| tree
2022-04-07	Raptor Engineering...	Move simulation HyperRAM pins off of DDR3 pins	commit \| commitdiff \| tree
2022-04-07	Raptor Engineering...	Fix DRAM simulation commands	commit \| commitdiff \| tree
2022-04-04	Raptor Engineering...	Fix SPI device simulation model MISO/MOSI wiring	commit \| commitdiff \| tree
2022-04-02	Raptor Engineering...	Add 10/100 MAC pins for Versa boards and enable MAC	commit \| commitdiff \| tree
2022-03-31	Raptor Engineering...	Fix Tercel QSPI master connections	commit \| commitdiff \| tree
2022-03-29	Raptor Engineering...	Add initial integration for OpenCores 10/100 Ethernet MAC	commit \| commitdiff \| tree
2022-03-28	Raptor Engineering...	Fix instructions in comment	commit \| commitdiff \| tree
2022-03-16	Raptor Engineering...	Add initial Tercel SPI controller	commit \| commitdiff \| tree