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Plumb loadstore1 input from execute1 not decode2
2020-01-14 Paul MackerrasPlumb loadstore1 input from execute1 not decode2
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2020-01-14 Paul Mackerrasexecute: Implement bypass from output of execute1 to...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2020-01-14 Paul Mackerrasexecute: Move popcnt and prty instructions into the...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2020-01-14 Paul Mackerrasexecute: Do comparisons using the main adder
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2020-01-14 Paul Mackerrasexecute1: Move EXTS* instruction back into execute1
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2020-01-14 Paul Mackerrasexecute1: Remember dest GPR, RC, OE, XER for slow operations
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2020-01-14 Paul MackerrasMake divider hang off the side of execute1
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2020-01-14 Paul MackerrasMake multiplier hang off the side of execute1
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-12-07 Paul Mackerrasdecode2: Minor cleanup
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-12-07 Paul Mackerrasdivider: Fix overflow calculation
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-12-07 Paul Mackerrasdecode1: Add OE=1 forms of add/sub, mul and div instructions
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-12-07 Paul Mackerrasexecute: Copy XER[SO] to CR for cmp[i] and cmpl[i]...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-15 Paul Mackerraswriteback: Eliminate inferred latch
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-15 Paul Mackerraswishbone_debug_master: Improve timing
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-15 Paul MackerrasRemove execute2 stage
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-15 Paul MackerrasDo sign-extension instructions in writeback instead...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-15 Paul Mackerraswriteback: Do data formatting and condition recording...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-15 Paul MackerrasImplement neg using OP_ADD
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-15 Paul Mackerrasdivider: Reduce delay in detecting 32-bit overflow
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-14 Paul Mackerrasdivider: Add an output register
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-13 Paul Mackerrascountzero: Add a testbench
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-13 Paul Mackerrascountzero: Reorganize to have fewer levels of logic...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-12 Paul Mackerrasdivider: Return 0 for invalid and overflow cases, like...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-12 Paul Mackerrasdecode2: Fix 32-bit flag passed to divider
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-08 Paul Mackerrasexecute: Consolidate count-leading/trailing-zeroes...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-07 Paul MackerrasAdd a rotate/mask/shift unit and use it in execute1
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-07 Paul MackerrasGeneralize the mul_32bit and mul_signed fields of decode_rom_t
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-04 Paul Mackerrasdecode: Avoid multiplexing from instruction reg fields...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-04 Paul MackerrasConsolidate add/subtract instructions into a single op
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-03 Paul Mackerrasdecode: Make all update-form indexed loads and stores...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-02 Paul Mackerrasdecode: Remove const fields from decode_rom_t
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-01 Paul Mackerrasdecode: Fix larx/stcx instructions to use RA_OR_ZERO...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-01 Paul Mackerrasdecode: Index minor op table with insn bits for opcode 31
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-01 Paul Mackerrasdecode: Index minor op table with insn bits for opcode 30
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-01 Paul Mackerrasdecode: Index minor op table with insn bits for opcode 19
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-01 Paul Mackerrasdecode: Start moving towards decoding by major opcode...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-10-01 Paul Mackerrasdecode: Push mtspr/mfspr register decoding down into...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-09-30 Paul Mackerrasloadstore2: Do data formatting after a register stage
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-09-27 Paul Mackerrasfpga: Add definitions for Arty A7-100 board
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-09-27 Paul Mackerrasdivider: Do absolute-value ops in divider instead of...
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-09-27 Paul Mackerrasdivider: Always compute result/sresult/d_out.write_reg_data
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-09-23 Paul MackerrasSpeed up the divider a little
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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2019-09-23 Paul MackerrasAdd a divider unit and a testbench for it
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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