projects / nmigen.git / search
| 2020-11-09 | awygle | hdl.rec: proxy operators correctly. |
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| 2020-11-06 | awygle | hdl.rec: migrate Record from UserValue to ValueCastable. |
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| 2020-11-06 | awygle | hdl.ast: implement ValueCastable. |
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| 2020-08-15 | awygle | lib.fifo: add `r_level` and `w_level` to all FIFOs |
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| 2020-07-07 | awygle | hdl.ast: don't inherit Shape from NamedTuple. |
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| 2020-04-24 | awygle | lib.fifo: add r_rst output for AsyncFIFO{,Buffered}. |
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| 2020-04-24 | awygle | hdl.ir: typecheck `convert(ports=)` more carefully. |
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| 2020-03-14 | awygle | Correctly handle resets in AsyncFIFO. |
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| 2020-03-08 | awygle | lib.cdc: extract AsyncFFSynchronizer. |
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| 2020-02-16 | awygle | nmigen.compat.genlib.cdc: add PulseSynchronizer. |
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| 2020-02-16 | awygle | nmigen.lib.cdc: port PulseSynchronizer. |
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