Add the filler setting in doDesign.py. LS180_RC6
[soclayout.git] / experiments12 /
drwxr-xr-x   ..
-rwxr-xr-x 622 Makefile
drwxr-xr-x - coriolis2
-rw-r--r-- 7365 doDesign.py
-rw-r--r-- 1188 memory.py
lrwxrwxrwx 11 mksym.sh -> ../mksym.sh
-rw-r--r-- 7 netlists.txt
-rw-r--r-- 167 spblock_512w64b8w.v
-rw-r--r-- 453 spblock_512w64b8w.vbe