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UART: actually return the pins, not just the module. We should do this for the other...
[sifive-blocks.git]
/
src
/
main
/
scala
/
devices
/
xilinxvc707pciex1
/
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..
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2170
XilinxVC707PCIeX1.scala
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XilinxVC707PCIeX1Periphery.scala
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