product = Signal(mw)
of = Overflow()
+ m.submodules.of = of
+ m.submodules.a = a
+ m.submodules.b = b
+ m.submodules.z = z
with m.FSM() as fsm:
# rounding stage
with m.State("round"):
- self.roundz(m, z, of)
+ self.roundz(m, z, of.roundz)
m.next = "corrections"
# ******