update comments

[ieee754fpu.git] / src / add / fpadd / specialcases.py

diff --git a/src/add/fpadd/specialcases.py b/src/add/fpadd/specialcases.py
index 49e05089db1288ab6b1d9651164c8ef01ad37ba2..6f9d1a08575773c3e57139c480a1b8b84ed5b677 100644 (file)
--- a/src/add/fpadd/specialcases.py
+++ b/src/add/fpadd/specialcases.py
@@ -6,8 +6,8 @@ from nmigen import Module, Signal, Cat, Const
 from nmigen.cli import main, verilog
 from math import log
 
-from fpbase import FPNumIn
-from singlepipe import UnbufferedPipeline, StageChain
+from fpbase import FPNumDecode
+from singlepipe import SimpleHandshake, StageChain
 
 from fpbase import FPState, FPID
 from fpcommon.getop import FPADDBaseData
@@ -47,12 +47,12 @@ class FPAddSpecialCasesMod:
         m.submodules.sc_out_z = self.o.z
 
         # decode: XXX really should move to separate stage
-        a1 = FPNumIn(None, self.width)
-        b1 = FPNumIn(None, self.width)
+        a1 = FPNumDecode(None, self.width)
+        b1 = FPNumDecode(None, self.width)
         m.submodules.sc_decode_a = a1
         m.submodules.sc_decode_b = b1
-        m.d.comb += [a1.decode(self.i.a),
-                     b1.decode(self.i.b),
+        m.d.comb += [a1.v.eq(self.i.a),
+                     b1.v.eq(self.i.b),
                      self.o.a.eq(a1),
                      self.o.b.eq(b1)
                     ]
@@ -64,7 +64,7 @@ class FPAddSpecialCasesMod:
         m.d.comb += m_match.eq(a1.m == b1.m)
 
         e_match = Signal(reset_less=True)
-        m.d.comb += m_match.eq(a1.e == b1.e)
+        m.d.comb += e_match.eq(a1.e == b1.e)
 
         aeqmb = Signal(reset_less=True)
         m.d.comb += aeqmb.eq(s_nomatch & m_match & e_match)
@@ -176,7 +176,7 @@ class FPAddSpecialCases(FPState):
             m.next = "denormalise"
 
 
-class FPAddSpecialCasesDeNorm(FPState, UnbufferedPipeline):
+class FPAddSpecialCasesDeNorm(FPState, SimpleHandshake):
     """ special cases: NaNs, infs, zeros, denormalised
         NOTE: some of these are unique to add.  see "Special Operations"
         https://steve.hollasch.net/cgindex/coding/ieeefloat.html
@@ -186,7 +186,7 @@ class FPAddSpecialCasesDeNorm(FPState, UnbufferedPipeline):
         FPState.__init__(self, "special_cases")
         self.width = width
         self.id_wid = id_wid
-        UnbufferedPipeline.__init__(self, self) # pipe is its own stage
+        SimpleHandshake.__init__(self, self) # pipe is its own stage
         self.out = self.ospec()
 
     def ispec(self):