update comments

[ieee754fpu.git] / src / add / fpbase.py

diff --git a/src/add/fpbase.py b/src/add/fpbase.py
index c061807c845e4f25edbc1e67a7c2442de0d9bf05..f49085921d914d600dea950d3707ab924eb0272b 100644 (file)
--- a/src/add/fpbase.py
+++ b/src/add/fpbase.py
@@ -489,8 +489,10 @@ class FPOpIn(PrevControl):
     def __init__(self, width):
         PrevControl.__init__(self)
         self.width = width
-        self.v = Signal(width)
-        self.i_data = self.v
+
+    @property
+    def v(self):
+        return self.data_i
 
     def chain_inv(self, in_op, extra=None):
         stb = in_op.stb
@@ -515,8 +517,10 @@ class FPOpOut(NextControl):
     def __init__(self, width):
         NextControl.__init__(self)
         self.width = width
-        self.v = Signal(width)
-        self.o_data = self.v
+
+    @property
+    def v(self):
+        return self.data_o
 
     def chain_inv(self, in_op, extra=None):
         stb = in_op.stb
@@ -537,7 +541,7 @@ class FPOpOut(NextControl):
                ]
 
 
-class Overflow(Elaboratable):
+class Overflow: #(Elaboratable):
     def __init__(self):
         self.guard = Signal(reset_less=True)     # tot[2]
         self.round_bit = Signal(reset_less=True) # tot[1]
@@ -580,7 +584,7 @@ class FPBase:
         """
         res = v.decode2(m)
         ack = Signal()
-        with m.If((op.ready_o) & (op.i_valid_test)):
+        with m.If((op.ready_o) & (op.valid_i_test)):
             m.next = next_state
             # op is latched in from FPNumIn class on same ack/stb
             m.d.comb += ack.eq(0)
@@ -690,11 +694,11 @@ class FPBase:
         m.d.sync += [
           out_z.v.eq(z.v)
         ]
-        with m.If(out_z.o_valid & out_z.i_ready_test):
-            m.d.sync += out_z.o_valid.eq(0)
+        with m.If(out_z.valid_o & out_z.ready_i_test):
+            m.d.sync += out_z.valid_o.eq(0)
             m.next = next_state
         with m.Else():
-            m.d.sync += out_z.o_valid.eq(1)
+            m.d.sync += out_z.valid_o.eq(1)
 
 
 class FPState(FPBase):