update comments

[ieee754fpu.git] / src / add / test_add64.py

diff --git a/src/add/test_add64.py b/src/add/test_add64.py
index 71570f53d985580784cdf4a99d720f392cfd3ba9..dcca12c62dbd7d59a583fcd411686b1cd7483427 100644 (file)
--- a/src/add/test_add64.py
+++ b/src/add/test_add64.py
@@ -12,7 +12,7 @@ from random import seed
 from unit_test_double import (get_mantissa, get_exponent, get_sign, is_nan,
                                 is_inf, is_pos_inf, is_neg_inf,
                                 match, get_case, check_case, run_test,
-                                run_edge_cases)
+                                run_edge_cases, run_corner_cases)
 
 
 def testbench(dut):
@@ -35,32 +35,11 @@ def testbench(dut):
     count += len(stimulus_a)
     print (count, "vectors passed")
 
-    #corner cases
-    from itertools import permutations
-    stimulus_a = [i[0] for i in permutations([
-        0x8000000000000000,
-        0x0000000000000000,
-        0x7ff8000000000000,
-        0xfff8000000000000,
-        0x7ff0000000000000,
-        0xfff0000000000000
-    ], 2)]
-    stimulus_b = [i[1] for i in permutations([
-        0x8000000000000000,
-        0x0000000000000000,
-        0x7ff8000000000000,
-        0xfff8000000000000,
-        0x7ff0000000000000,
-        0xfff0000000000000
-    ], 2)]
-    yield from run_test(dut, stimulus_a, stimulus_b, add)
-    count += len(stimulus_a)
-    print (count, "vectors passed")
-
+    yield from run_corner_cases(dut, count, add)
     yield from run_edge_cases(dut, count, add)
 
 
 if __name__ == '__main__':
-    dut = FPADD(width=64, single_cycle=True)
+    dut = FPADD(width=64, single_cycle=False)
     run_simulation(dut, testbench(dut), vcd_name="test_add64.vcd")