more code-shuffle

[ieee754fpu.git] / src / ieee754 / fpdiv / nmigen_div_experiment.py

diff --git a/src/ieee754/fpdiv/nmigen_div_experiment.py b/src/ieee754/fpdiv/nmigen_div_experiment.py
index a19decd5850b2c54c8205b2aeb89d8a8d8ebfb97..7887a5273aa2ad98696f6cc48aa028c1f8c3075e 100644 (file)
--- a/src/ieee754/fpdiv/nmigen_div_experiment.py
+++ b/src/ieee754/fpdiv/nmigen_div_experiment.py
@@ -5,7 +5,7 @@
 from nmigen import Module, Signal, Const, Cat
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumIn, FPNumOut, FPOpIn, FPOpOut, Overflow, FPBase, FPState
+from ieee754.fpcommon.fpbase import FPNumIn, FPNumOut, FPOpIn, FPOpOut, Overflow, FPBase, FPState
 from nmutil.singlepipe import eq
 
 class Div: