X-Git-Url: https://git.libre-soc.org/?p=ieee754fpu.git;a=blobdiff_plain;f=src%2Fieee754%2Ffpadd%2Ftest%2Ftest_add.py;h=cd2783c326686809d0ddf7ec5f32104682e76a65;hp=dd635e800e9014c200b4380971eb22b54efdd27c;hb=9d42803631201ea445052fb41fe0f1cc5a3a2b14;hpb=1a859e23c3a3526243be596f11188ce13e5dfa64 diff --git a/src/ieee754/fpadd/test/test_add.py b/src/ieee754/fpadd/test/test_add.py index dd635e80..cd2783c3 100644 --- a/src/ieee754/fpadd/test/test_add.py +++ b/src/ieee754/fpadd/test/test_add.py @@ -11,7 +11,7 @@ from ieee754.fpcommon.test.unit_test_single import (get_mantissa, get_exponent, match, get_rs_case, check_rs_case, run_fpunit, run_edge_cases, run_corner_cases) -def testbench(dut): +def tbench(dut, maxcount, num_loops): yield from check_rs_case(dut, 0x36093399, 0x7f6a12f1, 0x7f6a12f1) yield from check_rs_case(dut, 0x006CE3EE, 0x806CE3EC, 0x00000002) yield from check_rs_case(dut, 0x00000047, 0x80000048, 0x80000001) @@ -71,9 +71,12 @@ def testbench(dut): print (count, "vectors passed") yield from run_corner_cases(dut, count, add, get_rs_case) - yield from run_edge_cases(dut, count, add, get_rs_case) + yield from run_edge_cases(dut, count, add, get_rs_case, maxcount, num_loops) -if __name__ == '__main__': +def test1(maxcount=10, num_loops=5): dut = FPADD(width=32, id_wid=5, single_cycle=True) - run_simulation(dut, testbench(dut), vcd_name="test_add.vcd") + run_simulation(dut, tbench(dut, maxcount, num_loops), + vcd_name="test_add.vcd") +if __name__ == '__main__': + test1(maxcount=1000, num_loops=1000)