X-Git-Url: https://git.libre-soc.org/?p=ieee754fpu.git;a=blobdiff_plain;f=src%2Fscoreboard%2Fldst_dep_cell.py;h=40e1ffbc4d8d724961ec46da29569e12ae64ce85;hp=f8d6230855b4e798d6ff7e3dae2cd37b382afe73;hb=050709ca56f6cffba38303a8d24567816431832b;hpb=39f34a6992e308eae41358db8360788df5844ff7

diff --git a/src/scoreboard/ldst_dep_cell.py b/src/scoreboard/ldst_dep_cell.py
index f8d62308..40e1ffbc 100644
--- a/src/scoreboard/ldst_dep_cell.py
+++ b/src/scoreboard/ldst_dep_cell.py
@@ -13,10 +13,6 @@ from nmutil.latch import SRLatch
 
 class LDSTDepCell(Elaboratable):
     """ implements 11.4.12 mitch alsup load/store dependence cell, p45
-
-        note: the load-hold-store / store-hold-load both come through from
-        the previous cell and accumulate using ORing to create priority
-        picking (in the sparse-matrix, which is where the cells are wired up)
     """
     def __init__(self):
         # inputs
@@ -26,8 +22,6 @@ class LDSTDepCell(Elaboratable):
 
         self.load_hit_i = Signal(reset_less=True) # load hit in (right)
         self.stwd_hit_i = Signal(reset_less=True) # store w/ data hit in (right)
-        self.ld_hold_st_i = Signal(reset_less=True) # load holds st in (right)
-        self.st_hold_ld_i = Signal(reset_less=True) # st holds load in (right)
 
         # outputs (latched rd/wr pend)
         self.ld_hold_st_o = Signal(reset_less=True) # load holds st out (left)
@@ -51,10 +45,8 @@ class LDSTDepCell(Elaboratable):
         m.d.comb += raw_l.r.eq(self.stor_i) # reset on ST
 
         # Hold results (read out horizontally, accumulate in OR fashion)
-        lhs = war_l.qn & self.load_hit_i
-        shl = raw_l.qn & self.stwd_hit_i
-        m.d.comb += self.ld_hold_st_o.eq(self.ld_hold_st_i | lhs)
-        m.d.comb += self.st_hold_ld_o.eq(self.st_hold_ld_i | shl)
+        m.d.comb += self.ld_hold_st_o.eq(war_l.qn & self.load_hit_i)
+        m.d.comb += self.st_hold_ld_o.eq(raw_l.qn & self.stwd_hit_i)
 
         return m
 
@@ -64,8 +56,6 @@ class LDSTDepCell(Elaboratable):
         yield self.issue_i
         yield self.load_hit_i
         yield self.stwd_hit_i
-        yield self.ld_hold_st_i
-        yield self.st_hold_ld_i
         yield self.ld_hold_st_o
         yield self.st_hold_ld_o