From ed217b3930eb02ec6a974a3e8313a99098aca8c1 Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Wed, 6 Mar 2024 22:19:23 +0300 Subject: [PATCH] ppc_svp64_autogen: introduce proposal page --- nlnet_2024_ppc_svp64_autogen.mdwn | 75 +++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 nlnet_2024_ppc_svp64_autogen.mdwn diff --git a/nlnet_2024_ppc_svp64_autogen.mdwn b/nlnet_2024_ppc_svp64_autogen.mdwn new file mode 100644 index 000000000..86df32586 --- /dev/null +++ b/nlnet_2024_ppc_svp64_autogen.mdwn @@ -0,0 +1,75 @@ +# Binutils with Simple-V ISA Expansion Project + +Code: ? + +Submitted: ? + +Toplevel bugreport: + +This project is applying for funding through the NGI Zero Core Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme under grant agreement No 101092990. + +## Project name + +PPC and SVP64 assembly/disassembly code generation + +## Website / wiki + + + +Please be short and to the point in your answers; focus primarily on the what and how, not so much on the why. Add longer descriptions as attachments (see below). If English isn't your first language, don't worry - our reviewers don't care about spelling errors, only about great ideas. We apologise for the inconvenience of having to submit in English. On the up side, you can be as technical as you need to be (but you don't have to). Do stay concrete. Use plain text in your reply only, if you need any HTML to make your point please include this as attachment. + +## Abstract: Can you explain the whole project and its expected outcome(s). + +This project intends to extend and improve the PPC assembly/disassembly so that the the assembly and diassembly are generated automatically based on the human-readable specification. The overall idea is that the human-readable specification for PPC and SVP64 assembly and disassembly is converted into C code. The code must be generated in a framework-independent way so that it can be reused by Libre-SOC and other projects, most importantly binutils. We intend to complete the goal set by Libre-SOC project and fill the gaps currently missing. + +# Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions? + +A sequence of projects enabled early development (four years ago, 2019-03-012) +of vectorisation techniques in the RISC-V domain, and later higher performance +demonstration with OpenPOWER ISA (2022-08-051). A full project list is maintained at: https://libre-soc.org/nlnet_proposals/ they include recently: + +* https://libre-soc.org/nlnet_2022_opf_isa_wg/ - improving SVP64 and submitting it to the OpenPOWER ISA Technical Working Group. +* https://libre-soc.org/nlnet_2021_crypto_router/ - proving, improving, and demonstrating that SVP64 is capable of handling cryptographic primitives in an extreme power-efficient compact way as the basis for higher security products +* https://libre-soc.org/nlnet_2021_3mdeb_cavatools/ - providing basis for an automatic code generation (only a limited vanilla Power ISA subset) + +# Requested Amount + +EUR 50,000. + +# Explain what the requested budget will be used for? + +Key phases of this project are: + +* Completion of libopid (an instruction database parser) +* Completion of SVP64/Power extensions in libopid +* Extending human-readable specification with new formats (PPC aliases and SVP64 fields) +* Introduction of libopid support in binutils +* Test vectors for libopid and binutils +* Documentation, demonstrations and conference papers + +# Does the project have other funding sources, both past and present? + +NGI Search, NGI POINTER, and NLnet Grants have been the sole source of funding for this development programme over the past five years, and for the project in this application. Four grants are at stages of completion at the time of writing (two nearing end). + +#Compare your own project with existing or historical efforts. + +There are a few machine-readable instruction databases around: they tend not to +be used massively extensively to for example auto-generate c code for use in +binutils. Most assembler/disasembler instruction parsing oddly is done by hand-editing +each and every instruction (10,000 in the case of Power ISA). This project is pretty unique +and includes auto-code-generation so as to avoid transliteration errors between ISA Spec +and source code. + +##What are significant technical challenges you expect to solve during the project, if any? + +The key technical challenge in this project is the creation of the binutils tool set that enables developers to take advantage of the Simple-V/SVP64 extensions and capabilities for PPC, and to successfully develop and debug complex code. binutils will be comprehensively tested and verified with the Power ISA in order to lead the way for its use in the widespread developer community. + +##Describe the ecosystem of the project, and how you will engage with relevant actors and promote the outcomes? + +Since the project is going to rely on Libre-SOC code base which has a full set of resources for Libre Project Management and development: mailing list, bugtracker, git repository, wiki and also will be doing linkedin posts in other outreach - all listed here: + +#Extra info to be submitted + +#Questions Received date: + +TODO -- 2.30.2