projects
/
litex.git
/ search
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
first ⋅ prev ⋅ next
soc/integration/csr_bridge: use registered version only when SDRAM is present.
2020-08-06
sadullah
update BlackParrot transducer
commit
|
commitdiff
|
tree
2020-08-06
sadullah
Blackparrot human name update
commit
|
commitdiff
|
tree
2020-06-29
sadullah
clean Makefile
commit
|
commitdiff
|
tree
2020-06-28
sadullah
minor change in BP top module
commit
|
commitdiff
|
tree
2020-06-28
sadullah
syn with master blackparrot, upgrade BP to IMA
commit
|
commitdiff
|
tree
2020-05-12
sadullah
Update README.md and core.py for BlackParrot
commit
|
commitdiff
|
tree
2020-05-12
sadullah
Vivado Command Update for Systemverilog
commit
|
commitdiff
|
tree
2020-05-02
Sadullah Canakci
Update README.md
commit
|
commitdiff
|
tree
2020-05-02
sadullah
update to comply with python-data layout
commit
|
commitdiff
|
tree
2020-05-01
sadullah
BP fpga recent version
commit
|
commitdiff
|
tree
2020-05-01
sadullah
Fix memory transducer bug, --with-sdram for BIOS works...
commit
|
commitdiff
|
tree
2020-05-01
sadullah
rebased, minor changes in core.py
commit
|
commitdiff
|
tree
2020-05-01
sadullah
Linux works, LiteDRAM works (need cleaning, temporary...
commit
|
commitdiff
|
tree
2020-05-01
Sadullah Canakci
Create GETTING STARTED
commit
|
commitdiff
|
tree
2020-01-17
sadullah
BlackParrot initial commit
commit
|
commitdiff
|
tree