put versa_ecp5 back to synchronous at 50 mhz to test sync dram
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 16 Apr 2022 20:23:38 +0000 (21:23 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 16 Apr 2022 20:23:38 +0000 (21:23 +0100)
commit45435ce4bc4d2a8946a51725c7b804c8160bc91f
tree65fc7bbacd86e8caf2381ba265646296442f8c30
parent5fcef44a303326423ddd8e33e4247fa069661f41
put versa_ecp5 back to synchronous at 50 mhz to test sync dram
src/ls2.py